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lpc_uart.c 54 KB

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  1. /**********************************************************************
  2. * $Id$ lpc_uart.c 2011-06-02
  3. *//**
  4. * @file lpc_uart.c
  5. * @brief Contains all functions support for UART firmware library
  6. * on LPC
  7. * @version 1.0
  8. * @date 02. June. 2011
  9. * @author NXP MCU SW Application Team
  10. *
  11. * Copyright(C) 2011, NXP Semiconductor
  12. * All rights reserved.
  13. *
  14. ***********************************************************************
  15. * Software that is described herein is for illustrative purposes only
  16. * which provides customers with programming information regarding the
  17. * products. This software is supplied "AS IS" without any warranties.
  18. * NXP Semiconductors assumes no responsibility or liability for the
  19. * use of the software, conveys no license or title under any patent,
  20. * copyright, or mask work right to the product. NXP Semiconductors
  21. * reserves the right to make changes in the software without
  22. * notification. NXP Semiconductors also make no representation or
  23. * warranty that such application will be suitable for the specified
  24. * use without further testing or modification.
  25. * Permission to use, copy, modify, and distribute this software and its
  26. * documentation is hereby granted, under NXP Semiconductors'
  27. * relevant copyright in the software, without fee, provided that it
  28. * is used in conjunction with NXP Semiconductors microcontrollers. This
  29. * copyright, permission, and disclaimer notice must appear in all copies of
  30. * this code.
  31. **********************************************************************/
  32. /* Peripheral group ----------------------------------------------------------- */
  33. /** @addtogroup UART
  34. * @{
  35. */
  36. #ifdef __BUILD_WITH_EXAMPLE__
  37. #include "lpc_libcfg.h"
  38. #else
  39. #include "lpc_libcfg_default.h"
  40. #endif /* __BUILD_WITH_EXAMPLE__ */
  41. #ifdef _UART
  42. /* Includes ------------------------------------------------------------------- */
  43. #include "lpc_uart.h"
  44. #include "lpc_clkpwr.h"
  45. /* Private Functions ---------------------------------------------------------- */
  46. static Status uart_set_divisors(UART_ID_Type UartID, uint32_t baudrate);
  47. static LPC_UART_TypeDef *uart_get_pointer(UART_ID_Type UartID);
  48. /*********************************************************************//**
  49. * @brief Determines best dividers to get a target clock rate
  50. * @param[in] UARTx Pointer to selected UART peripheral, should be:
  51. * - UART_0: UART0 peripheral
  52. * - UART_1: UART1 peripheral
  53. * - UART_2: UART2 peripheral
  54. * - UART_3: UART3 peripheral
  55. * - UART_4: UART4 peripheral
  56. * @param[in] baudrate Desired UART baud rate.
  57. * @return Error status, could be:
  58. * - SUCCESS
  59. * - ERROR
  60. **********************************************************************/
  61. static Status uart_set_divisors(UART_ID_Type UartID, uint32_t baudrate)
  62. {
  63. Status errorStatus = ERROR;
  64. uint32_t uClk;
  65. uint32_t d, m, bestd, bestm, tmp;
  66. uint64_t best_divisor, divisor;
  67. uint32_t current_error, best_error;
  68. uint32_t recalcbaud;
  69. /* get UART block clock */
  70. uClk = CLKPWR_GetCLK(CLKPWR_CLKTYPE_PER);
  71. /* In the Uart IP block, baud rate is calculated using FDR and DLL-DLM registers
  72. * The formula is :
  73. * BaudRate= uClk * (mulFracDiv/(mulFracDiv+dividerAddFracDiv) / (16 * (DLL)
  74. * It involves floating point calculations. That's the reason the formulae are adjusted with
  75. * Multiply and divide method.*/
  76. /* The value of mulFracDiv and dividerAddFracDiv should comply to the following expressions:
  77. * 0 < mulFracDiv <= 15, 0 <= dividerAddFracDiv <= 15 */
  78. best_error = 0xFFFFFFFF; /* Worst case */
  79. bestd = 0;
  80. bestm = 0;
  81. best_divisor = 0;
  82. for (m = 1 ; m <= 15 ;m++)
  83. {
  84. for (d = 0 ; d < m ; d++)
  85. {
  86. divisor = ((uint64_t)uClk << 28)*m / (baudrate*(m+d));
  87. current_error = divisor & 0xFFFFFFFF;
  88. tmp = divisor>>32;
  89. /* Adjust error */
  90. if(current_error > ((uint32_t)1<<31))
  91. {
  92. current_error = -current_error;
  93. tmp++;
  94. }
  95. /* Out of range */
  96. if(tmp < 1 || tmp > 65536)
  97. continue;
  98. if( current_error < best_error)
  99. {
  100. best_error = current_error;
  101. best_divisor = tmp;
  102. bestd = d;
  103. bestm = m;
  104. if(best_error == 0)
  105. break;
  106. }
  107. } /* end of inner for loop */
  108. if (best_error == 0)
  109. break;
  110. } /* end of outer for loop */
  111. /* can not find best match */
  112. if(best_divisor == 0)
  113. return ERROR;
  114. recalcbaud = (uClk >> 4) * bestm / (best_divisor * (bestm + bestd));
  115. /* reuse best_error to evaluate baud error*/
  116. if(baudrate > recalcbaud)
  117. best_error = baudrate - recalcbaud;
  118. else
  119. best_error = recalcbaud -baudrate;
  120. best_error = best_error * 100 / baudrate;
  121. if (best_error < UART_ACCEPTED_BAUDRATE_ERROR)
  122. {
  123. if (UartID == UART_1)
  124. {
  125. LPC_UART1->LCR |= UART_LCR_DLAB_EN;
  126. LPC_UART1->DLM = UART_LOAD_DLM(best_divisor);
  127. LPC_UART1->DLL = UART_LOAD_DLL(best_divisor);
  128. /* Then reset DLAB bit */
  129. LPC_UART1->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
  130. LPC_UART1->FDR = (UART_FDR_MULVAL(bestm)
  131. | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK;
  132. }
  133. else if (UartID == UART_4)
  134. {
  135. LPC_UART4->LCR |= UART_LCR_DLAB_EN;
  136. LPC_UART4->DLM = UART_LOAD_DLM(best_divisor);
  137. LPC_UART4->DLL = UART_LOAD_DLL(best_divisor);
  138. /* Then reset DLAB bit */
  139. LPC_UART4->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
  140. LPC_UART4->FDR = (UART_FDR_MULVAL(bestm)
  141. | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK;
  142. }
  143. else
  144. {
  145. LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID);
  146. UARTx->LCR |= UART_LCR_DLAB_EN;
  147. UARTx->DLM = UART_LOAD_DLM(best_divisor);
  148. UARTx->DLL = UART_LOAD_DLL(best_divisor);
  149. /* Then reset DLAB bit */
  150. UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
  151. UARTx->FDR = (UART_FDR_MULVAL(bestm) \
  152. | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK;
  153. }
  154. errorStatus = SUCCESS;
  155. }
  156. return errorStatus;
  157. }
  158. /*********************************************************************//**
  159. * @brief Get the pointer of a given Uart
  160. * @param[in] UARTx Pointer to selected UART peripheral, should be:
  161. * - UART_0: UART0 peripheral
  162. * - UART_1: UART1 peripheral
  163. * - UART_2: UART2 peripheral
  164. * - UART_3: UART3 peripheral
  165. * - UART_4: UART4 peripheral
  166. * @return LPC_UART0~LPC_UART4
  167. **********************************************************************/
  168. LPC_UART_TypeDef *uart_get_pointer(UART_ID_Type UartID)
  169. {
  170. LPC_UART_TypeDef *UARTx = NULL;
  171. switch(UartID)
  172. {
  173. case UART_0:
  174. UARTx = LPC_UART0;
  175. break;
  176. case UART_2:
  177. UARTx = LPC_UART2;
  178. break;
  179. case UART_3:
  180. UARTx = LPC_UART3;
  181. break;
  182. default:
  183. break;
  184. }
  185. return UARTx;
  186. }
  187. /* End of Private Functions ---------------------------------------------------- */
  188. /* Public Functions ----------------------------------------------------------- */
  189. /** @addtogroup UART_Public_Functions
  190. * @{
  191. */
  192. /* UART Init/DeInit functions -------------------------------------------------*/
  193. /********************************************************************//**
  194. * @brief Initializes the UARTx peripheral according to the specified
  195. * parameters in the UART_ConfigStruct.
  196. * @param[in] UARTx UART peripheral selected, should be:
  197. * - UART_0: UART0 peripheral
  198. * - UART_1: UART1 peripheral
  199. * - UART_2: UART2 peripheral
  200. * - UART_3: UART3 peripheral
  201. * - UART_4: UART4 peripheral
  202. * @param[in] UART_ConfigStruct Pointer to a UART_CFG_Type structure
  203. * that contains the configuration information for the
  204. * specified UART peripheral.
  205. * @return None
  206. *********************************************************************/
  207. void UART_Init(UART_ID_Type UartID, UART_CFG_Type *UART_ConfigStruct)
  208. {
  209. uint32_t tmp;
  210. switch (UartID)
  211. {
  212. case UART_0:
  213. case UART_2:
  214. case UART_3:
  215. {
  216. LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID);
  217. if(UartID == UART_0)
  218. /* Set up clock and power for UART module */
  219. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, ENABLE);
  220. else if(UartID == UART_2)
  221. /* Set up clock and power for UART module */
  222. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, ENABLE);
  223. else if(UartID == UART_3)
  224. /* Set up clock and power for UART module */
  225. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, ENABLE);;
  226. /* FIFOs are empty */
  227. UARTx->FCR = ( UART_FCR_FIFO_EN | UART_FCR_RX_RS | UART_FCR_TX_RS);
  228. // Disable FIFO
  229. UARTx->FCR = 0;
  230. // Dummy reading
  231. while (UARTx->LSR & UART_LSR_RDR)
  232. {
  233. tmp = UARTx->RBR;
  234. }
  235. UARTx->TER = UART_TER_TXEN;
  236. // Wait for current transmit complete
  237. while (!(UARTx->LSR & UART_LSR_THRE));
  238. // Disable Tx
  239. UARTx->TER = 0;
  240. // Disable interrupt
  241. UARTx->IER = 0;
  242. // Set LCR to default state
  243. UARTx->LCR = 0;
  244. // Set ACR to default state
  245. UARTx->ACR = 0;
  246. // Set RS485 control to default state
  247. UARTx->RS485CTRL = 0;
  248. // Set RS485 delay timer to default state
  249. UARTx->RS485DLY = 0;
  250. // Set RS485 addr match to default state
  251. UARTx->ADRMATCH = 0;
  252. // Dummy reading
  253. tmp = UARTx->LSR;
  254. }
  255. break;
  256. case UART_1:
  257. {
  258. /* Set up clock and power for UART module */
  259. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, ENABLE);
  260. /* FIFOs are empty */
  261. LPC_UART1->FCR = ( UART_FCR_FIFO_EN | UART_FCR_RX_RS | UART_FCR_TX_RS);
  262. // Disable FIFO
  263. LPC_UART1->FCR = 0;
  264. // Dummy reading
  265. while (LPC_UART1->LSR & UART_LSR_RDR)
  266. {
  267. tmp = LPC_UART1->RBR;
  268. }
  269. LPC_UART1->TER = UART_TER_TXEN;
  270. // Wait for current transmit complete
  271. while (!(LPC_UART1->LSR & UART_LSR_THRE));
  272. // Disable Tx
  273. LPC_UART1->TER = 0;
  274. // Disable interrupt
  275. LPC_UART1->IER = 0;
  276. // Set LCR to default state
  277. LPC_UART1->LCR = 0;
  278. // Set ACR to default state
  279. LPC_UART1->ACR = 0;
  280. // Set RS485 control to default state
  281. LPC_UART1->RS485CTRL = 0;
  282. // Set RS485 delay timer to default state
  283. LPC_UART1->RS485DLY = 0;
  284. // Set RS485 addr match to default state
  285. LPC_UART1->ADRMATCH = 0;
  286. // Dummy reading
  287. tmp = LPC_UART1->LSR;
  288. // Set Modem Control to default state
  289. LPC_UART1->MCR = 0;
  290. //Dummy Reading to Clear Status
  291. tmp = LPC_UART1->MSR;
  292. }
  293. break;
  294. case UART_4:
  295. {
  296. /* Set up clock and power for UART module */
  297. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART4, ENABLE);
  298. /* FIFOs are empty */
  299. LPC_UART4->FCR = ( UART_FCR_FIFO_EN | UART_FCR_RX_RS | UART_FCR_TX_RS);
  300. // Disable FIFO
  301. LPC_UART4->FCR = 0;
  302. // Dummy reading
  303. while (LPC_UART4->LSR & UART_LSR_RDR)
  304. {
  305. tmp = LPC_UART4->RBR;
  306. }
  307. LPC_UART4->TER = UART4_TER_TXEN;
  308. // Wait for current transmit complete
  309. while (!(LPC_UART4->LSR & UART_LSR_THRE));
  310. // Disable Tx
  311. LPC_UART4->TER = 0;
  312. // Disable interrupt
  313. LPC_UART4->IER = 0;
  314. // Set LCR to default state
  315. LPC_UART4->LCR = 0;
  316. // Set ACR to default state
  317. LPC_UART4->ACR = 0;
  318. // Set RS485 control to default state
  319. LPC_UART4->RS485CTRL = 0;
  320. // Set RS485 delay timer to default state
  321. LPC_UART4->RS485DLY = 0;
  322. // Set RS485 addr match to default state
  323. LPC_UART4->ADRMATCH = 0;
  324. // Dummy reading
  325. tmp = LPC_UART4->LSR;
  326. // Set IrDA Mode to default state
  327. LPC_UART4->ICR = 0;
  328. }
  329. break;
  330. }
  331. // Set Line Control register ----------------------------
  332. uart_set_divisors(UartID, (UART_ConfigStruct->Baud_rate));
  333. if (UartID == UART_1)
  334. {
  335. tmp = (LPC_UART1->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) \
  336. & UART_LCR_BITMASK;
  337. }
  338. else if (UartID == UART_4)
  339. {
  340. tmp = (LPC_UART4->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) \
  341. & UART_LCR_BITMASK;
  342. }
  343. else
  344. {
  345. LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID);
  346. tmp = (UARTx->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) & UART_LCR_BITMASK;
  347. }
  348. switch (UART_ConfigStruct->Databits)
  349. {
  350. case UART_DATABIT_5:
  351. tmp |= UART_LCR_WLEN5;
  352. break;
  353. case UART_DATABIT_6:
  354. tmp |= UART_LCR_WLEN6;
  355. break;
  356. case UART_DATABIT_7:
  357. tmp |= UART_LCR_WLEN7;
  358. break;
  359. case UART_DATABIT_8:
  360. default:
  361. tmp |= UART_LCR_WLEN8;
  362. break;
  363. }
  364. if (UART_ConfigStruct->Parity == UART_PARITY_NONE)
  365. {
  366. // Do nothing...
  367. }
  368. else
  369. {
  370. tmp |= UART_LCR_PARITY_EN;
  371. switch (UART_ConfigStruct->Parity)
  372. {
  373. case UART_PARITY_ODD:
  374. tmp |= UART_LCR_PARITY_ODD;
  375. break;
  376. case UART_PARITY_EVEN:
  377. tmp |= UART_LCR_PARITY_EVEN;
  378. break;
  379. case UART_PARITY_SP_1:
  380. tmp |= UART_LCR_PARITY_F_1;
  381. break;
  382. case UART_PARITY_SP_0:
  383. tmp |= UART_LCR_PARITY_F_0;
  384. break;
  385. default:
  386. break;
  387. }
  388. }
  389. switch (UART_ConfigStruct->Stopbits)
  390. {
  391. case UART_STOPBIT_2:
  392. tmp |= UART_LCR_STOPBIT_SEL;
  393. break;
  394. case UART_STOPBIT_1:
  395. default:
  396. // Do no thing
  397. break;
  398. }
  399. // Write back to LCR, configure FIFO and Disable Tx
  400. if (UartID == UART_1)
  401. {
  402. LPC_UART1->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
  403. }
  404. else if (UartID == UART_4)
  405. {
  406. LPC_UART4->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
  407. }
  408. else
  409. {
  410. LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID);
  411. UARTx->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
  412. }
  413. }
  414. /*********************************************************************//**
  415. * @brief De-initializes the UARTx peripheral registers to their
  416. * default reset values.
  417. * @param[in] UartID UART peripheral selected, should be:
  418. * - UART_0: UART0 peripheral
  419. * - UART_1: UART1 peripheral
  420. * - UART_2: UART2 peripheral
  421. * - UART_3: UART3 peripheral
  422. * - UART_4: UART4 peripheral
  423. * @return None
  424. **********************************************************************/
  425. void UART_DeInit(UART_ID_Type UartID)
  426. {
  427. UART_TxCmd(UartID, DISABLE);
  428. if (UartID == UART_0)
  429. {
  430. /* Set up clock and power for UART module */
  431. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, DISABLE);
  432. }
  433. else if (UartID == UART_1)
  434. {
  435. /* Set up clock and power for UART module */
  436. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, DISABLE);
  437. }
  438. else if (UartID == UART_2)
  439. {
  440. /* Set up clock and power for UART module */
  441. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, DISABLE);
  442. }
  443. else if (UartID == UART_3)
  444. {
  445. /* Set up clock and power for UART module */
  446. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, DISABLE);
  447. }
  448. else if (UartID == UART_4)
  449. {
  450. /* Set up clock and power for UART module */
  451. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART4, DISABLE);
  452. }
  453. }
  454. /*****************************************************************************//**
  455. * @brief Fills each UART_InitStruct member with its default value:
  456. * - 115200 bps
  457. * - 8-bit data
  458. * - 1 Stopbit
  459. * - None Parity
  460. * @param[in] UART_InitStruct Pointer to a UART_CFG_Type structure
  461. * which will be initialized.
  462. * @return None
  463. *******************************************************************************/
  464. void UART_ConfigStructInit(UART_CFG_Type *UART_InitStruct)
  465. {
  466. UART_InitStruct->Baud_rate = 115200;
  467. UART_InitStruct->Databits = UART_DATABIT_8;
  468. UART_InitStruct->Parity = UART_PARITY_NONE;
  469. UART_InitStruct->Stopbits = UART_STOPBIT_1;
  470. }
  471. /* UART Send/Recieve functions -------------------------------------------------*/
  472. /*********************************************************************//**
  473. * @brief Transmit a single data through UART peripheral
  474. * @param[in] UARTx UART peripheral selected, should be:
  475. * - UART_0: UART0 peripheral
  476. * - UART_1: UART1 peripheral
  477. * - UART_2: UART2 peripheral
  478. * - UART_3: UART3 peripheral
  479. * - UART_4: UART4 peripheral
  480. * @param[in] Data Data to transmit (must be 8-bit long)
  481. * @return None
  482. **********************************************************************/
  483. void UART_SendByte(UART_ID_Type UartID, uint8_t Data)
  484. {
  485. switch (UartID)
  486. {
  487. case UART_0:
  488. LPC_UART0->THR = Data & UART_THR_MASKBIT;
  489. break;
  490. case UART_1:
  491. LPC_UART1->THR = Data & UART_THR_MASKBIT;
  492. break;
  493. case UART_2:
  494. LPC_UART2->THR = Data & UART_THR_MASKBIT;
  495. break;
  496. case UART_3:
  497. LPC_UART3->THR = Data & UART_THR_MASKBIT;
  498. break;
  499. case UART_4:
  500. LPC_UART4->THR = Data & UART_THR_MASKBIT;
  501. break;
  502. }
  503. }
  504. /*********************************************************************//**
  505. * @brief Receive a single data from UART peripheral
  506. * @param[in] UARTx UART peripheral selected, should be:
  507. * - UART_0: UART0 peripheral
  508. * - UART_1: UART1 peripheral
  509. * - UART_2: UART2 peripheral
  510. * - UART_3: UART3 peripheral
  511. * - UART_4: UART4 peripheral
  512. * @return Data received
  513. **********************************************************************/
  514. uint8_t UART_ReceiveByte(UART_ID_Type UartID)
  515. {
  516. switch (UartID)
  517. {
  518. case UART_0:
  519. return (LPC_UART0->RBR & UART_RBR_MASKBIT);
  520. case UART_1:
  521. return (LPC_UART1->RBR & UART_RBR_MASKBIT);
  522. case UART_2:
  523. return (LPC_UART2->RBR & UART_RBR_MASKBIT);
  524. case UART_3:
  525. return (LPC_UART3->RBR & UART_RBR_MASKBIT);
  526. case UART_4:
  527. return (LPC_UART4->RBR & UART_RBR_MASKBIT);
  528. }
  529. return 0x00;
  530. }
  531. /*********************************************************************//**
  532. * @brief Send a block of data via UART peripheral
  533. * @param[in] UARTx Selected UART peripheral used to send data, should be:
  534. * - UART_0: UART0 peripheral
  535. * - UART_1: UART1 peripheral
  536. * - UART_2: UART2 peripheral
  537. * - UART_3: UART3 peripheral
  538. * - UART_4: UART4 peripheral
  539. * @param[in] txbuf Pointer to Transmit buffer
  540. * @param[in] buflen Length of Transmit buffer
  541. * @param[in] flag Flag used in UART transfer, should be
  542. * NONE_BLOCKING or BLOCKING
  543. * @return Number of bytes sent.
  544. *
  545. * Note: when using UART in BLOCKING mode, a time-out condition is used
  546. * via defined symbol UART_BLOCKING_TIMEOUT.
  547. **********************************************************************/
  548. uint32_t UART_Send(UART_ID_Type UartID, uint8_t *txbuf,
  549. uint32_t buflen, TRANSFER_BLOCK_Type flag)
  550. {
  551. uint32_t bToSend, bSent, timeOut, fifo_cnt;
  552. uint8_t *pChar = txbuf;
  553. __IO uint32_t *LSR = NULL;
  554. switch (UartID)
  555. {
  556. case UART_0:
  557. LSR = (__IO uint32_t *)&LPC_UART0->LSR;
  558. break;
  559. case UART_1:
  560. LSR = (__IO uint32_t *)&LPC_UART1->LSR;
  561. break;
  562. case UART_2:
  563. LSR = (__IO uint32_t *)&LPC_UART2->LSR;
  564. break;
  565. case UART_3:
  566. LSR = (__IO uint32_t *)&LPC_UART3->LSR;
  567. break;
  568. case UART_4:
  569. LSR = (__IO uint32_t *)&LPC_UART4->LSR;
  570. break;
  571. }
  572. bToSend = buflen;
  573. // blocking mode
  574. if (flag == BLOCKING)
  575. {
  576. bSent = 0;
  577. while (bToSend)
  578. {
  579. timeOut = UART_BLOCKING_TIMEOUT;
  580. // Wait for THR empty with timeout
  581. while (!(*LSR & UART_LSR_THRE))
  582. {
  583. if (timeOut == 0)
  584. break;
  585. timeOut--;
  586. }
  587. // Time out!
  588. if(timeOut == 0)
  589. break;
  590. fifo_cnt = UART_TX_FIFO_SIZE;
  591. while (fifo_cnt && bToSend)
  592. {
  593. UART_SendByte(UartID, (*pChar++));
  594. fifo_cnt--;
  595. bToSend--;
  596. bSent++;
  597. }
  598. }
  599. }
  600. // None blocking mode
  601. else
  602. {
  603. bSent = 0;
  604. while (bToSend)
  605. {
  606. if (bToSend == 0)
  607. break;
  608. if (!(*LSR & UART_LSR_THRE))
  609. {
  610. break;
  611. }
  612. fifo_cnt = UART_TX_FIFO_SIZE;
  613. while (fifo_cnt && bToSend)
  614. {
  615. UART_SendByte(UartID, (*pChar++));
  616. bToSend--;
  617. fifo_cnt--;
  618. bSent++;
  619. }
  620. }
  621. }
  622. return bSent;
  623. }
  624. /*********************************************************************//**
  625. * @brief Receive a block of data via UART peripheral
  626. * @param[in] UARTx Selected UART peripheral used to send data,
  627. * should be:
  628. * - UART_0: UART0 peripheral
  629. * - UART_1: UART1 peripheral
  630. * - UART_2: UART2 peripheral
  631. * - UART_3: UART3 peripheral
  632. * - UART_4: UART4 peripheral
  633. * @param[out] rxbuf Pointer to Received buffer
  634. * @param[in] buflen Length of Received buffer
  635. * @param[in] flag Flag mode, should be NONE_BLOCKING or BLOCKING
  636. * @return Number of bytes received
  637. *
  638. * Note: when using UART in BLOCKING mode, a time-out condition is used
  639. * via defined symbol UART_BLOCKING_TIMEOUT.
  640. **********************************************************************/
  641. uint32_t UART_Receive(UART_ID_Type UartID, uint8_t *rxbuf,
  642. uint32_t buflen, TRANSFER_BLOCK_Type flag)
  643. {
  644. uint32_t bToRecv, bRecv, timeOut;
  645. uint8_t *pChar = rxbuf;
  646. __IO uint32_t *LSR = NULL;
  647. switch (UartID)
  648. {
  649. case UART_0:
  650. LSR = (__IO uint32_t *)&LPC_UART0->LSR;
  651. break;
  652. case UART_1:
  653. LSR = (__IO uint32_t *)&LPC_UART1->LSR;
  654. break;
  655. case UART_2:
  656. LSR = (__IO uint32_t *)&LPC_UART2->LSR;
  657. break;
  658. case UART_3:
  659. LSR = (__IO uint32_t *)&LPC_UART3->LSR;
  660. break;
  661. case UART_4:
  662. LSR = (__IO uint32_t *)&LPC_UART4->LSR;
  663. break;
  664. }
  665. bToRecv = buflen;
  666. // Blocking mode
  667. if (flag == BLOCKING)
  668. {
  669. bRecv = 0;
  670. while (bToRecv)
  671. {
  672. timeOut = UART_BLOCKING_TIMEOUT;
  673. while (!(*LSR & UART_LSR_RDR))
  674. {
  675. if (timeOut == 0)
  676. break;
  677. timeOut--;
  678. }
  679. // Time out!
  680. if(timeOut == 0)
  681. break;
  682. // Get data from the buffer
  683. (*pChar++) = UART_ReceiveByte(UartID);
  684. bToRecv--;
  685. bRecv++;
  686. }
  687. }
  688. // None blocking mode
  689. else
  690. {
  691. bRecv = 0;
  692. while (bToRecv)
  693. {
  694. if (!(*LSR & UART_LSR_RDR))
  695. {
  696. break;
  697. }
  698. else
  699. {
  700. (*pChar++) = UART_ReceiveByte(UartID);
  701. bRecv++;
  702. bToRecv--;
  703. }
  704. }
  705. }
  706. return bRecv;
  707. }
  708. /*********************************************************************//**
  709. * @brief Force BREAK character on UART line, output pin UARTx TXD is
  710. forced to logic 0.
  711. * @param[in] UARTx UART peripheral selected, should be:
  712. * - UART_0: UART0 peripheral
  713. * - UART_1: UART1 peripheral
  714. * - UART_2: UART2 peripheral
  715. * - UART_3: UART3 peripheral
  716. * - UART_4: UART4 peripheral
  717. * @return None
  718. **********************************************************************/
  719. void UART_ForceBreak(UART_ID_Type UartID)
  720. {
  721. switch (UartID)
  722. {
  723. case UART_0:
  724. LPC_UART0->LCR |= UART_LCR_BREAK_EN;
  725. break;
  726. case UART_1:
  727. LPC_UART1->LCR |= UART_LCR_BREAK_EN;
  728. break;
  729. case UART_2:
  730. LPC_UART2->LCR |= UART_LCR_BREAK_EN;
  731. break;
  732. case UART_3:
  733. LPC_UART3->LCR |= UART_LCR_BREAK_EN;
  734. break;
  735. case UART_4:
  736. LPC_UART4->LCR |= UART_LCR_BREAK_EN;
  737. break;
  738. }
  739. }
  740. /********************************************************************//**
  741. * @brief Enable or disable specified UART interrupt.
  742. * @param[in] UARTx UART peripheral selected, should be
  743. * - UART_0: UART0 peripheral
  744. * - UART_1: UART1 peripheral
  745. * - UART_2: UART2 peripheral
  746. * - UART_3: UART3 peripheral
  747. * - UART_4: UART4 peripheral
  748. * @param[in] UARTIntCfg Specifies the interrupt flag,
  749. * should be one of the following:
  750. - UART_INTCFG_RBR : RBR Interrupt enable
  751. - UART_INTCFG_THRE : THR Interrupt enable
  752. - UART_INTCFG_RLS : RX line status interrupt enable
  753. - UART1_INTCFG_MS : Modem status interrupt enable (UART1 only)
  754. - UART1_INTCFG_CTS : CTS1 signal transition interrupt enable (UART1 only)
  755. - UART_INTCFG_ABEO : Enables the end of auto-baud interrupt
  756. - UART_INTCFG_ABTO : Enables the auto-baud time-out interrupt
  757. * @param[in] NewState New state of specified UART interrupt type,
  758. * should be:
  759. * - ENALBE: Enable this UART interrupt type.
  760. * - DISALBE: Disable this UART interrupt type.
  761. * @return None
  762. *********************************************************************/
  763. void UART_IntConfig(UART_ID_Type UartID, UART_INT_Type UARTIntCfg, FunctionalState NewState)
  764. {
  765. uint32_t tmp;
  766. __IO uint32_t *IER = NULL;
  767. uint32_t IERMask = 0;
  768. switch (UartID)
  769. {
  770. case UART_0:
  771. IER = &LPC_UART0->IER;
  772. IERMask = UART_IER_BITMASK;
  773. break;
  774. case UART_1:
  775. IER = &LPC_UART1->IER;
  776. IERMask = UART1_IER_BITMASK;
  777. break;
  778. case UART_2:
  779. IER = &LPC_UART2->IER;
  780. IERMask = UART_IER_BITMASK;
  781. break;
  782. case UART_3:
  783. IER = &LPC_UART3->IER;
  784. IERMask = UART_IER_BITMASK;
  785. break;
  786. case UART_4:
  787. IER = &LPC_UART4->IER;
  788. IERMask = UART_IER_BITMASK;
  789. break;
  790. }
  791. switch(UARTIntCfg)
  792. {
  793. case UART_INTCFG_RBR:
  794. tmp = UART_IER_RBRINT_EN;
  795. break;
  796. case UART_INTCFG_THRE:
  797. tmp = UART_IER_THREINT_EN;
  798. break;
  799. case UART_INTCFG_RLS:
  800. tmp = UART_IER_RLSINT_EN;
  801. break;
  802. case UART_INTCFG_MS:
  803. tmp = UART1_IER_MSINT_EN;
  804. break;
  805. case UART_INTCFG_CTS:
  806. tmp = UART1_IER_CTSINT_EN;
  807. break;
  808. case UART_INTCFG_ABEO:
  809. tmp = UART_IER_ABEOINT_EN;
  810. break;
  811. case UART_INTCFG_ABTO:
  812. tmp = UART_IER_ABTOINT_EN;
  813. break;
  814. }
  815. if (NewState == ENABLE)
  816. {
  817. *IER |= tmp& IERMask;
  818. }
  819. else
  820. {
  821. *IER &= (~tmp) & IERMask;
  822. }
  823. }
  824. /********************************************************************//**
  825. * @brief Get current value of Line Status register in UART peripheral.
  826. * @param[in] UARTx UART peripheral selected, should be:
  827. * - UART_0: UART0 peripheral
  828. * - UART_1: UART1 peripheral
  829. * - UART_2: UART2 peripheral
  830. * - UART_3: UART3 peripheral
  831. * - UART_4: UART4 peripheral
  832. * @return Current value of Line Status register in UART peripheral.
  833. * Note: The return value of this function must be ANDed with each member in
  834. * UART_LS_Type enumeration to determine current flag status
  835. * corresponding to each Line status type. Because some flags in
  836. * Line Status register will be cleared after reading, the next reading
  837. * Line Status register could not be correct. So this function used to
  838. * read Line status register in one time only, then the return value
  839. * used to check all flags.
  840. *********************************************************************/
  841. uint8_t UART_GetLineStatus(UART_ID_Type UartID)
  842. {
  843. switch (UartID)
  844. {
  845. case UART_0:
  846. return ((LPC_UART0->LSR) & UART_LSR_BITMASK);
  847. case UART_1:
  848. return ((LPC_UART1->LSR) & UART_LSR_BITMASK);
  849. case UART_2:
  850. return ((LPC_UART2->LSR) & UART_LSR_BITMASK);
  851. case UART_3:
  852. return ((LPC_UART3->LSR) & UART_LSR_BITMASK);
  853. case UART_4:
  854. return ((LPC_UART4->LSR) & UART_LSR_BITMASK);
  855. }
  856. return 0;
  857. }
  858. /********************************************************************//**
  859. * @brief Get Interrupt Identification value
  860. * @param[in] UARTx UART peripheral selected, should be:
  861. * - UART_0: UART0 peripheral
  862. * - UART_1: UART1 peripheral
  863. * - UART_2: UART2 peripheral
  864. * - UART_3: UART3 peripheral
  865. * - UART_4: UART4 peripheral
  866. * @return Current value of UART UIIR register in UART peripheral.
  867. *********************************************************************/
  868. uint32_t UART_GetIntId(UART_ID_Type UartID)
  869. {
  870. switch (UartID)
  871. {
  872. case UART_0:
  873. return ((LPC_UART0->IIR) & UART_IIR_BITMASK);
  874. case UART_1:
  875. return ((LPC_UART1->IIR) & UART_IIR_BITMASK);
  876. case UART_2:
  877. return ((LPC_UART2->IIR) & UART_IIR_BITMASK);
  878. case UART_3:
  879. return ((LPC_UART3->IIR) & UART_IIR_BITMASK);
  880. case UART_4:
  881. return ((LPC_UART4->IIR) & UART_IIR_BITMASK);
  882. }
  883. return 0;
  884. }
  885. /*********************************************************************//**
  886. * @brief Check whether if UART is busy or not
  887. * @param[in] UARTx UART peripheral selected, should be:
  888. * - UART_0: UART0 peripheral
  889. * - UART_1: UART1 peripheral
  890. * - UART_2: UART2 peripheral
  891. * - UART_3: UART3 peripheral
  892. * - UART_4: UART4 peripheral
  893. * @return RESET if UART is not busy, otherwise return SET.
  894. **********************************************************************/
  895. FlagStatus UART_CheckBusy(UART_ID_Type UartID)
  896. {
  897. uint32_t LSR = 0;
  898. switch (UartID)
  899. {
  900. case UART_0:
  901. LSR = (LPC_UART0)->LSR & UART_LSR_TEMT;
  902. break;
  903. case UART_1:
  904. LSR = (LPC_UART1)->LSR & UART_LSR_TEMT;
  905. break;
  906. case UART_2:
  907. LSR = (LPC_UART2)->LSR & UART_LSR_TEMT;
  908. break;
  909. case UART_3:
  910. LSR = (LPC_UART3)->LSR & UART_LSR_TEMT;
  911. break;
  912. case UART_4:
  913. LSR = (LPC_UART4)->LSR & UART_LSR_TEMT;
  914. break;
  915. }
  916. if (LSR & UART_LSR_TEMT)
  917. {
  918. return RESET;
  919. }
  920. return SET;
  921. }
  922. /*********************************************************************//**
  923. * @brief Configure FIFO function on selected UART peripheral
  924. * @param[in] UARTx UART peripheral selected, should be:
  925. * - UART_0: UART0 peripheral
  926. * - UART_1: UART1 peripheral
  927. * - UART_2: UART2 peripheral
  928. * - UART_3: UART3 peripheral
  929. * - UART_4: UART4 peripheral
  930. * @param[in] FIFOCfg Pointer to a UART_FIFO_CFG_Type Structure that
  931. * contains specified information about FIFO configuration
  932. * @return none
  933. **********************************************************************/
  934. void UART_FIFOConfig(UART_ID_Type UartID, UART_FIFO_CFG_Type *FIFOCfg)
  935. {
  936. uint8_t tmp = 0;
  937. tmp |= UART_FCR_FIFO_EN;
  938. switch (FIFOCfg->FIFO_Level)
  939. {
  940. case UART_FIFO_TRGLEV0:
  941. tmp |= UART_FCR_TRG_LEV0;
  942. break;
  943. case UART_FIFO_TRGLEV1:
  944. tmp |= UART_FCR_TRG_LEV1;
  945. break;
  946. case UART_FIFO_TRGLEV2:
  947. tmp |= UART_FCR_TRG_LEV2;
  948. break;
  949. case UART_FIFO_TRGLEV3:
  950. default:
  951. tmp |= UART_FCR_TRG_LEV3;
  952. break;
  953. }
  954. if (FIFOCfg->FIFO_ResetTxBuf == ENABLE)
  955. {
  956. tmp |= UART_FCR_TX_RS;
  957. }
  958. if (FIFOCfg->FIFO_ResetRxBuf == ENABLE)
  959. {
  960. tmp |= UART_FCR_RX_RS;
  961. }
  962. if (FIFOCfg->FIFO_DMAMode == ENABLE)
  963. {
  964. tmp |= UART_FCR_DMAMODE_SEL;
  965. }
  966. //write to FIFO control register
  967. switch (UartID)
  968. {
  969. case UART_0:
  970. LPC_UART0->FCR = tmp & UART_FCR_BITMASK;
  971. break;
  972. case UART_1:
  973. LPC_UART1->FCR = tmp & UART_FCR_BITMASK;
  974. break;
  975. case UART_2:
  976. LPC_UART2->FCR = tmp & UART_FCR_BITMASK;
  977. break;
  978. case UART_3:
  979. LPC_UART3->FCR = tmp & UART_FCR_BITMASK;
  980. break;
  981. case UART_4:
  982. LPC_UART4->FCR = tmp & UART_FCR_BITMASK;
  983. break;
  984. }
  985. }
  986. /*****************************************************************************//**
  987. * @brief Fills each UART_FIFOInitStruct member with its default value:
  988. * - FIFO_DMAMode = DISABLE
  989. * - FIFO_Level = UART_FIFO_TRGLEV0
  990. * - FIFO_ResetRxBuf = ENABLE
  991. * - FIFO_ResetTxBuf = ENABLE
  992. * - FIFO_State = ENABLE
  993. * @param[in] UART_FIFOInitStruct Pointer to a UART_FIFO_CFG_Type structure
  994. * which will be initialized.
  995. * @return None
  996. *******************************************************************************/
  997. void UART_FIFOConfigStructInit(UART_FIFO_CFG_Type *UART_FIFOInitStruct)
  998. {
  999. UART_FIFOInitStruct->FIFO_DMAMode = DISABLE;
  1000. UART_FIFOInitStruct->FIFO_Level = UART_FIFO_TRGLEV0;
  1001. UART_FIFOInitStruct->FIFO_ResetRxBuf = ENABLE;
  1002. UART_FIFOInitStruct->FIFO_ResetTxBuf = ENABLE;
  1003. }
  1004. /*********************************************************************//**
  1005. * @brief Start/Stop Auto Baudrate activity
  1006. * @param[in] UARTx UART peripheral selected, should be
  1007. * - UART_0: UART0 peripheral
  1008. * - UART_1: UART1 peripheral
  1009. * - UART_2: UART2 peripheral
  1010. * - UART_3: UART3 peripheral
  1011. * - UART_4: UART4 peripheral
  1012. * @param[in] ABConfigStruct A pointer to UART_AB_CFG_Type structure that
  1013. * contains specified information about UART
  1014. * auto baudrate configuration
  1015. * @param[in] NewState New State of Auto baudrate activity, should be:
  1016. * - ENABLE: Start this activity
  1017. * - DISABLE: Stop this activity
  1018. * Note: Auto-baudrate mode enable bit will be cleared once this mode
  1019. * completed.
  1020. * @return none
  1021. **********************************************************************/
  1022. void UART_ABCmd(UART_ID_Type UartID, UART_AB_CFG_Type *ABConfigStruct,
  1023. FunctionalState NewState)
  1024. {
  1025. uint32_t tmp;
  1026. tmp = 0;
  1027. if (NewState == ENABLE)
  1028. {
  1029. if (ABConfigStruct->ABMode == UART_AUTOBAUD_MODE1)
  1030. {
  1031. tmp |= UART_ACR_MODE;
  1032. }
  1033. if (ABConfigStruct->AutoRestart == ENABLE)
  1034. {
  1035. tmp |= UART_ACR_AUTO_RESTART;
  1036. }
  1037. }
  1038. if (UartID == UART_1)
  1039. {
  1040. if (NewState == ENABLE)
  1041. {
  1042. // Clear DLL and DLM value
  1043. LPC_UART1->LCR |= UART_LCR_DLAB_EN;
  1044. LPC_UART1->DLL = 0;
  1045. LPC_UART1->DLM = 0;
  1046. LPC_UART1->LCR &= ~UART_LCR_DLAB_EN;
  1047. // FDR value must be reset to default value
  1048. LPC_UART1->FDR = 0x10;
  1049. LPC_UART1->ACR = UART_ACR_START | tmp;
  1050. }
  1051. else
  1052. {
  1053. LPC_UART1->ACR = 0;
  1054. }
  1055. }
  1056. else if (UartID == UART_4)
  1057. {
  1058. if (NewState == ENABLE)
  1059. {
  1060. // Clear DLL and DLM value
  1061. LPC_UART4->LCR |= UART_LCR_DLAB_EN;
  1062. LPC_UART4->DLL = 0;
  1063. LPC_UART4->DLM = 0;
  1064. LPC_UART4->LCR &= ~UART_LCR_DLAB_EN;
  1065. // FDR value must be reset to default value
  1066. LPC_UART4->FDR = 0x10;
  1067. LPC_UART4->ACR = UART_ACR_START | tmp;
  1068. }
  1069. else
  1070. {
  1071. LPC_UART4->ACR = 0;
  1072. }
  1073. }
  1074. else
  1075. {
  1076. LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID);
  1077. if (NewState == ENABLE)
  1078. {
  1079. // Clear DLL and DLM value
  1080. UARTx->LCR |= UART_LCR_DLAB_EN;
  1081. UARTx->DLL = 0;
  1082. UARTx->DLM = 0;
  1083. UARTx->LCR &= ~UART_LCR_DLAB_EN;
  1084. // FDR value must be reset to default value
  1085. UARTx->FDR = 0x10;
  1086. UARTx->ACR = UART_ACR_START | tmp;
  1087. }
  1088. else
  1089. {
  1090. UARTx->ACR = 0;
  1091. }
  1092. }
  1093. }
  1094. /*********************************************************************//**
  1095. * @brief Clear Autobaud Interrupt Pending
  1096. * @param[in] UARTx UART peripheral selected, should be
  1097. * - UART_0: UART0 peripheral
  1098. * - UART_1: UART1 peripheral
  1099. * - UART_2: UART2 peripheral
  1100. * - UART_3: UART3 peripheral
  1101. * - UART_4: UART4 peripheral
  1102. * @param[in] ABIntType type of auto-baud interrupt, should be:
  1103. * - UART_AUTOBAUD_INTSTAT_ABEO: End of Auto-baud interrupt
  1104. * - UART_AUTOBAUD_INTSTAT_ABTO: Auto-baud time out interrupt
  1105. * @return none
  1106. **********************************************************************/
  1107. void UART_ABClearIntPending(UART_ID_Type UartID, UART_ABEO_Type ABIntType)
  1108. {
  1109. if (UartID == UART_1)
  1110. {
  1111. LPC_UART1->ACR |= ABIntType;
  1112. }
  1113. else if (UartID == UART_4)
  1114. {
  1115. LPC_UART4->ACR |= ABIntType;
  1116. }
  1117. else
  1118. {
  1119. LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID);
  1120. UARTx->ACR |= ABIntType;
  1121. }
  1122. }
  1123. /*********************************************************************//**
  1124. * @brief Enable/Disable transmission on UART TxD pin
  1125. * @param[in] UARTx UART peripheral selected, should be:
  1126. * - UART_0: UART0 peripheral
  1127. * - UART_1: UART1 peripheral
  1128. * - UART_2: UART2 peripheral
  1129. * - UART_3: UART3 peripheral
  1130. * - UART_4: UART4 peripheral
  1131. * @param[in] NewState New State of Tx transmission function, should be:
  1132. * - ENABLE: Enable this function
  1133. - DISABLE: Disable this function
  1134. * @return none
  1135. **********************************************************************/
  1136. void UART_TxCmd(UART_ID_Type UartID, FunctionalState NewState)
  1137. {
  1138. if (NewState == ENABLE)
  1139. {
  1140. if (UartID == UART_1)
  1141. {
  1142. LPC_UART1->TER |= UART_TER_TXEN;
  1143. }
  1144. else if (UartID == UART_4)
  1145. {
  1146. LPC_UART4->TER |= UART4_TER_TXEN;
  1147. }
  1148. else
  1149. {
  1150. LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID);
  1151. UARTx->TER |= UART_TER_TXEN;
  1152. }
  1153. }
  1154. else
  1155. {
  1156. if (UartID == UART_1)
  1157. {
  1158. LPC_UART1->TER &= (~UART_TER_TXEN) & UART_TER_BITMASK;
  1159. }
  1160. else if (UartID == UART_4)
  1161. {
  1162. LPC_UART4->TER &= (~UART4_TER_TXEN) & UART4_TER_BITMASK;
  1163. }
  1164. else
  1165. {
  1166. LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID);
  1167. UARTx->TER &= (~UART_TER_TXEN) & UART_TER_BITMASK;
  1168. }
  1169. }
  1170. }
  1171. /* UART IrDA functions ---------------------------------------------------*/
  1172. /*********************************************************************//**
  1173. * @brief Enable or disable inverting serial input function of IrDA
  1174. * on UART peripheral.
  1175. * @param[in] UARTx UART peripheral selected, should be LPC_UART4 (only)
  1176. * @param[in] NewState New state of inverting serial input, should be:
  1177. * - ENABLE: Enable this function.
  1178. * - DISABLE: Disable this function.
  1179. * @return none
  1180. **********************************************************************/
  1181. void UART_IrDAInvtInputCmd(UART_ID_Type UartID, FunctionalState NewState)
  1182. {
  1183. if (UartID != UART_4)
  1184. return;
  1185. if (NewState == ENABLE)
  1186. {
  1187. LPC_UART4->ICR |= UART_ICR_IRDAINV;
  1188. }
  1189. else if (NewState == DISABLE)
  1190. {
  1191. LPC_UART4->ICR &= (~UART_ICR_IRDAINV) & UART_ICR_BITMASK;
  1192. }
  1193. }
  1194. /*********************************************************************//**
  1195. * @brief Enable or disable IrDA function on UART peripheral.
  1196. * @param[in] UARTx UART peripheral selected, should be LPC_UART4 (only)
  1197. * @param[in] NewState New state of IrDA function, should be:
  1198. * - ENABLE: Enable this function.
  1199. * - DISABLE: Disable this function.
  1200. * @return none
  1201. **********************************************************************/
  1202. void UART_IrDACmd(UART_ID_Type UartID, FunctionalState NewState)
  1203. {
  1204. if (UartID != UART_4)
  1205. return;
  1206. if (NewState == ENABLE)
  1207. {
  1208. LPC_UART4->ICR |= UART_ICR_IRDAEN;
  1209. }
  1210. else
  1211. {
  1212. LPC_UART4->ICR &= (~UART_ICR_IRDAEN) & UART_ICR_BITMASK;
  1213. }
  1214. }
  1215. /*********************************************************************//**
  1216. * @brief Configure Pulse divider for IrDA function on UART peripheral.
  1217. * @param[in] UARTx UART peripheral selected, should be LPC_UART4 (only)
  1218. * @param[in] PulseDiv Pulse Divider value from Peripheral clock,
  1219. * should be one of the following:
  1220. - UART_IrDA_PULSEDIV2 : Pulse width = 2 * Tpclk
  1221. - UART_IrDA_PULSEDIV4 : Pulse width = 4 * Tpclk
  1222. - UART_IrDA_PULSEDIV8 : Pulse width = 8 * Tpclk
  1223. - UART_IrDA_PULSEDIV16 : Pulse width = 16 * Tpclk
  1224. - UART_IrDA_PULSEDIV32 : Pulse width = 32 * Tpclk
  1225. - UART_IrDA_PULSEDIV64 : Pulse width = 64 * Tpclk
  1226. - UART_IrDA_PULSEDIV128 : Pulse width = 128 * Tpclk
  1227. - UART_IrDA_PULSEDIV256 : Pulse width = 256 * Tpclk
  1228. * @return none
  1229. **********************************************************************/
  1230. void UART_IrDAPulseDivConfig(UART_ID_Type UartID, UART_IrDA_PULSE_Type PulseDiv)
  1231. {
  1232. uint32_t tmp, tmp1;
  1233. if (UartID != UART_4)
  1234. return;
  1235. tmp1 = UART_ICR_PULSEDIV(PulseDiv);
  1236. tmp = LPC_UART4->ICR & (~ UART_ICR_PULSEDIV(7));
  1237. tmp |= tmp1 | UART_ICR_FIXPULSE_EN;
  1238. LPC_UART4->ICR = tmp & UART_ICR_BITMASK;
  1239. }
  1240. /* UART1 FullModem function ---------------------------------------------*/
  1241. /*********************************************************************//**
  1242. * @brief Force pin DTR/RTS corresponding to given state (Full modem mode)
  1243. * @param[in] UARTx LPC_UART1 (only)
  1244. * @param[in] Pin Pin that NewState will be applied to, should be:
  1245. * - UART1_MODEM_PIN_DTR: DTR pin.
  1246. * - UART1_MODEM_PIN_RTS: RTS pin.
  1247. * @param[in] NewState New State of DTR/RTS pin, should be:
  1248. * - INACTIVE: Force the pin to inactive signal.
  1249. - ACTIVE: Force the pin to active signal.
  1250. * @return none
  1251. **********************************************************************/
  1252. void UART_FullModemForcePinState(UART_ID_Type UartID,
  1253. UART_MODEM_PIN_Type Pin,
  1254. UART1_SignalState NewState)
  1255. {
  1256. uint8_t tmp = 0;
  1257. if (UartID != UART_1)
  1258. return;
  1259. switch (Pin)
  1260. {
  1261. case UART1_MODEM_PIN_DTR:
  1262. tmp = UART1_MCR_DTR_CTRL;
  1263. break;
  1264. case UART1_MODEM_PIN_RTS:
  1265. tmp = UART1_MCR_RTS_CTRL;
  1266. break;
  1267. default:
  1268. break;
  1269. }
  1270. if (NewState == ACTIVE)
  1271. {
  1272. LPC_UART1->MCR |= tmp;
  1273. }
  1274. else
  1275. {
  1276. LPC_UART1->MCR &= (~tmp) & UART1_MCR_BITMASK;
  1277. }
  1278. }
  1279. /*********************************************************************//**
  1280. * @brief Configure Full Modem mode for UART peripheral
  1281. * @param[in] UARTx LPC_UART1 (only)
  1282. * @param[in] Mode Full Modem mode, should be:
  1283. * - UART1_MODEM_MODE_LOOPBACK: Loop back mode.
  1284. * - UART1_MODEM_MODE_AUTO_RTS: Auto-RTS mode.
  1285. * - UART1_MODEM_MODE_AUTO_CTS: Auto-CTS mode.
  1286. * @param[in] NewState New State of this mode, should be:
  1287. * - ENABLE: Enable this mode.
  1288. - DISABLE: Disable this mode.
  1289. * @return none
  1290. **********************************************************************/
  1291. void UART_FullModemConfigMode(UART_ID_Type UartID, UART_MODEM_MODE_Type Mode,
  1292. FunctionalState NewState)
  1293. {
  1294. uint8_t tmp;
  1295. if(UartID != UART_1)
  1296. return;
  1297. switch(Mode)
  1298. {
  1299. case UART1_MODEM_MODE_LOOPBACK:
  1300. tmp = UART1_MCR_LOOPB_EN;
  1301. break;
  1302. case UART1_MODEM_MODE_AUTO_RTS:
  1303. tmp = UART1_MCR_AUTO_RTS_EN;
  1304. break;
  1305. case UART1_MODEM_MODE_AUTO_CTS:
  1306. tmp = UART1_MCR_AUTO_CTS_EN;
  1307. break;
  1308. default:
  1309. break;
  1310. }
  1311. if (NewState == ENABLE)
  1312. {
  1313. LPC_UART1->MCR |= tmp;
  1314. }
  1315. else
  1316. {
  1317. LPC_UART1->MCR &= (~tmp) & UART1_MCR_BITMASK;
  1318. }
  1319. }
  1320. /*********************************************************************//**
  1321. * @brief Get current status of modem status register
  1322. * @param[in] UARTx LPC_UART1 (only)
  1323. * @return Current value of modem status register
  1324. * Note: The return value of this function must be ANDed with each member
  1325. * UART_MODEM_STAT_type enumeration to determine current flag status
  1326. * corresponding to each modem flag status. Because some flags in
  1327. * modem status register will be cleared after reading, the next reading
  1328. * modem register could not be correct. So this function used to
  1329. * read modem status register in one time only, then the return value
  1330. * used to check all flags.
  1331. **********************************************************************/
  1332. uint8_t UART_FullModemGetStatus(UART_ID_Type UartID)
  1333. {
  1334. if(UartID != UART_1)
  1335. return 0;
  1336. return ((LPC_UART1->MSR) & UART1_MSR_BITMASK);
  1337. }
  1338. /* UART RS485 functions --------------------------------------------------------------*/
  1339. /*********************************************************************//**
  1340. * @brief Configure UART peripheral in RS485 mode according to the specified
  1341. * parameters in the RS485ConfigStruct.
  1342. * @param[in] UARTx LPC_UART0 ~LPC_UART4
  1343. * @param[in] RS485ConfigStruct Pointer to a UART1_RS485_CTRLCFG_Type structure
  1344. * that contains the configuration information for specified UART
  1345. * in RS485 mode.
  1346. * @return None
  1347. **********************************************************************/
  1348. void UART_RS485Config(UART_ID_Type UartID, UART1_RS485_CTRLCFG_Type *RS485ConfigStruct)
  1349. {
  1350. uint32_t tmp;
  1351. __IO uint32_t *RS485DLY, *ADRMATCH, *RS485CTRL, *LCR;
  1352. tmp = 0;
  1353. if (UartID == UART_1)
  1354. {
  1355. RS485DLY = (__IO uint32_t *)&LPC_UART1->RS485DLY;
  1356. ADRMATCH = (__IO uint32_t *)&LPC_UART1->ADRMATCH;
  1357. LCR = (__IO uint32_t *)&LPC_UART1->LCR;
  1358. RS485CTRL = (__IO uint32_t *)&LPC_UART1->RS485CTRL;
  1359. }
  1360. else if (UartID == UART_4)
  1361. {
  1362. RS485DLY = (__IO uint32_t *)&LPC_UART4->RS485DLY;
  1363. ADRMATCH = (__IO uint32_t *)&LPC_UART4->ADRMATCH;
  1364. LCR = (__IO uint32_t *)&LPC_UART4->LCR;
  1365. RS485CTRL = (__IO uint32_t *)&LPC_UART4->RS485CTRL;
  1366. }
  1367. else
  1368. {
  1369. LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID);
  1370. RS485DLY = (__IO uint32_t *)&UARTx->RS485DLY;
  1371. ADRMATCH = (__IO uint32_t *)&UARTx->ADRMATCH;
  1372. LCR = (__IO uint32_t *)&UARTx->LCR;
  1373. RS485CTRL = (__IO uint32_t *)&UARTx->RS485CTRL;
  1374. }
  1375. // If Auto Direction Control is enabled - This function is used in Master mode
  1376. if (RS485ConfigStruct->AutoDirCtrl_State == ENABLE)
  1377. {
  1378. tmp |= UART_RS485CTRL_DCTRL_EN;
  1379. // Set polar
  1380. if (RS485ConfigStruct->DirCtrlPol_Level == SET)
  1381. {
  1382. tmp |= UART_RS485CTRL_OINV_1;
  1383. }
  1384. // Set pin according to. This condition is only with UART1. The others are used
  1385. // OE pin as default for control the direction of RS485 buffer IC
  1386. if ((RS485ConfigStruct->DirCtrlPin == UART_RS485_DIRCTRL_DTR) &&
  1387. (UartID == UART_1))
  1388. {
  1389. tmp |= UART_RS485CTRL_SEL_DTR;
  1390. }
  1391. // Fill delay time
  1392. *RS485DLY = RS485ConfigStruct->DelayValue & UART_RS485DLY_BITMASK;
  1393. }
  1394. // MultiDrop mode is enable
  1395. if (RS485ConfigStruct->NormalMultiDropMode_State == ENABLE)
  1396. {
  1397. tmp |= UART_RS485CTRL_NMM_EN;
  1398. }
  1399. // Auto Address Detect function
  1400. if (RS485ConfigStruct->AutoAddrDetect_State == ENABLE)
  1401. {
  1402. tmp |= UART_RS485CTRL_AADEN;
  1403. // Fill Match Address
  1404. *ADRMATCH = RS485ConfigStruct->MatchAddrValue & UART_RS485ADRMATCH_BITMASK;
  1405. }
  1406. // Receiver is disable
  1407. if (RS485ConfigStruct->Rx_State == DISABLE)
  1408. {
  1409. tmp |= UART_RS485CTRL_RX_DIS;
  1410. }
  1411. // write back to RS485 control register
  1412. *RS485CTRL = tmp & UART_RS485CTRL_BITMASK;
  1413. // Enable Parity function and leave parity in stick '0' parity as default
  1414. *LCR |= (UART_LCR_PARITY_F_0 | UART_LCR_PARITY_EN);
  1415. }
  1416. /*********************************************************************//**
  1417. * @brief Enable/Disable receiver in RS485 module in UART1
  1418. * @param[in] UARTx LPC_UART1 (only)
  1419. * @param[in] NewState New State of command, should be:
  1420. * - ENABLE: Enable this function.
  1421. * - DISABLE: Disable this function.
  1422. * @return None
  1423. **********************************************************************/
  1424. void UART_RS485ReceiverCmd(UART_ID_Type UartID, FunctionalState NewState)
  1425. {
  1426. __IO uint32_t *RS485CTRL;
  1427. if (UartID == UART_1)
  1428. {
  1429. RS485CTRL = (__IO uint32_t *)&LPC_UART1->RS485DLY;
  1430. }
  1431. else if (UartID == UART_4)
  1432. {
  1433. RS485CTRL = (__IO uint32_t *)&LPC_UART4->RS485DLY;
  1434. }
  1435. else
  1436. {
  1437. LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID);
  1438. RS485CTRL = (__IO uint32_t *)&UARTx->RS485DLY;
  1439. }
  1440. if (NewState == ENABLE)
  1441. {
  1442. *RS485CTRL &= ~UART_RS485CTRL_RX_DIS;
  1443. }
  1444. else
  1445. {
  1446. *RS485CTRL |= UART_RS485CTRL_RX_DIS;
  1447. }
  1448. }
  1449. /*********************************************************************//**
  1450. * @brief Send data on RS485 bus with specified parity stick value (9-bit mode).
  1451. * @param[in] UARTx LPC_UART1 (only)
  1452. * @param[in] pDatFrm Pointer to data frame.
  1453. * @param[in] size Size of data.
  1454. * @param[in] ParityStick Parity Stick value, should be 0 or 1.
  1455. * @return None
  1456. **********************************************************************/
  1457. uint32_t UART_RS485Send(UART_ID_Type UartID, uint8_t *pDatFrm,
  1458. uint32_t size, uint8_t ParityStick)
  1459. {
  1460. uint8_t tmp, save;
  1461. uint32_t cnt;
  1462. __IO uint32_t *LCR, *LSR;
  1463. if (UartID == UART_1)
  1464. {
  1465. LCR = (__IO uint32_t *)&LPC_UART1->LCR;
  1466. LSR = (__IO uint32_t *)&LPC_UART1->LSR;
  1467. }
  1468. else if (UartID == UART_4)
  1469. {
  1470. LCR = (__IO uint32_t *)&LPC_UART4->LCR;
  1471. LSR = (__IO uint32_t *)&LPC_UART4->LSR;
  1472. }
  1473. else
  1474. {
  1475. LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID);
  1476. LCR = (__IO uint32_t *)&UARTx->LCR;
  1477. LSR = (__IO uint32_t *)&UARTx->LSR;
  1478. }
  1479. if (ParityStick)
  1480. {
  1481. save = tmp = *LCR & UART_LCR_BITMASK;
  1482. tmp &= ~(UART_LCR_PARITY_EVEN);
  1483. *LCR = tmp;
  1484. cnt = UART_Send(UartID, pDatFrm, size, BLOCKING);
  1485. while (!(*LSR & UART_LSR_TEMT));
  1486. *LCR = save;
  1487. }
  1488. else
  1489. {
  1490. cnt = UART_Send(UartID, pDatFrm, size, BLOCKING);
  1491. while (!(*LSR & UART_LSR_TEMT));
  1492. }
  1493. return cnt;
  1494. }
  1495. /*********************************************************************//**
  1496. * @brief Send Slave address frames on RS485 bus.
  1497. * @param[in] UARTx LPC_UART1 (only)
  1498. * @param[in] SlvAddr Slave Address.
  1499. * @return None
  1500. **********************************************************************/
  1501. void UART_RS485SendSlvAddr(UART_ID_Type UartID, uint8_t SlvAddr)
  1502. {
  1503. UART_RS485Send(UartID, &SlvAddr, 1, 1);
  1504. }
  1505. /*********************************************************************//**
  1506. * @brief Send Data frames on RS485 bus.
  1507. * @param[in] UARTx LPC_UART1 (only)
  1508. * @param[in] pData Pointer to data to be sent.
  1509. * @param[in] size Size of data frame to be sent.
  1510. * @return None
  1511. **********************************************************************/
  1512. uint32_t UART_RS485SendData(UART_ID_Type UartID, uint8_t *pData, uint32_t size)
  1513. {
  1514. return (UART_RS485Send(UartID, pData, size, 0));
  1515. }
  1516. /**
  1517. * @}
  1518. */
  1519. #endif /*_UART*/
  1520. /**
  1521. * @}
  1522. */
  1523. /* --------------------------------- End Of File ------------------------------ */