drv_uart.c 9.9 KB

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  1. /*
  2. * File : drv_uart.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2009-2013 RT-Thread Develop Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2013-05-18 Bernard The first version for LPC40xx
  13. */
  14. #include <rthw.h>
  15. #include <rtthread.h>
  16. #include <rtdevice.h>
  17. #include "board.h"
  18. #include "drv_uart.h"
  19. struct lpc_uart
  20. {
  21. LPC_USARTn_Type *USART;
  22. IRQn_Type USART_IRQn;
  23. };
  24. static rt_err_t lpc_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  25. {
  26. RT_ASSERT(serial != RT_NULL);
  27. return RT_EOK;
  28. }
  29. static rt_err_t lpc_control(struct rt_serial_device *serial, int cmd, void *arg)
  30. {
  31. struct lpc_uart *uart;
  32. RT_ASSERT(serial != RT_NULL);
  33. uart = (struct lpc_uart *)serial->parent.user_data;
  34. switch (cmd)
  35. {
  36. case RT_DEVICE_CTRL_CLR_INT:
  37. /* disable rx irq */
  38. uart->USART->IER &= ~UART_IER_RBRINT_EN;
  39. break;
  40. case RT_DEVICE_CTRL_SET_INT:
  41. /* enable rx irq */
  42. uart->USART->IER |= UART_IER_RBRINT_EN;
  43. break;
  44. }
  45. return RT_EOK;
  46. }
  47. static int lpc_putc(struct rt_serial_device *serial, char c)
  48. {
  49. struct lpc_uart *uart;
  50. uart = (struct lpc_uart *)serial->parent.user_data;
  51. while (!(uart->USART->LSR & 0x20));
  52. uart->USART->THR = c;
  53. return 1;
  54. }
  55. static int lpc_getc(struct rt_serial_device *serial)
  56. {
  57. struct lpc_uart *uart;
  58. uart = (struct lpc_uart *)serial->parent.user_data;
  59. if (uart->USART->LSR & 0x01)
  60. {
  61. return (uart->USART->RBR);
  62. }
  63. return -1;
  64. }
  65. static const struct rt_uart_ops lpc_uart_ops =
  66. {
  67. lpc_configure,
  68. lpc_control,
  69. lpc_putc,
  70. lpc_getc,
  71. };
  72. static void _do_uart_isr(struct rt_serial_device *sdev)
  73. {
  74. struct lpc_uart *uart;
  75. uint32_t intsrc;
  76. uart = sdev->parent.user_data;
  77. /* Determine the interrupt source */
  78. intsrc = uart->USART->IIR & UART_IIR_INTID_MASK;
  79. switch (intsrc)
  80. {
  81. case UART_IIR_INTID_RLS:
  82. /* Receive Line Status interrupt */
  83. /* read the line status */
  84. intsrc = uart->USART->LSR;
  85. /* Receive an error data */
  86. if (intsrc & UART_LSR_PE)
  87. {
  88. uart->USART->RBR;
  89. }
  90. break;
  91. case UART_IIR_INTID_RDA:
  92. /* Receive data */
  93. case UART_IIR_INTID_CTI:
  94. /* Receive data timeout */
  95. /* read the data to buffer */
  96. while (uart->USART->LSR & UART_LSR_RDR)
  97. {
  98. rt_hw_serial_isr(sdev, RT_SERIAL_EVENT_RX_IND);
  99. }
  100. break;
  101. default:
  102. break;
  103. }
  104. }
  105. #if defined(RT_USING_UART0)
  106. /* UART0 device driver structure */
  107. struct lpc_uart uart0 =
  108. {
  109. LPC_USART0,
  110. USART0_IRQn,
  111. };
  112. struct rt_serial_device serial0;
  113. void UART0_IRQHandler(void)
  114. {
  115. rt_interrupt_enter();
  116. _do_uart_isr(&serial0);
  117. rt_interrupt_leave();
  118. }
  119. #endif
  120. #if defined(RT_USING_UART2)
  121. struct lpc_uart uart2 =
  122. {
  123. LPC_USART2,
  124. USART2_IRQn,
  125. };
  126. struct rt_serial_device serial2;
  127. void UART2_IRQHandler(void)
  128. {
  129. rt_interrupt_enter();
  130. _do_uart_isr(&serial2);
  131. rt_interrupt_leave();
  132. }
  133. #endif
  134. #if defined(RT_USING_UART3)
  135. struct lpc_uart uart3 =
  136. {
  137. LPC_USART3,
  138. USART3_IRQn,
  139. };
  140. struct rt_serial_device serial3;
  141. void UART3_IRQHandler(void)
  142. {
  143. rt_interrupt_enter();
  144. _do_uart_isr(&serial3);
  145. rt_interrupt_leave();
  146. }
  147. #endif
  148. void rt_hw_uart_init(void)
  149. {
  150. struct lpc_uart *uart;
  151. struct serial_configure config;
  152. #ifdef RT_USING_UART0
  153. uart = &uart0;
  154. config.baud_rate = BAUD_RATE_115200;
  155. config.bit_order = BIT_ORDER_LSB;
  156. config.data_bits = DATA_BITS_8;
  157. config.parity = PARITY_NONE;
  158. config.stop_bits = STOP_BITS_1;
  159. config.invert = NRZ_NORMAL;
  160. config.bufsz = RT_SERIAL_RB_BUFSZ;
  161. serial0.ops = &lpc_uart_ops;
  162. serial0.config = config;
  163. /* Enable GPIO register interface clock */
  164. LPC_CCU1->CLK_M4_GPIO_CFG |= 0x01;
  165. while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 0x01));
  166. /* Enable USART0 peripheral clock */
  167. LPC_CCU2->CLK_APB0_USART0_CFG |= 0x01;
  168. while (!(LPC_CCU2->CLK_APB0_USART0_STAT & 0x01));
  169. /* Enable USART0 register interface clock */
  170. LPC_CCU1->CLK_M4_USART0_CFG |= 0x01;
  171. while (!(LPC_CCU1->CLK_M4_USART0_STAT & 0x01));
  172. /* Init GPIO pins */
  173. LPC_SCU->SFSP2_0 = (1 << 6) | /* Input buffer enabled */
  174. (1 << 4) | /* Pull-up disabled */
  175. (1 << 0) ; /* Pin P2_0 used as U0_TXD */
  176. LPC_SCU->SFSP2_1 = (1 << 6) | /* Input buffer enabled */
  177. (1 << 4) | /* Pull-up disabled */
  178. (1 << 0) ; /* Pin P2_1 used as U0_RXD */
  179. /* Init USART0 */
  180. uart->USART->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
  181. uart->USART->DLL = 0x06; /* 115200 Baudrate @ 12 MHz IRC */
  182. uart->USART->DLM = 0x00;
  183. uart->USART->FDR = 0xC1;
  184. uart->USART->LCR = 0x03; /* DLAB = 0 */
  185. /* preemption = 1, sub-priority = 1 */
  186. NVIC_SetPriority(uart->USART_IRQn, ((0x01 << 3) | 0x01));
  187. /* Enable Interrupt for UART channel */
  188. NVIC_EnableIRQ(uart->USART_IRQn);
  189. /* register UART0 device */
  190. rt_hw_serial_register(&serial0, "uart0",
  191. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  192. uart);
  193. #endif
  194. #ifdef RT_USING_UART2
  195. uart = &uart2;
  196. config.baud_rate = BAUD_RATE_115200;
  197. config.bit_order = BIT_ORDER_LSB;
  198. config.data_bits = DATA_BITS_8;
  199. config.parity = PARITY_NONE;
  200. config.stop_bits = STOP_BITS_1;
  201. config.invert = NRZ_NORMAL;
  202. config.bufsz = RT_SERIAL_RB_BUFSZ;
  203. serial2.ops = &lpc_uart_ops;
  204. serial2.config = config;
  205. /* Enable GPIO register interface clock */
  206. LPC_CCU1->CLK_M4_GPIO_CFG |= 0x01;
  207. while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 0x01));
  208. /* Enable USART2 peripheral clock */
  209. LPC_CCU2->CLK_APB2_USART2_CFG |= 0x01;
  210. while (!(LPC_CCU2->CLK_APB2_USART2_STAT & 0x01));
  211. /* Enable USART2 register interface clock */
  212. LPC_CCU1->CLK_M4_USART2_CFG |= 0x01;
  213. while (!(LPC_CCU1->CLK_M4_USART2_STAT & 0x01));
  214. /* Init GPIO pins */
  215. LPC_SCU->SFSP1_15 = (1 << 6) | /* Input buffer enabled */
  216. (1 << 4) | /* Pull-up disabled */
  217. (1 << 0) ; /* Pin P1_15 used as U2_TXD */
  218. LPC_SCU->SFSP1_16 = (1 << 6) | /* Input buffer enabled */
  219. (1 << 4) | /* Pull-up disabled */
  220. (1 << 0) ; /* Pin P1_16 used as U2_RXD */
  221. /* Init USART2 */
  222. uart->USART->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
  223. uart->USART->DLL = 0x06; /* 115200 Baudrate @ 12 MHz IRC */
  224. uart->USART->DLM = 0x00;
  225. uart->USART->FDR = 0xC1;
  226. uart->USART->LCR = 0x03; /* DLAB = 0 */
  227. /* preemption = 1, sub-priority = 1 */
  228. NVIC_SetPriority(uart->USART_IRQn, ((0x01 << 3) | 0x01));
  229. /* Enable Interrupt for UART channel */
  230. NVIC_EnableIRQ(uart->USART_IRQn);
  231. /* register UART2 device */
  232. rt_hw_serial_register(&serial2, "uart2",
  233. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  234. uart);
  235. #endif
  236. #ifdef RT_USING_UART3
  237. uart = &uart3;
  238. config.baud_rate = BAUD_RATE_115200;
  239. config.bit_order = BIT_ORDER_LSB;
  240. config.data_bits = DATA_BITS_8;
  241. config.parity = PARITY_NONE;
  242. config.stop_bits = STOP_BITS_1;
  243. config.invert = NRZ_NORMAL;
  244. config.bufsz = RT_SERIAL_RB_BUFSZ;
  245. serial3.ops = &lpc_uart_ops;
  246. serial3.config = config;
  247. /* Enable GPIO register interface clock */
  248. LPC_CCU1->CLK_M4_GPIO_CFG |= 0x01;
  249. while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 0x01));
  250. /* Enable USART3 peripheral clock */
  251. LPC_CCU2->CLK_APB2_USART3_CFG |= 0x01;
  252. while (!(LPC_CCU2->CLK_APB2_USART3_STAT & 0x01));
  253. /* Enable USART3 register interface clock */
  254. LPC_CCU1->CLK_M4_USART3_CFG |= 0x01;
  255. while (!(LPC_CCU1->CLK_M4_USART3_STAT & 0x01));
  256. /* Init GPIO pins */
  257. LPC_SCU->SFSP2_3 = (1 << 6) | /* Input buffer enabled */
  258. (1 << 4) | /* Pull-up disabled */
  259. (2 << 0) ; /* Pin P1_15 used as U2_TXD */
  260. LPC_SCU->SFSP2_4 = (1 << 6) | /* Input buffer enabled */
  261. (1 << 4) | /* Pull-up disabled */
  262. (2 << 0) ; /* Pin P1_16 used as U2_RXD */
  263. /* Init USART3 */
  264. uart->USART->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
  265. uart->USART->DLL = 0x06; /* 115200 Baudrate @ 12 MHz IRC */
  266. uart->USART->DLM = 0x00;
  267. uart->USART->FDR = 0xC1;
  268. uart->USART->LCR = 0x03; /* DLAB = 0 */
  269. /* preemption = 1, sub-priority = 1 */
  270. NVIC_SetPriority(uart->USART_IRQn, ((0x01 << 3) | 0x01));
  271. /* Enable Interrupt for UART channel */
  272. NVIC_EnableIRQ(uart->USART_IRQn);
  273. /* register UART2 device */
  274. rt_hw_serial_register(&serial3, "uart3",
  275. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  276. uart);
  277. #endif
  278. }