hw_uart.h 4.5 KB

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  1. /*
  2. * @brief UART ROM API declarations and functions
  3. *
  4. * @note
  5. * Copyright(C) NXP Semiconductors, 2014
  6. * All rights reserved.
  7. *
  8. * @par
  9. * Software that is described herein is for illustrative purposes only
  10. * which provides customers with programming information regarding the
  11. * LPC products. This software is supplied "AS IS" without any warranties of
  12. * any kind, and NXP Semiconductors and its licensor disclaim any and
  13. * all warranties, express or implied, including all implied warranties of
  14. * merchantability, fitness for a particular purpose and non-infringement of
  15. * intellectual property rights. NXP Semiconductors assumes no responsibility
  16. * or liability for the use of the software, conveys no license or rights under any
  17. * patent, copyright, mask work right, or any other intellectual property rights in
  18. * or to any products. NXP Semiconductors reserves the right to make changes
  19. * in the software without notification. NXP Semiconductors also makes no
  20. * representation or warranty that such application will be suitable for the
  21. * specified use without further testing or modification.
  22. *
  23. * @par
  24. * Permission to use, copy, modify, and distribute this software and its
  25. * documentation is hereby granted, under NXP Semiconductors' and its
  26. * licensor's relevant copyrights in the software, without fee, provided that it
  27. * is used in conjunction with NXP Semiconductors microcontrollers. This
  28. * copyright, permission, and disclaimer notice must appear in all copies of
  29. * this code.
  30. */
  31. #ifndef _HW_UART_H
  32. #define _HW_UART_H
  33. #define UART_DRIVER_VERSION 0x0100
  34. /*******************
  35. * INCLUDE FILES *
  36. ********************/
  37. #include <stdint.h>
  38. /* UART Status Register bits */
  39. #define UART_RXRDY (1 << 0) /* Receive data ready */
  40. #define UART_RXIDLE (1 << 1) /* Receiver Idle */
  41. #define UART_TXRDY (1 << 2) /* Transmitter ready */
  42. #define UART_TXIDLE (1 << 3) /* Transmitter Idle */
  43. #define UART_RXDERR (0xF100) /* overrun err, frame err, parity err, RxNoise err */
  44. #define UART_TXDERR (0x0200) /* underrun err */
  45. #define UART_START (0x1000)
  46. /* UART Interrupt register bits */
  47. #define UART_INT_RXRDY (1 << 0)
  48. #define UART_INT_TXRDY (1 << 2)
  49. #define UART_INT_TXIDLE (1 << 3)
  50. #define UART_INT_CTS (1 << 5)
  51. #define UART_INT_TXDIS (1 << 6)
  52. #define UART_INT_OVR (1 << 8)
  53. #define UART_INT_BREAK (1 << 11)
  54. #define UART_INT_START (1 << 12)
  55. #define UART_INT_FRMERR (1 << 13)
  56. #define UART_INT_PARERR (1 << 14)
  57. #define UART_INT_RXNOISE (1 << 15)
  58. #define UART_INT_ABAUDERR (1 << 16)
  59. /* Configuration register bits */
  60. #define UARTEN 1
  61. #define UART_CTL_TXDIS (1UL << 6)
  62. #define UART_CTL_TXBRKEN (1UL << 1)
  63. #define UART_CTL_AUTOBAUD (1UL << 16)
  64. #define UART_CFG_RES (2UL | (1UL << 10) | (1UL << 13) | (1UL << 17) | (0xFFUL << 24))
  65. #define UART_CFG_ENABLE 1
  66. #define UART_PAR_MASK (3 << 4)
  67. #define UART_DATA_MASK (3 << 2)
  68. #define UART_CTL_RES (1UL | (7UL << 3) | (1UL << 7) | (0x3FUL << 10) | (0x7FFFUL << 17))
  69. #define UART_IDLE_MASK (1 << 3)
  70. #define UART_STAT_CTS (1 << 4)
  71. #define UART_STAT_BREAK (1 << 10)
  72. #define UART_STAT_RXIDLE (1 << 1)
  73. /*******************
  74. * EXPORTED MACROS *
  75. ********************/
  76. #define ECHO_EN 1
  77. #define ECHO_DIS 0
  78. /*********************
  79. * EXPORTED TYPEDEFS *
  80. **********************/
  81. typedef struct { /* UART registers Structure */
  82. volatile uint32_t CFG; /*!< Offset: 0x000 Configuration register */
  83. volatile uint32_t CTL; /*!< Offset: 0x004 Control register */
  84. volatile uint32_t STAT; /*!< Offset: 0x008 Status register */
  85. volatile uint32_t INTENSET; /*!< Offset: 0x00C Interrupt Enable Read and Set register */
  86. volatile uint32_t INTENCLR; /*!< Offset: 0x010 Interrupt Enable Clear register */
  87. const volatile uint32_t RXDAT; /*!< Offset: 0x014 Receiver Data register */
  88. const volatile uint32_t RXDATSTAT; /*!< Offset: 0x018 Rx Data with status */
  89. volatile uint32_t TXDAT; /*!< Offset: 0x01C Transmitter Data Register */
  90. volatile uint32_t BRG; /*!< Offset: 0x020 Baud Rate Generator register */
  91. const volatile uint32_t INTSTAT; /*!< Offset: 0x024 Interrupt Status register */
  92. volatile uint32_t OSR; /*!< Offset: 0x028 Oversampling register */
  93. volatile uint32_t ADR; /*!< Offset: 0x02C Address register (for automatic address matching) */
  94. } UART_REGS_T;
  95. typedef UART_REGS_T LPC_USART_T;
  96. #endif /* _HW_UART_H */