gpio.h 17 KB

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  1. /**************************************************************************//**
  2. * @file GPIO.h
  3. * @version V2.1
  4. * $Revision: 5 $
  5. * $Date: 14/01/28 10:49a $
  6. * @brief M051 Series General Purpose I/O Driver Header File
  7. *
  8. * @note
  9. * Copyright (C) 2011 Nuvoton Technology Corp. All rights reserved.
  10. *
  11. ******************************************************************************/
  12. #ifndef __GPIO_H__
  13. #define __GPIO_H__
  14. #ifdef __cplusplus
  15. extern "C"
  16. {
  17. #endif
  18. /** @addtogroup M051_Device_Driver M051 Device Driver
  19. @{
  20. */
  21. /** @addtogroup M051_GPIO_Driver GPIO Driver
  22. @{
  23. */
  24. /** @addtogroup M051_GPIO_EXPORTED_CONSTANTS GPIO Exported Constants
  25. @{
  26. */
  27. #define GPIO_PIN_MAX 8 /*!< Specify Maximum Pins of Each GPIO Port */
  28. /*---------------------------------------------------------------------------------------------------------*/
  29. /* PMD Constant Definitions */
  30. /*---------------------------------------------------------------------------------------------------------*/
  31. #define GPIO_PMD_INPUT 0x0UL /*!< Input Mode */
  32. #define GPIO_PMD_OUTPUT 0x1UL /*!< Output Mode */
  33. #define GPIO_PMD_OPEN_DRAIN 0x2UL /*!< Open-Drain Mode */
  34. #define GPIO_PMD_QUASI 0x3UL /*!< Quasi-bidirectional Mode */
  35. /*---------------------------------------------------------------------------------------------------------*/
  36. /* GPIO Interrupt Type Constant Definitions */
  37. /*---------------------------------------------------------------------------------------------------------*/
  38. #define GPIO_INT_RISING 0x00010000UL /*!< Interrupt enable by Input Rising Edge */
  39. #define GPIO_INT_FALLING 0x00000001UL /*!< Interrupt enable by Input Falling Edge */
  40. #define GPIO_INT_BOTH_EDGE 0x00010001UL /*!< Interrupt enable by both Rising Edge and Falling Edge */
  41. #define GPIO_INT_HIGH 0x01010000UL /*!< Interrupt enable by Level-High */
  42. #define GPIO_INT_LOW 0x01000001UL /*!< Interrupt enable by Level-Level */
  43. /*---------------------------------------------------------------------------------------------------------*/
  44. /* IMD Constant Definitions */
  45. /*---------------------------------------------------------------------------------------------------------*/
  46. #define GPIO_IMD_EDGE 0UL /*!< IMD Setting for Edge Trigger Mode */
  47. #define GPIO_IMD_LEVEL 1UL /*!< IMD Setting for Edge Level Mode */
  48. /*---------------------------------------------------------------------------------------------------------*/
  49. /* DBNCECON Constant Definitions */
  50. /*---------------------------------------------------------------------------------------------------------*/
  51. #define GPIO_INT_CLK_ON 0x00000020UL /*!< DBNCECON setting for all IO pins edge detection circuit is always active after reset */
  52. #define GPIO_INT_CLK_OFF 0x00000000UL /*!< DBNCECON setting for edge detection circuit is active only if IO pin corresponding GPIOx_IEN bit is set to 1 */
  53. #define GPIO_DBCLKSRC_LIRC 0x00000010UL /*!< DBNCECON setting for de-bounce counter clock source is the internal 10 kHz */
  54. #define GPIO_DBCLKSRC_HCLK 0x00000000UL /*!< DBNCECON setting for de-bounce counter clock source is the HCLK */
  55. #define GPIO_DBCLKSEL_1 0x00000000UL /*!< DBNCECON setting for sampling cycle = 1 clocks */
  56. #define GPIO_DBCLKSEL_2 0x00000001UL /*!< DBNCECON setting for sampling cycle = 2 clocks */
  57. #define GPIO_DBCLKSEL_4 0x00000002UL /*!< DBNCECON setting for sampling cycle = 4 clocks */
  58. #define GPIO_DBCLKSEL_8 0x00000003UL /*!< DBNCECON setting for sampling cycle = 8 clocks */
  59. #define GPIO_DBCLKSEL_16 0x00000004UL /*!< DBNCECON setting for sampling cycle = 16 clocks */
  60. #define GPIO_DBCLKSEL_32 0x00000005UL /*!< DBNCECON setting for sampling cycle = 32 clocks */
  61. #define GPIO_DBCLKSEL_64 0x00000006UL /*!< DBNCECON setting for sampling cycle = 64 clocks */
  62. #define GPIO_DBCLKSEL_128 0x00000007UL /*!< DBNCECON setting for sampling cycle = 128 clocks */
  63. #define GPIO_DBCLKSEL_256 0x00000008UL /*!< DBNCECON setting for sampling cycle = 256 clocks */
  64. #define GPIO_DBCLKSEL_512 0x00000009UL /*!< DBNCECON setting for sampling cycle = 512 clocks */
  65. #define GPIO_DBCLKSEL_1024 0x0000000AUL /*!< DBNCECON setting for sampling cycle = 1024 clocks */
  66. #define GPIO_DBCLKSEL_2048 0x0000000BUL /*!< DBNCECON setting for sampling cycle = 2048 clocks */
  67. #define GPIO_DBCLKSEL_4096 0x0000000CUL /*!< DBNCECON setting for sampling cycle = 4096 clocks */
  68. #define GPIO_DBCLKSEL_8192 0x0000000DUL /*!< DBNCECON setting for sampling cycle = 8192 clocks */
  69. #define GPIO_DBCLKSEL_16384 0x0000000EUL /*!< DBNCECON setting for sampling cycle = 16384 clocks */
  70. #define GPIO_DBCLKSEL_32768 0x0000000FUL /*!< DBNCECON setting for sampling cycle = 32768 clocks */
  71. /** Define GPIO Pin Data Input/Output. It could be used to control each I/O pin by pin address mapping.
  72. * Example 1:
  73. *
  74. * P00 = 1;
  75. *
  76. * It is used to set P0.0 to high;
  77. *
  78. * Example 2:
  79. *
  80. * if (P00)
  81. * P00 = 0;
  82. *
  83. * If P0.0 pin status is high, then set P0.0 data output to low.
  84. */
  85. #define GPIO_PIN_ADDR(port, pin) (*((volatile uint32_t *)((GPIO_PIN_DATA_BASE+(0x20*(port))) + ((pin)<<2))))
  86. #define P00 GPIO_PIN_ADDR(0, 0) /*!< Specify P00 Pin Data Input/Output */
  87. #define P01 GPIO_PIN_ADDR(0, 1) /*!< Specify P01 Pin Data Input/Output */
  88. #define P02 GPIO_PIN_ADDR(0, 2) /*!< Specify P02 Pin Data Input/Output */
  89. #define P03 GPIO_PIN_ADDR(0, 3) /*!< Specify P03 Pin Data Input/Output */
  90. #define P04 GPIO_PIN_ADDR(0, 4) /*!< Specify P04 Pin Data Input/Output */
  91. #define P05 GPIO_PIN_ADDR(0, 5) /*!< Specify P05 Pin Data Input/Output */
  92. #define P06 GPIO_PIN_ADDR(0, 6) /*!< Specify P06 Pin Data Input/Output */
  93. #define P07 GPIO_PIN_ADDR(0, 7) /*!< Specify P07 Pin Data Input/Output */
  94. #define P10 GPIO_PIN_ADDR(1, 0) /*!< Specify P10 Pin Data Input/Output */
  95. #define P11 GPIO_PIN_ADDR(1, 1) /*!< Specify P11 Pin Data Input/Output */
  96. #define P12 GPIO_PIN_ADDR(1, 2) /*!< Specify P12 Pin Data Input/Output */
  97. #define P13 GPIO_PIN_ADDR(1, 3) /*!< Specify P13 Pin Data Input/Output */
  98. #define P14 GPIO_PIN_ADDR(1, 4) /*!< Specify P14 Pin Data Input/Output */
  99. #define P15 GPIO_PIN_ADDR(1, 5) /*!< Specify P15 Pin Data Input/Output */
  100. #define P16 GPIO_PIN_ADDR(1, 6) /*!< Specify P16 Pin Data Input/Output */
  101. #define P17 GPIO_PIN_ADDR(1, 7) /*!< Specify P17 Pin Data Input/Output */
  102. #define P20 GPIO_PIN_ADDR(2, 0) /*!< Specify P20 Pin Data Input/Output */
  103. #define P21 GPIO_PIN_ADDR(2, 1) /*!< Specify P21 Pin Data Input/Output */
  104. #define P22 GPIO_PIN_ADDR(2, 2) /*!< Specify P22 Pin Data Input/Output */
  105. #define P23 GPIO_PIN_ADDR(2, 3) /*!< Specify P23 Pin Data Input/Output */
  106. #define P24 GPIO_PIN_ADDR(2, 4) /*!< Specify P24 Pin Data Input/Output */
  107. #define P25 GPIO_PIN_ADDR(2, 5) /*!< Specify P25 Pin Data Input/Output */
  108. #define P26 GPIO_PIN_ADDR(2, 6) /*!< Specify P26 Pin Data Input/Output */
  109. #define P27 GPIO_PIN_ADDR(2, 7) /*!< Specify P27 Pin Data Input/Output */
  110. #define P30 GPIO_PIN_ADDR(3, 0) /*!< Specify P30 Pin Data Input/Output */
  111. #define P31 GPIO_PIN_ADDR(3, 1) /*!< Specify P31 Pin Data Input/Output */
  112. #define P32 GPIO_PIN_ADDR(3, 2) /*!< Specify P32 Pin Data Input/Output */
  113. #define P33 GPIO_PIN_ADDR(3, 3) /*!< Specify P33 Pin Data Input/Output */
  114. #define P34 GPIO_PIN_ADDR(3, 4) /*!< Specify P34 Pin Data Input/Output */
  115. #define P35 GPIO_PIN_ADDR(3, 5) /*!< Specify P35 Pin Data Input/Output */
  116. #define P36 GPIO_PIN_ADDR(3, 6) /*!< Specify P36 Pin Data Input/Output */
  117. #define P37 GPIO_PIN_ADDR(3, 7) /*!< Specify P37 Pin Data Input/Output */
  118. #define P40 GPIO_PIN_ADDR(4, 0) /*!< Specify P40 Pin Data Input/Output */
  119. #define P41 GPIO_PIN_ADDR(4, 1) /*!< Specify P41 Pin Data Input/Output */
  120. #define P42 GPIO_PIN_ADDR(4, 2) /*!< Specify P42 Pin Data Input/Output */
  121. #define P43 GPIO_PIN_ADDR(4, 3) /*!< Specify P43 Pin Data Input/Output */
  122. #define P44 GPIO_PIN_ADDR(4, 4) /*!< Specify P44 Pin Data Input/Output */
  123. #define P45 GPIO_PIN_ADDR(4, 5) /*!< Specify P45 Pin Data Input/Output */
  124. #define P46 GPIO_PIN_ADDR(4, 6) /*!< Specify P46 Pin Data Input/Output */
  125. #define P47 GPIO_PIN_ADDR(4, 7) /*!< Specify P47 Pin Data Input/Output */
  126. /*@}*/ /* end of group M051_GPIO_EXPORTED_CONSTANTS */
  127. /** @addtogroup M051_GPIO_EXPORTED_FUNCTIONS GPIO Exported Functions
  128. @{
  129. */
  130. /**
  131. * @brief Clear GPIO Pin Interrupt Flag
  132. *
  133. * @param[in] port GPIO port. It could be P0, P1, P2, P3 or P4.
  134. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  135. * It could be BIT0 ~ BIT7.
  136. *
  137. * @return None
  138. *
  139. * @details Clear the interrupt status of specified GPIO pin.
  140. */
  141. #define GPIO_CLR_INT_FLAG(port, u32PinMask) ((port)->ISRC = u32PinMask)
  142. /**
  143. * @brief Disable Pin De-bounce Function
  144. *
  145. * @param[in] port GPIO port. It could be P0, P1, P2, P3 or P4.
  146. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  147. * It could be BIT0 ~ BIT7.
  148. *
  149. * @return None
  150. *
  151. * @details Disable the interrupt de-bounce function of specified GPIO pin.
  152. */
  153. #define GPIO_DISABLE_DEBOUNCE(port, u32PinMask) ((port)->DBEN &= ~u32PinMask)
  154. /**
  155. * @brief Enable Pin De-bounce Function
  156. *
  157. * @param[in] port GPIO port. It could be P0, P1, P2, P3 or P4.
  158. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  159. * It could be BIT0 ~ BIT7.
  160. * @return None
  161. *
  162. * @details Enable the interrupt de-bounce function of specified GPIO pin.
  163. */
  164. #define GPIO_ENABLE_DEBOUNCE(port, u32PinMask) ((port)->DBEN |= u32PinMask)
  165. /**
  166. * @brief Disable I/O Digital Input Path
  167. *
  168. * @param[in] port GPIO port. It could be P0, P1, P2, P3 or P4.
  169. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  170. * It could be BIT0 ~ BIT7.
  171. *
  172. * @return None
  173. *
  174. * @details Disable I/O digital input path of specified GPIO pin.
  175. */
  176. #define GPIO_DISABLE_DIGITAL_PATH(port, u32PinMask) ((port)->OFFD |= u32PinMask)
  177. /**
  178. * @brief Enable I/O Digital Input Path
  179. *
  180. * @param[in] port GPIO port. It could be P0, P1, P2, P3 or P4.
  181. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  182. * It could be BIT0 ~ BIT7.
  183. *
  184. * @return None
  185. *
  186. * @details Enable I/O digital input path of specified GPIO pin.
  187. */
  188. #define GPIO_ENABLE_DIGITAL_PATH(port, u32PinMask) ((port)->OFFD &= ~u32PinMask)
  189. /**
  190. * @brief Disable I/O DOUT mask
  191. *
  192. * @param[in] port GPIO port. It could be P0, P1, P2, P3 or P4.
  193. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  194. * It could be BIT0 ~ BIT7.
  195. *
  196. * @return None
  197. *
  198. * @details Disable I/O DOUT mask of specified GPIO pin.
  199. */
  200. #define GPIO_DISABLE_DOUT_MASK(port, u32PinMask) ((port)->DMASK |= u32PinMask)
  201. /**
  202. * @brief Enable I/O DOUT mask
  203. *
  204. * @param[in] port GPIO port. It could be P0, P1, P2, P3 or P4.
  205. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  206. * It could be BIT0 ~ BIT7.
  207. *
  208. * @return None
  209. *
  210. * @details Enable I/O DOUT mask of specified GPIO pin.
  211. */
  212. #define GPIO_ENABLE_DOUT_MASK(port, u32PinMask) ((port)->DMASK &= ~u32PinMask)
  213. /**
  214. * @brief Get GPIO Pin Interrupt Flag
  215. *
  216. * @param[in] port GPIO port. It could be P0, P1, P2, P3 or P4.
  217. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  218. * It could be BIT0 ~ BIT7.
  219. *
  220. * @retval 0 No interrupt at specified GPIO pin
  221. * @retval 1 The specified GPIO pin generate an interrupt
  222. *
  223. * @details Get the interrupt status of specified GPIO pin.
  224. */
  225. #define GPIO_GET_INT_FLAG(port, u32PinMask) ((port)->ISRC & u32PinMask)
  226. /**
  227. * @brief Set De-bounce Sampling Cycle Time
  228. *
  229. * @param[in] clksrc The de-bounce counter clock source. It could be GPIO_DBCLKSRC_HCLK or GPIO_DBCLKSRC_LIRC.
  230. * @param[in] clksel The de-bounce sampling cycle selection. It could be \n
  231. * GPIO_DBCLKSEL_1, GPIO_DBCLKSEL_2, GPIO_DBCLKSEL_4, GPIO_DBCLKSEL_8, \n
  232. * GPIO_DBCLKSEL_16, GPIO_DBCLKSEL_32, GPIO_DBCLKSEL_64, GPIO_DBCLKSEL_128, \n
  233. * GPIO_DBCLKSEL_256, GPIO_DBCLKSEL_512, GPIO_DBCLKSEL_1024, GPIO_DBCLKSEL_2048, \n
  234. * GPIO_DBCLKSEL_4096, GPIO_DBCLKSEL_8192, GPIO_DBCLKSEL_16384, GPIO_DBCLKSEL_32768.
  235. *
  236. * @return None
  237. *
  238. * @details Set the interrupt de-bounce sampling cycle time based on the debounce counter clock source. \n
  239. * Example: _GPIO_SET_DEBOUNCE_TIME(GPIO_DBNCECON_DBCLKSRC_IRC10K, GPIO_DBNCECON_DBCLKSEL_4). \n
  240. * It's meaning the De-debounce counter clock source is internal 10 KHz and sampling cycle selection is 4. \n
  241. * Then the target de-bounce sampling cycle time is (2^4)*(1/(10*1000)) s = 16*0.0001 s = 1600 us,
  242. * and system will sampling interrupt input once per 1600 us.
  243. */
  244. #define GPIO_SET_DEBOUNCE_TIME(u32ClkSrc, u32ClkSel) (GPIO->DBNCECON = (GPIO_DBNCECON_ICLK_ON_Msk | u32ClkSrc | u32ClkSel))
  245. /**
  246. * @brief Get GPIO Port IN Data
  247. *
  248. * @param[in] port GPIO port. It could be P0, P1, P2, P3 or P4.
  249. *
  250. * @retval The specified port data
  251. *
  252. * @details Get the PIN register of specified GPIO port.
  253. */
  254. #define GPIO_GET_IN_DATA(port) ((port)->PIN)
  255. /**
  256. * @brief Set GPIO Port OUT Data
  257. *
  258. * @param[in] port GPIO port. It could be P0, P1, P2, P3 or P4.
  259. * @param[in] u32Data GPIO port data.
  260. *
  261. * @retval None
  262. *
  263. * @details Set the Data into specified GPIO port.
  264. */
  265. #define GPIO_SET_OUT_DATA(port, u32Data) ((port)->DOUT = (u32Data))
  266. /**
  267. * @brief Toggle Specified GPIO pin
  268. *
  269. * @param[in] u32Pin Pxy
  270. *
  271. * @retval None
  272. *
  273. * @details Toggle the specified GPIO pint.
  274. */
  275. #define GPIO_TOGGLE(u32Pin) ((u32Pin) ^= 1)
  276. /**
  277. * @brief Enable External GPIO Interrupt 0
  278. *
  279. * @param[in] port GPIO port. It could be P0, P1, P2, P3 or P4.
  280. * @param[in] u32Pin The pin of specified GPIO port. It could be 0 ~ 7.
  281. * @param[in] u32IntAttribs The interrupt attribute of specified GPIO pin. It could be \n
  282. * GPIO_INT_RISING, GPIO_INT_FALLING, GPIO_INT_BOTH_EDGE, GPIO_INT_HIGH, GPIO_INT_LOW.
  283. *
  284. * @return None
  285. *
  286. * @details This function is used to enable specified GPIO pin interrupt.
  287. */
  288. #define GPIO_EnableEINT0 GPIO_EnableInt
  289. /**
  290. * @brief Disable External GPIO Interrupt 0
  291. *
  292. * @param[in] port GPIO port. It could be P0, P1, P2, P3 or P4.
  293. * @param[in] u32Pin The pin of specified GPIO port. It could be 0 ~ 7.
  294. *
  295. * @return None
  296. *
  297. * @details This function is used to enable specified GPIO pin interrupt.
  298. */
  299. #define GPIO_DisableEINT0 GPIO_DisableInt
  300. /**
  301. * @brief Enable External GPIO Interrupt 1
  302. *
  303. * @param[in] port GPIO port. It could be P0, P1, P2, P3 or P4.
  304. * @param[in] u32Pin The pin of specified GPIO port. It could be 0 ~ 7.
  305. * @param[in] u32IntAttribs The interrupt attribute of specified GPIO pin. It could be \n
  306. * GPIO_INT_RISING, GPIO_INT_FALLING, GPIO_INT_BOTH_EDGE, GPIO_INT_HIGH, GPIO_INT_LOW.
  307. *
  308. * @return None
  309. *
  310. * @details This function is used to enable specified GPIO pin interrupt.
  311. */
  312. #define GPIO_EnableEINT1 GPIO_EnableInt
  313. /**
  314. * @brief Disable External GPIO Interrupt 1
  315. *
  316. * @param[in] port GPIO port. It could be P0, P1, P2, P3 or P4.
  317. * @param[in] u32Pin The pin of specified GPIO port. It could be 0 ~ 7.
  318. *
  319. * @return None
  320. *
  321. * @details This function is used to enable specified GPIO pin interrupt.
  322. */
  323. #define GPIO_DisableEINT1 GPIO_DisableInt
  324. void GPIO_SetMode(GPIO_T *port, uint32_t u32PinMask, uint32_t u32Mode);
  325. void GPIO_EnableInt(GPIO_T *port, uint32_t u32Pin, uint32_t u32IntAttribs);
  326. void GPIO_DisableInt(GPIO_T *port, uint32_t u32Pin);
  327. /*@}*/ /* end of group M051_GPIO_EXPORTED_FUNCTIONS */
  328. /*@}*/ /* end of group M051_GPIO_Driver */
  329. /*@}*/ /* end of group M051_Device_Driver */
  330. #ifdef __cplusplus
  331. }
  332. #endif
  333. #endif //__GPIO_H__
  334. /*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/