reg_system.h 5.4 KB

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  1. /** @file reg_system.h
  2. * @brief System Register Layer Header File
  3. * @date 29.May.2013
  4. * @version 03.05.02
  5. *
  6. * This file contains:
  7. * - Definitions
  8. * - Types
  9. * .
  10. * which are relevant for the System driver.
  11. */
  12. /* (c) Texas Instruments 2009-2013, All rights reserved. */
  13. #ifndef __REG_SYSTEM_H__
  14. #define __REG_SYSTEM_H__
  15. #include "sys_common.h"
  16. #include "gio.h"
  17. /* System Register Frame 1 Definition */
  18. /** @struct systemBase1
  19. * @brief System Register Frame 1 Definition
  20. *
  21. * This type is used to access the System 1 Registers.
  22. */
  23. /** @typedef systemBASE1_t
  24. * @brief System Register Frame 1 Type Definition
  25. *
  26. * This type is used to access the System 1 Registers.
  27. */
  28. typedef volatile struct systemBase1
  29. {
  30. uint32 SYSPC1; /* 0x0000 */
  31. uint32 SYSPC2; /* 0x0004 */
  32. uint32 SYSPC3; /* 0x0008 */
  33. uint32 SYSPC4; /* 0x000C */
  34. uint32 SYSPC5; /* 0x0010 */
  35. uint32 SYSPC6; /* 0x0014 */
  36. uint32 SYSPC7; /* 0x0018 */
  37. uint32 SYSPC8; /* 0x001C */
  38. uint32 SYSPC9; /* 0x0020 */
  39. uint32 SSWPLL1; /* 0x0024 */
  40. uint32 SSWPLL2; /* 0x0028 */
  41. uint32 SSWPLL3; /* 0x002C */
  42. uint32 CSDIS; /* 0x0030 */
  43. uint32 CSDISSET; /* 0x0034 */
  44. uint32 CSDISCLR; /* 0x0038 */
  45. uint32 CDDIS; /* 0x003C */
  46. uint32 CDDISSET; /* 0x0040 */
  47. uint32 CDDISCLR; /* 0x0044 */
  48. uint32 GHVSRC; /* 0x0048 */
  49. uint32 VCLKASRC; /* 0x004C */
  50. uint32 RCLKSRC; /* 0x0050 */
  51. uint32 CSVSTAT; /* 0x0054 */
  52. uint32 MSTGCR; /* 0x0058 */
  53. uint32 MINITGCR; /* 0x005C */
  54. uint32 MSINENA; /* 0x0060 */
  55. uint32 MSTFAIL; /* 0x0064 */
  56. uint32 MSTCGSTAT; /* 0x0068 */
  57. uint32 MINISTAT; /* 0x006C */
  58. uint32 PLLCTL1; /* 0x0070 */
  59. uint32 PLLCTL2; /* 0x0074 */
  60. uint32 UERFLAG; /* 0x0078 */
  61. uint32 DIEIDL; /* 0x007C */
  62. uint32 DIEIDH; /* 0x0080 */
  63. uint32 VRCTL; /* 0x0084 */
  64. uint32 LPOMONCTL; /* 0x0088 */
  65. uint32 CLKTEST; /* 0x008C */
  66. uint32 DFTCTRLREG1; /* 0x0090 */
  67. uint32 DFTCTRLREG2; /* 0x0094 */
  68. uint32 rsvd1; /* 0x0098 */
  69. uint32 rsvd2; /* 0x009C */
  70. uint32 GPREG1; /* 0x00A0 */
  71. uint32 BTRMSEL; /* 0x00A4 */
  72. uint32 IMPFASTS; /* 0x00A8 */
  73. uint32 IMPFTADD; /* 0x00AC */
  74. uint32 SSISR1; /* 0x00B0 */
  75. uint32 SSISR2; /* 0x00B4 */
  76. uint32 SSISR3; /* 0x00B8 */
  77. uint32 SSISR4; /* 0x00BC */
  78. uint32 RAMGCR; /* 0x00C0 */
  79. uint32 BMMCR1; /* 0x00C4 */
  80. uint32 BMMCR2; /* 0x00C8 */
  81. uint32 MMUGCR; /* 0x00CC */
  82. uint32 CLKCNTL; /* 0x00D0 */
  83. uint32 ECPCNTL; /* 0x00D4 */
  84. uint32 DSPGCR; /* 0x00D8 */
  85. uint32 DEVCR1; /* 0x00DC */
  86. uint32 SYSECR; /* 0x00E0 */
  87. uint32 SYSESR; /* 0x00E4 */
  88. uint32 SYSTASR; /* 0x00E8 */
  89. uint32 GBLSTAT; /* 0x00EC */
  90. uint32 DEV; /* 0x00F0 */
  91. uint32 SSIVEC; /* 0x00F4 */
  92. uint32 SSIF; /* 0x00F8 */
  93. uint32 SSIR1; /* 0x00FC */
  94. } systemBASE1_t;
  95. /** @def systemREG1
  96. * @brief System Register Frame 1 Pointer
  97. *
  98. * This pointer is used by the system driver to access the system frame 1 registers.
  99. */
  100. #define systemREG1 ((systemBASE1_t *)0xFFFFFF00U)
  101. /** @def systemPORT
  102. * @brief ECLK GIO Port Register Pointer
  103. *
  104. * Pointer used by the GIO driver to access I/O PORT of System/Eclk
  105. * (use the GIO drivers to access the port pins).
  106. */
  107. #define systemPORT ((gioPORT_t *)0xFFFFFF04U)
  108. /* USER CODE BEGIN (0) */
  109. /* USER CODE END */
  110. /* System Register Frame 2 Definition */
  111. /** @struct systemBase2
  112. * @brief System Register Frame 2 Definition
  113. *
  114. * This type is used to access the System 2 Registers.
  115. */
  116. /** @typedef systemBASE2_t
  117. * @brief System Register Frame 2 Type Definition
  118. *
  119. * This type is used to access the System 2 Registers.
  120. */
  121. typedef volatile struct systemBase2
  122. {
  123. uint32 PLLCTL3; /* 0x0000 */
  124. uint32 rsvd1; /* 0x0004 */
  125. uint32 STCCLKDIV; /* 0x0008 */
  126. uint32 rsvd2[6U]; /* 0x000C */
  127. uint32 ECPCNTRL0; /* 0x0024 */
  128. uint32 rsvd3[5U]; /* 0x0028 */
  129. uint32 CLK2CNTL; /* 0x003C */
  130. uint32 VCLKACON1; /* 0x0040 */
  131. uint32 rsvd4[11U]; /* 0x0044 */
  132. uint32 CLKSLIP; /* 0x0070 */
  133. uint32 rsvd5[30U]; /* 0x0074 */
  134. uint32 EFC_CTLEN; /* 0x00EC */
  135. uint32 DIEIDL_REG0; /* 0x00F0 */
  136. uint32 DIEIDH_REG1; /* 0x00F4 */
  137. uint32 DIEIDL_REG2; /* 0x00F8 */
  138. uint32 DIEIDH_REG3; /* 0x00FC */
  139. } systemBASE2_t;
  140. /** @def systemREG2
  141. * @brief System Register Frame 2 Pointer
  142. *
  143. * This pointer is used by the system driver to access the system frame 2 registers.
  144. */
  145. #define systemREG2 ((systemBASE2_t *)0xFFFFE100U)
  146. #endif