sys_core.h 9.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264
  1. /** @file sys_core.h
  2. * @brief System Core Header File
  3. * @date 29.May.2013
  4. * @version 03.05.02
  5. *
  6. * This file contains:
  7. * - Core Interface Functions
  8. * .
  9. * which are relevant for the System driver.
  10. */
  11. /* (c) Texas Instruments 2009-2013, All rights reserved. */
  12. #ifndef __SYS_CORE_H__
  13. #define __SYS_CORE_H__
  14. #include "sys_common.h"
  15. /* USER CODE BEGIN (0) */
  16. /* USER CODE END */
  17. /* System Core Interface Functions */
  18. /** @fn void _coreInitRegisters_(void)
  19. * @brief Initialize Core register
  20. */
  21. void _coreInitRegisters_(void);
  22. /** @fn void _coreInitStackPointer_(void)
  23. * @brief Initialize Core stack pointer
  24. */
  25. void _coreInitStackPointer_(void);
  26. /** @fn void _getCPSRValue_(void)
  27. * @brief Get CPSR Value
  28. */
  29. uint32 _getCPSRValue_(void);
  30. /** @fn void _gotoCPUIdle_(void)
  31. * @brief Take CPU to Idle state
  32. */
  33. void _gotoCPUIdle_(void);
  34. /** @fn void _coreEnableIrqVicOffset_(void)
  35. * @brief Enable Irq offset propagation via Vic controller
  36. */
  37. void _coreEnableIrqVicOffset_(void);
  38. /** @fn void _coreEnableVfp_(void)
  39. * @brief Enable vector floating point unit
  40. */
  41. void _coreEnableVfp_(void);
  42. /** @fn void _coreEnableEventBusExport_(void)
  43. * @brief Enable event bus export for external monitoring modules
  44. * @note It is required to enable event bus export to process ecc issues.
  45. *
  46. * This function enables event bus exports to external monitoring modules
  47. * like tightly coupled RAM wrapper, Flash wrapper and error signaling module.
  48. */
  49. void _coreEnableEventBusExport_(void);
  50. /** @fn void _coreDisableEventBusExport_(void)
  51. * @brief Disable event bus export for external monitoring modules
  52. *
  53. * This function disables event bus exports to external monitoring modules
  54. * like tightly coupled RAM wrapper, Flash wrapper and error signaling module.
  55. */
  56. void _coreDisableEventBusExport_(void);
  57. /** @fn void _coreEnableRamEcc_(void)
  58. * @brief Enable external ecc error for RAM odd and even bank
  59. * @note It is required to enable event bus export to process ecc issues.
  60. */
  61. void _coreEnableRamEcc_(void);
  62. /** @fn void _coreDisableRamEcc_(void)
  63. * @brief Disable external ecc error for RAM odd and even bank
  64. */
  65. void _coreDisableRamEcc_(void);
  66. /** @fn void _coreEnableFlashEcc_(void)
  67. * @brief Enable external ecc error for the Flash
  68. * @note It is required to enable event bus export to process ecc issues.
  69. */
  70. void _coreEnableFlashEcc_(void);
  71. /** @fn void _coreDisableFlashEcc_(void)
  72. * @brief Disable external ecc error for the Flash
  73. */
  74. void _coreDisableFlashEcc_(void);
  75. /** @fn uint32 _coreGetDataFault_(void)
  76. * @brief Get core data fault status register
  77. * @return The function will return the data fault status register value:
  78. * - bit [10,3..0]:
  79. * - 0b00001: Alignment -> address is valid
  80. * - 0b00000: Background -> address is valid
  81. * - 0b01101: Permission -> address is valid
  82. * - 0b01000: Precise External Abort -> address is valid
  83. * - 0b10110: Imprecise External Abort -> address is unpredictable
  84. * - 0b11001: Precise ECC Error -> address is valid
  85. * - 0b11000: Imprecise ECC Error -> address is unpredictable
  86. * - 0b00010: Debug -> address is unchanged
  87. * - bit [11]:
  88. * - 0: Read
  89. * - 1: Write
  90. * - bit [12]:
  91. * - 0: AXI Decode Error (DECERR)
  92. * - 1: AXI Slave Error (SLVERR)
  93. */
  94. uint32 _coreGetDataFault_(void);
  95. /** @fn void _coreClearDataFault_(void)
  96. * @brief Clear core data fault status register
  97. */
  98. void _coreClearDataFault_(void);
  99. /** @fn uint32 _coreGetInstructionFault_(void)
  100. * @brief Get core instruction fault status register
  101. * @return The function will return the instruction fault status register value:
  102. * - bit [10,3..0]:
  103. * - 0b00001: Alignment -> address is valid
  104. * - 0b00000: Background -> address is valid
  105. * - 0b01101: Permission -> address is valid
  106. * - 0b01000: Precise External Abort -> address is valid
  107. * - 0b10110: Imprecise External Abort -> address is unpredictable
  108. * - 0b11001: Precise ECC Error -> address is valid
  109. * - 0b11000: Imprecise ECC Error -> address is unpredictable
  110. * - 0b00010: Debug -> address is unchanged
  111. * - bit [12]:
  112. * - 0: AXI Decode Error (DECERR)
  113. * - 1: AXI Slave Error (SLVERR)
  114. */
  115. uint32 _coreGetInstructionFault_(void);
  116. /** @fn void _coreClearInstructionFault_(void)
  117. * @brief Clear core instruction fault status register
  118. */
  119. void _coreClearInstructionFault_(void);
  120. /** @fn uint32 _coreGetDataFaultAddress_(void)
  121. * @brief Get core data fault address register
  122. * @return The function will return the data fault address:
  123. */
  124. uint32 _coreGetDataFaultAddress_(void);
  125. /** @fn void _coreClearDataFaultAddress_(void)
  126. * @brief Clear core data fault address register
  127. */
  128. void _coreClearDataFaultAddress_(void);
  129. /** @fn uint32 _coreGetInstructionFaultAddress_(void)
  130. * @brief Get core instruction fault address register
  131. * @return The function will return the instruction fault address:
  132. */
  133. uint32 _coreGetInstructionFaultAddress_(void);
  134. /** @fn void _coreClearInstructionFaultAddress_(void)
  135. * @brief Clear core instruction fault address register
  136. */
  137. void _coreClearInstructionFaultAddress_(void);
  138. /** @fn uint32 _coreGetAuxiliaryDataFault_(void)
  139. * @brief Get core auxiliary data fault status register
  140. * @return The function will return the auxiliary data fault status register value:
  141. * - bit [13..5]:
  142. * - Index value for access giving error
  143. * - bit [21]:
  144. * - 0: Unrecoverable error
  145. * - 1: Recoverable error
  146. * - bit [23..22]:
  147. * - 0: Side cache
  148. * - 1: Side ATCM (Flash)
  149. * - 2: Side BTCM (RAM)
  150. * - 3: Reserved
  151. * - bit [27..24]:
  152. * - Cache way or way in which error occurred
  153. */
  154. uint32 _coreGetAuxiliaryDataFault_(void);
  155. /** @fn void _coreClearAuxiliaryDataFault_(void)
  156. * @brief Clear core auxiliary data fault status register
  157. */
  158. void _coreClearAuxiliaryDataFault_(void);
  159. /** @fn uint32 _coreGetAuxiliaryInstructionFault_(void)
  160. * @brief Get core auxiliary instruction fault status register
  161. * @return The function will return the auxiliary instruction fault status register value:
  162. * - bit [13..5]:
  163. * - Index value for access giving error
  164. * - bit [21]:
  165. * - 0: Unrecoverable error
  166. * - 1: Recoverable error
  167. * - bit [23..22]:
  168. * - 0: Side cache
  169. * - 1: Side ATCM (Flash)
  170. * - 2: Side BTCM (RAM)
  171. * - 3: Reserved
  172. * - bit [27..24]:
  173. * - Cache way or way in which error occurred
  174. */
  175. uint32 _coreGetAuxiliaryInstructionFault_(void);
  176. /** @fn void _coreClearAuxiliaryInstructionFault_(void)
  177. * @brief Clear core auxiliary instruction fault status register
  178. */
  179. void _coreClearAuxiliaryInstructionFault_(void);
  180. /** @fn void _disable_interrupt_(void)
  181. * @brief Disable IRQ and FIQ Interrupt mode in CPSR register
  182. *
  183. * This function disables IRQ and FIQ Interrupt mode in CPSR register.
  184. */
  185. void _disable_interrupt_(void);
  186. /** @fn void _disable_IRQ_interrupt_(void)
  187. * @brief Disable IRQ Interrupt mode in CPSR register
  188. *
  189. * This function disables IRQ Interrupt mode in CPSR register.
  190. */
  191. void _disable_IRQ_interrupt_(void);
  192. /** @fn void _disable_FIQ_interrupt_(void)
  193. * @brief Disable FIQ Interrupt mode in CPSR register
  194. *
  195. * This function disables IRQ Interrupt mode in CPSR register.
  196. */
  197. void _disable_FIQ_interrupt_(void);
  198. /** @fn void _enable_interrupt_(void)
  199. * @brief Enable IRQ and FIQ Interrupt mode in CPSR register
  200. *
  201. * This function Enables IRQ and FIQ Interrupt mode in CPSR register.
  202. * User must call this function to enable Interrupts in non-OS environments.
  203. */
  204. void _enable_interrupt_(void);
  205. /** @fn void _esmCcmErrorsClear_(void)
  206. * @brief Clears ESM Error caused due to CCM Errata in RevA Silicon
  207. *
  208. * This function Clears ESM Error caused due to CCM Errata
  209. * in RevA Silicon immediately after powerup.
  210. */
  211. void _esmCcmErrorsClear_(void);
  212. /** @fn void _errata_CORTEXR4_66_(void)
  213. * @brief Work Around for Errata CORTEX-R4#66
  214. *
  215. * This function Disable out-of-order completion for divide
  216. * instructions in Auxiliary Control register.
  217. */
  218. void _errata_CORTEXR4_66_(void);
  219. /** @fn void _errata_CORTEXR4_57_(void)
  220. * @brief Work Around for Errata CORTEX-R4#57
  221. *
  222. * Disable out-of-order single-precision floating point
  223. * multiply-accumulate instruction completion.
  224. */
  225. void _errata_CORTEXR4_57_(void);
  226. #endif