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stm32f1xx_hal_pcd.h 34 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_hal_pcd.h
  4. * @author MCD Application Team
  5. * @version V1.1.1
  6. * @date 12-May-2017
  7. * @brief Header file of PCD HAL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32F1xx_HAL_PCD_H
  39. #define __STM32F1xx_HAL_PCD_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. #if defined(STM32F102x6) || defined(STM32F102xB) || \
  44. defined(STM32F103x6) || defined(STM32F103xB) || \
  45. defined(STM32F103xE) || defined(STM32F103xG) || \
  46. defined(STM32F105xC) || defined(STM32F107xC)
  47. /* Includes ------------------------------------------------------------------*/
  48. #include "stm32f1xx_ll_usb.h"
  49. /** @addtogroup STM32F1xx_HAL_Driver
  50. * @{
  51. */
  52. /** @addtogroup PCD
  53. * @{
  54. */
  55. /* Exported types ------------------------------------------------------------*/
  56. /** @defgroup PCD_Exported_Types PCD Exported Types
  57. * @{
  58. */
  59. /**
  60. * @brief PCD State structure definition
  61. */
  62. typedef enum
  63. {
  64. HAL_PCD_STATE_RESET = 0x00U,
  65. HAL_PCD_STATE_READY = 0x01U,
  66. HAL_PCD_STATE_ERROR = 0x02U,
  67. HAL_PCD_STATE_BUSY = 0x03U,
  68. HAL_PCD_STATE_TIMEOUT = 0x04U
  69. } PCD_StateTypeDef;
  70. #if defined (USB)
  71. /**
  72. * @brief PCD double buffered endpoint direction
  73. */
  74. typedef enum
  75. {
  76. PCD_EP_DBUF_OUT,
  77. PCD_EP_DBUF_IN,
  78. PCD_EP_DBUF_ERR,
  79. }PCD_EP_DBUF_DIR;
  80. /**
  81. * @brief PCD endpoint buffer number
  82. */
  83. typedef enum
  84. {
  85. PCD_EP_NOBUF,
  86. PCD_EP_BUF0,
  87. PCD_EP_BUF1
  88. }PCD_EP_BUF_NUM;
  89. #endif /* USB */
  90. #if defined (USB_OTG_FS)
  91. typedef USB_OTG_GlobalTypeDef PCD_TypeDef;
  92. typedef USB_OTG_CfgTypeDef PCD_InitTypeDef;
  93. typedef USB_OTG_EPTypeDef PCD_EPTypeDef;
  94. #endif /* USB_OTG_FS */
  95. #if defined (USB)
  96. typedef USB_TypeDef PCD_TypeDef;
  97. typedef USB_CfgTypeDef PCD_InitTypeDef;
  98. typedef USB_EPTypeDef PCD_EPTypeDef;
  99. #endif /* USB */
  100. /**
  101. * @brief PCD Handle Structure definition
  102. */
  103. typedef struct
  104. {
  105. PCD_TypeDef *Instance; /*!< Register base address */
  106. PCD_InitTypeDef Init; /*!< PCD required parameters */
  107. __IO uint8_t USB_Address; /*!< USB Address: not used by USB OTG FS */
  108. PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */
  109. PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */
  110. HAL_LockTypeDef Lock; /*!< PCD peripheral status */
  111. __IO PCD_StateTypeDef State; /*!< PCD communication state */
  112. uint32_t Setup[12U]; /*!< Setup packet buffer */
  113. void *pData; /*!< Pointer to upper stack Handler */
  114. } PCD_HandleTypeDef;
  115. /**
  116. * @}
  117. */
  118. /* Include PCD HAL Extension module */
  119. #include "stm32f1xx_hal_pcd_ex.h"
  120. /* Exported constants --------------------------------------------------------*/
  121. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  122. * @{
  123. */
  124. /** @defgroup PCD_Speed PCD Speed
  125. * @{
  126. */
  127. #define PCD_SPEED_HIGH 0U /* Not Supported */
  128. #define PCD_SPEED_HIGH_IN_FULL 1U /* Not Supported */
  129. #define PCD_SPEED_FULL 2U
  130. /**
  131. * @}
  132. */
  133. /** @defgroup PCD_PHY_Module PCD PHY Module
  134. * @{
  135. */
  136. #define PCD_PHY_EMBEDDED 2U
  137. /**
  138. * @}
  139. */
  140. /** @defgroup PCD_Turnaround_Timeout Turnaround Timeout Value
  141. * @{
  142. */
  143. #ifndef USBD_FS_TRDT_VALUE
  144. #define USBD_FS_TRDT_VALUE 5U
  145. #endif /* USBD_FS_TRDT_VALUE */
  146. /**
  147. * @}
  148. */
  149. /**
  150. * @}
  151. */
  152. /* Exported macros -----------------------------------------------------------*/
  153. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  154. * @brief macros to handle interrupts and specific clock configurations
  155. * @{
  156. */
  157. #if defined (USB_OTG_FS)
  158. #define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance)
  159. #define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
  160. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  161. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) = (__INTERRUPT__))
  162. #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
  163. #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \
  164. ~(USB_OTG_PCGCCTL_STOPCLK)
  165. #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
  166. #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U)
  167. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE
  168. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
  169. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE)
  170. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
  171. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
  172. do{ \
  173. EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
  174. EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \
  175. } while(0U)
  176. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() \
  177. do{ \
  178. EXTI->FTSR |= (USB_OTG_FS_WAKEUP_EXTI_LINE); \
  179. EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
  180. } while(0U)
  181. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() \
  182. do{ \
  183. EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
  184. EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
  185. EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \
  186. EXTI->FTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \
  187. } while(0U)
  188. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER |= USB_OTG_FS_WAKEUP_EXTI_LINE)
  189. #endif /* USB_OTG_FS */
  190. #if defined (USB)
  191. #define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance)
  192. #define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
  193. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  194. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
  195. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE
  196. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
  197. #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE)
  198. #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE
  199. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
  200. do{ \
  201. EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  202. EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
  203. } while(0U)
  204. #define __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE() \
  205. do{ \
  206. EXTI->FTSR |= (USB_WAKEUP_EXTI_LINE); \
  207. EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  208. } while(0U)
  209. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() \
  210. do{ \
  211. EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  212. EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  213. EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
  214. EXTI->FTSR |= USB_WAKEUP_EXTI_LINE; \
  215. } while(0U)
  216. #endif /* USB */
  217. /**
  218. * @}
  219. */
  220. /* Exported functions --------------------------------------------------------*/
  221. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  222. * @{
  223. */
  224. /* Initialization/de-initialization functions ********************************/
  225. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  226. * @{
  227. */
  228. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  229. HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
  230. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  231. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  232. /**
  233. * @}
  234. */
  235. /* I/O operation functions ***************************************************/
  236. /* Non-Blocking mode: Interrupt */
  237. /** @addtogroup PCD_Exported_Functions_Group2 IO operation functions
  238. * @{
  239. */
  240. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  241. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  242. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  243. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  244. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  245. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  246. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  247. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  248. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  249. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  250. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  251. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  252. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  253. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  254. /**
  255. * @}
  256. */
  257. /* Peripheral Control functions **********************************************/
  258. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  259. * @{
  260. */
  261. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  262. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  263. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  264. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
  265. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  266. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  267. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  268. uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  269. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  270. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  271. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  272. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  273. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  274. /**
  275. * @}
  276. */
  277. /* Peripheral State functions ************************************************/
  278. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  279. * @{
  280. */
  281. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
  282. /**
  283. * @}
  284. */
  285. /**
  286. * @}
  287. */
  288. /* Private constants ---------------------------------------------------------*/
  289. /** @defgroup PCD_Private_Constants PCD Private Constants
  290. * @{
  291. */
  292. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  293. * @{
  294. */
  295. #if defined (USB_OTG_FS)
  296. #define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE 0x08U
  297. #define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE 0x0CU
  298. #define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE 0x10U
  299. #define USB_OTG_FS_WAKEUP_EXTI_LINE 0x00040000U /*!< External interrupt line 18 Connected to the USB EXTI Line */
  300. #endif /* USB_OTG_FS */
  301. #if defined (USB)
  302. #define USB_WAKEUP_EXTI_LINE 0x00040000U /*!< External interrupt line 18 Connected to the USB EXTI Line */
  303. #endif /* USB */
  304. /**
  305. * @}
  306. */
  307. #if defined (USB)
  308. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  309. * @{
  310. */
  311. #define PCD_EP0MPS_64 DEP0CTL_MPS_64
  312. #define PCD_EP0MPS_32 DEP0CTL_MPS_32
  313. #define PCD_EP0MPS_16 DEP0CTL_MPS_16
  314. #define PCD_EP0MPS_08 DEP0CTL_MPS_8
  315. /**
  316. * @}
  317. */
  318. /** @defgroup PCD_ENDP PCD ENDP
  319. * @{
  320. */
  321. #define PCD_ENDP0 ((uint8_t)0)
  322. #define PCD_ENDP1 ((uint8_t)1)
  323. #define PCD_ENDP2 ((uint8_t)2)
  324. #define PCD_ENDP3 ((uint8_t)3)
  325. #define PCD_ENDP4 ((uint8_t)4)
  326. #define PCD_ENDP5 ((uint8_t)5)
  327. #define PCD_ENDP6 ((uint8_t)6)
  328. #define PCD_ENDP7 ((uint8_t)7)
  329. /**
  330. * @}
  331. */
  332. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  333. * @{
  334. */
  335. #define PCD_SNG_BUF 0U
  336. #define PCD_DBL_BUF 1U
  337. /**
  338. * @}
  339. */
  340. #endif /* USB */
  341. /**
  342. * @}
  343. */
  344. /* Private macros ------------------------------------------------------------*/
  345. /** @addtogroup PCD_Private_Macros PCD Private Macros
  346. * @{
  347. */
  348. #if defined (USB)
  349. /* SetENDPOINT */
  350. #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*(&(USBx)->EP0R + (bEpNum) * 2U)= (uint16_t)(wRegValue))
  351. /* GetENDPOINT */
  352. #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(&(USBx)->EP0R + (bEpNum) * 2U))
  353. /* ENDPOINT transfer */
  354. #define USB_EP0StartXfer USB_EPStartXfer
  355. /**
  356. * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
  357. * @param USBx: USB peripheral instance register address.
  358. * @param bEpNum: Endpoint Number.
  359. * @param wType: Endpoint Type.
  360. * @retval None
  361. */
  362. #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  363. ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) )))
  364. /**
  365. * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
  366. * @param USBx: USB peripheral instance register address.
  367. * @param bEpNum: Endpoint Number.
  368. * @retval Endpoint Type
  369. */
  370. #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
  371. /**
  372. * @brief free buffer used from the application realizing it to the line
  373. toggles bit SW_BUF in the double buffered endpoint register
  374. * @param USBx: USB peripheral instance register address.
  375. * @param bEpNum: Endpoint Number.
  376. * @param bDir: Direction
  377. * @retval None
  378. */
  379. #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
  380. {\
  381. if ((bDir) == PCD_EP_DBUF_OUT)\
  382. { /* OUT double buffered endpoint */\
  383. PCD_TX_DTOG((USBx), (bEpNum));\
  384. }\
  385. else if ((bDir) == PCD_EP_DBUF_IN)\
  386. { /* IN double buffered endpoint */\
  387. PCD_RX_DTOG((USBx), (bEpNum));\
  388. }\
  389. }
  390. /**
  391. * @brief gets direction of the double buffered endpoint
  392. * @param USBx: USB peripheral instance register address.
  393. * @param bEpNum: Endpoint Number.
  394. * @retval EP_DBUF_OUT, EP_DBUF_IN,
  395. * EP_DBUF_ERR if the endpoint counter not yet programmed.
  396. */
  397. #define PCD_GET_DB_DIR(USBx, bEpNum)\
  398. {\
  399. if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00) != 0)\
  400. return(PCD_EP_DBUF_OUT);\
  401. else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FF) != 0)\
  402. return(PCD_EP_DBUF_IN);\
  403. else\
  404. return(PCD_EP_DBUF_ERR);\
  405. }
  406. /**
  407. * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
  408. * @param USBx: USB peripheral instance register address.
  409. * @param bEpNum: Endpoint Number.
  410. * @param wState: new state
  411. * @retval None
  412. */
  413. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\
  414. \
  415. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK;\
  416. /* toggle first bit ? */ \
  417. if((USB_EPTX_DTOG1 & (wState))!= 0U)\
  418. { \
  419. _wRegVal ^= USB_EPTX_DTOG1; \
  420. } \
  421. /* toggle second bit ? */ \
  422. if((USB_EPTX_DTOG2 & (wState))!= 0U) \
  423. { \
  424. _wRegVal ^= USB_EPTX_DTOG2; \
  425. } \
  426. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX));\
  427. } /* PCD_SET_EP_TX_STATUS */
  428. /**
  429. * @brief sets the status for rx transfer (bits STAT_TX[1:0])
  430. * @param USBx: USB peripheral instance register address.
  431. * @param bEpNum: Endpoint Number.
  432. * @param wState: new state
  433. * @retval None
  434. */
  435. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
  436. register uint16_t _wRegVal; \
  437. \
  438. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK;\
  439. /* toggle first bit ? */ \
  440. if((USB_EPRX_DTOG1 & (wState))!= 0U) \
  441. { \
  442. _wRegVal ^= USB_EPRX_DTOG1; \
  443. } \
  444. /* toggle second bit ? */ \
  445. if((USB_EPRX_DTOG2 & (wState))!= 0U) \
  446. { \
  447. _wRegVal ^= USB_EPRX_DTOG2; \
  448. } \
  449. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
  450. } /* PCD_SET_EP_RX_STATUS */
  451. /**
  452. * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  453. * @param USBx: USB peripheral instance register address.
  454. * @param bEpNum: Endpoint Number.
  455. * @param wStaterx: new state.
  456. * @param wStatetx: new state.
  457. * @retval None
  458. */
  459. #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\
  460. register uint32_t _wRegVal; \
  461. \
  462. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\
  463. /* toggle first bit ? */ \
  464. if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0U) \
  465. { \
  466. _wRegVal ^= USB_EPRX_DTOG1; \
  467. } \
  468. /* toggle second bit ? */ \
  469. if((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
  470. { \
  471. _wRegVal ^= USB_EPRX_DTOG2; \
  472. } \
  473. /* toggle first bit ? */ \
  474. if((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
  475. { \
  476. _wRegVal ^= USB_EPTX_DTOG1; \
  477. } \
  478. /* toggle second bit ? */ \
  479. if((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
  480. { \
  481. _wRegVal ^= USB_EPTX_DTOG2; \
  482. } \
  483. PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \
  484. } /* PCD_SET_EP_TXRX_STATUS */
  485. /**
  486. * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
  487. * /STAT_RX[1:0])
  488. * @param USBx: USB peripheral instance register address.
  489. * @param bEpNum: Endpoint Number.
  490. * @retval status
  491. */
  492. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
  493. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
  494. /**
  495. * @brief sets directly the VALID tx/rx-status into the endpoint register
  496. * @param USBx: USB peripheral instance register address.
  497. * @param bEpNum: Endpoint Number.
  498. * @retval None
  499. */
  500. #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  501. #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  502. /**
  503. * @brief checks stall condition in an endpoint.
  504. * @param USBx: USB peripheral instance register address.
  505. * @param bEpNum: Endpoint Number.
  506. * @retval TRUE = endpoint in stall condition.
  507. */
  508. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
  509. == USB_EP_TX_STALL)
  510. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
  511. == USB_EP_RX_STALL)
  512. /**
  513. * @brief set & clear EP_KIND bit.
  514. * @param USBx: USB peripheral instance register address.
  515. * @param bEpNum: Endpoint Number.
  516. * @retval None
  517. */
  518. #define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  519. (USB_EP_CTR_RX|USB_EP_CTR_TX|((PCD_GET_ENDPOINT((USBx), (bEpNum)) | USB_EP_KIND) & USB_EPREG_MASK))))
  520. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  521. (USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK))))
  522. /**
  523. * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
  524. * @param USBx: USB peripheral instance register address.
  525. * @param bEpNum: Endpoint Number.
  526. * @retval None
  527. */
  528. #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  529. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  530. /**
  531. * @brief Sets/clears directly EP_KIND bit in the endpoint register.
  532. * @param USBx: USB peripheral instance register address.
  533. * @param bEpNum: Endpoint Number.
  534. * @retval None
  535. */
  536. #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  537. #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  538. /**
  539. * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
  540. * @param USBx: USB peripheral instance register address.
  541. * @param bEpNum: Endpoint Number.
  542. * @retval None
  543. */
  544. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  545. PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFFU & USB_EPREG_MASK))
  546. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  547. PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7FU & USB_EPREG_MASK))
  548. /**
  549. * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  550. * @param USBx: USB peripheral instance register address.
  551. * @param bEpNum: Endpoint Number.
  552. * @retval None
  553. */
  554. #define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  555. USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
  556. #define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  557. USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
  558. /**
  559. * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  560. * @param USBx: USB peripheral instance register address.
  561. * @param bEpNum: Endpoint Number.
  562. * @retval None
  563. */
  564. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_RX) != 0U)\
  565. { \
  566. PCD_RX_DTOG((USBx), (bEpNum)); \
  567. }
  568. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_TX) != 0U)\
  569. { \
  570. PCD_TX_DTOG((USBx), (bEpNum)); \
  571. }
  572. /**
  573. * @brief Sets address in an endpoint register.
  574. * @param USBx: USB peripheral instance register address.
  575. * @param bEpNum: Endpoint Number.
  576. * @param bAddr: Address.
  577. * @retval None
  578. */
  579. #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\
  580. USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr))
  581. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  582. #define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8U)*2U+ ((uint32_t)(USBx) + 0x400U)))
  583. #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8U+2U)*2U+ ((uint32_t)(USBx) + 0x400U)))
  584. #define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8U+4U)*2U+ ((uint32_t)(USBx) + 0x400U)))
  585. #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8U+6U)*2U+ ((uint32_t)(USBx) + 0x400U)))
  586. #define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\
  587. uint32_t *pdwReg = PCD_EP_RX_CNT((USBx), (bEpNum)); \
  588. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
  589. }
  590. /**
  591. * @brief sets address of the tx/rx buffer.
  592. * @param USBx: USB peripheral instance register address.
  593. * @param bEpNum: Endpoint Number.
  594. * @param wAddr: address to be set (must be word aligned).
  595. * @retval None
  596. */
  597. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U))
  598. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U))
  599. /**
  600. * @brief Gets address of the tx/rx buffer.
  601. * @param USBx: USB peripheral instance register address.
  602. * @param bEpNum: Endpoint Number.
  603. * @retval address of the buffer.
  604. */
  605. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  606. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  607. /**
  608. * @brief Sets counter of rx buffer with no. of blocks.
  609. * @param dwReg: Register
  610. * @param wCount: Counter.
  611. * @param wNBlocks: no. of Blocks.
  612. * @retval None
  613. */
  614. #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
  615. (wNBlocks) = (wCount) >> 5U;\
  616. if(((wCount) & 0x1FU) == 0U)\
  617. { \
  618. (wNBlocks)--;\
  619. } \
  620. *pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10U) | 0x8000U); \
  621. }/* PCD_CALC_BLK32 */
  622. #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
  623. (wNBlocks) = (wCount) >> 1U;\
  624. if(((wCount) & 0x01U) != 0U)\
  625. { \
  626. (wNBlocks)++;\
  627. } \
  628. *pdwReg = (uint16_t)((wNBlocks) << 10U);\
  629. }/* PCD_CALC_BLK2 */
  630. #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\
  631. uint16_t wNBlocks;\
  632. if((wCount) > 62U) \
  633. { \
  634. PCD_CALC_BLK32((dwReg),(wCount),wNBlocks); \
  635. } \
  636. else \
  637. { \
  638. PCD_CALC_BLK2((dwReg),(wCount),wNBlocks); \
  639. } \
  640. }/* PCD_SET_EP_CNT_RX_REG */
  641. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\
  642. uint32_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \
  643. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
  644. }
  645. /**
  646. * @brief sets counter for the tx/rx buffer.
  647. * @param USBx: USB peripheral instance register address.
  648. * @param bEpNum: Endpoint Number.
  649. * @param wCount: Counter value.
  650. * @retval None
  651. */
  652. #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount))
  653. /**
  654. * @brief gets counter of the tx buffer.
  655. * @param USBx: USB peripheral instance register address.
  656. * @param bEpNum: Endpoint Number.
  657. * @retval Counter value
  658. */
  659. #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3FFU)
  660. #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3FFU)
  661. /**
  662. * @brief Sets buffer 0/1 address in a double buffer endpoint.
  663. * @param USBx: USB peripheral instance register address.
  664. * @param bEpNum: Endpoint Number.
  665. * @param wBuf0Addr: buffer 0 address.
  666. * @retval Counter value
  667. */
  668. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr));}
  669. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr));}
  670. /**
  671. * @brief Sets addresses in a double buffer endpoint.
  672. * @param USBx: USB peripheral instance register address.
  673. * @param bEpNum: Endpoint Number.
  674. * @param wBuf0Addr: buffer 0 address.
  675. * @param wBuf1Addr = buffer 1 address.
  676. * @retval None
  677. */
  678. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
  679. PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\
  680. PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\
  681. } /* PCD_SET_EP_DBUF_ADDR */
  682. /**
  683. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  684. * @param USBx: USB peripheral instance register address.
  685. * @param bEpNum: Endpoint Number.
  686. * @retval None
  687. */
  688. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  689. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  690. /**
  691. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  692. * @param USBx: USB peripheral instance register address.
  693. * @param bEpNum: Endpoint Number.
  694. * @param bDir: endpoint dir EP_DBUF_OUT = OUT
  695. * EP_DBUF_IN = IN
  696. * @param wCount: Counter value
  697. * @retval None
  698. */
  699. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \
  700. if((bDir) == PCD_EP_DBUF_OUT)\
  701. /* OUT endpoint */ \
  702. {PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount));} \
  703. else if((bDir) == PCD_EP_DBUF_IN)\
  704. /* IN endpoint */ \
  705. *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
  706. } /* SetEPDblBuf0Count*/
  707. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \
  708. if((bDir) == PCD_EP_DBUF_OUT)\
  709. {/* OUT endpoint */ \
  710. PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)); \
  711. } \
  712. else if((bDir) == PCD_EP_DBUF_IN)\
  713. {/* IN endpoint */ \
  714. *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
  715. } \
  716. } /* SetEPDblBuf1Count */
  717. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\
  718. PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  719. PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  720. } /* PCD_SET_EP_DBUF_CNT */
  721. /**
  722. * @brief Gets buffer 0/1 rx/tx counter for double buffering.
  723. * @param USBx: USB peripheral instance register address.
  724. * @param bEpNum: Endpoint Number.
  725. * @retval None
  726. */
  727. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  728. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  729. #endif /* USB */
  730. /** @defgroup PCD_Instance_definition PCD Instance definition
  731. * @{
  732. */
  733. #define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE
  734. /**
  735. * @}
  736. */
  737. /**
  738. * @}
  739. */
  740. /**
  741. * @}
  742. */
  743. /**
  744. * @}
  745. */
  746. #endif /* STM32F102x6 || STM32F102xB || */
  747. /* STM32F103x6 || STM32F103xB || */
  748. /* STM32F103xE || STM32F103xG || */
  749. /* STM32F105xC || STM32F107xC */
  750. #ifdef __cplusplus
  751. }
  752. #endif
  753. #endif /* __STM32F1xx_HAL_PCD_H */
  754. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/