stm32f7xx_hal_dfsdm.c 103 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f7xx_hal_dfsdm.c
  4. * @author MCD Application Team
  5. * @brief This file provides firmware functions to manage the following
  6. * functionalities of the Digital Filter for Sigma-Delta Modulators
  7. * (DFSDM) peripherals:
  8. * + Initialization and configuration of channels and filters
  9. * + Regular channels configuration
  10. * + Injected channels configuration
  11. * + Regular/Injected Channels DMA Configuration
  12. * + Interrupts and flags management
  13. * + Analog watchdog feature
  14. * + Short-circuit detector feature
  15. * + Extremes detector feature
  16. * + Clock absence detector feature
  17. * + Break generation on analog watchdog or short-circuit event
  18. *
  19. @verbatim
  20. ==============================================================================
  21. ##### How to use this driver #####
  22. ==============================================================================
  23. [..]
  24. *** Channel initialization ***
  25. ==============================
  26. [..]
  27. (#) User has first to initialize channels (before filters initialization).
  28. (#) As prerequisite, fill in the HAL_DFSDM_ChannelMspInit() :
  29. (++) Enable DFSDMz clock interface with __HAL_RCC_DFSDMz_CLK_ENABLE().
  30. (++) Enable the clocks for the DFSDMz GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().
  31. (++) Configure these DFSDMz pins in alternate mode using HAL_GPIO_Init().
  32. (++) If interrupt mode is used, enable and configure DFSDMz_FLT0 global
  33. interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
  34. (#) Configure the output clock, input, serial interface, analog watchdog,
  35. offset and data right bit shift parameters for this channel using the
  36. HAL_DFSDM_ChannelInit() function.
  37. *** Channel clock absence detector ***
  38. ======================================
  39. [..]
  40. (#) Start clock absence detector using HAL_DFSDM_ChannelCkabStart() or
  41. HAL_DFSDM_ChannelCkabStart_IT().
  42. (#) In polling mode, use HAL_DFSDM_ChannelPollForCkab() to detect the clock
  43. absence.
  44. (#) In interrupt mode, HAL_DFSDM_ChannelCkabCallback() will be called if
  45. clock absence is detected.
  46. (#) Stop clock absence detector using HAL_DFSDM_ChannelCkabStop() or
  47. HAL_DFSDM_ChannelCkabStop_IT().
  48. (#) Please note that the same mode (polling or interrupt) has to be used
  49. for all channels because the channels are sharing the same interrupt.
  50. (#) Please note also that in interrupt mode, if clock absence detector is
  51. stopped for one channel, interrupt will be disabled for all channels.
  52. *** Channel short circuit detector ***
  53. ======================================
  54. [..]
  55. (#) Start short circuit detector using HAL_DFSDM_ChannelScdStart() or
  56. or HAL_DFSDM_ChannelScdStart_IT().
  57. (#) In polling mode, use HAL_DFSDM_ChannelPollForScd() to detect short
  58. circuit.
  59. (#) In interrupt mode, HAL_DFSDM_ChannelScdCallback() will be called if
  60. short circuit is detected.
  61. (#) Stop short circuit detector using HAL_DFSDM_ChannelScdStop() or
  62. or HAL_DFSDM_ChannelScdStop_IT().
  63. (#) Please note that the same mode (polling or interrupt) has to be used
  64. for all channels because the channels are sharing the same interrupt.
  65. (#) Please note also that in interrupt mode, if short circuit detector is
  66. stopped for one channel, interrupt will be disabled for all channels.
  67. *** Channel analog watchdog value ***
  68. =====================================
  69. [..]
  70. (#) Get analog watchdog filter value of a channel using
  71. HAL_DFSDM_ChannelGetAwdValue().
  72. *** Channel offset value ***
  73. =====================================
  74. [..]
  75. (#) Modify offset value of a channel using HAL_DFSDM_ChannelModifyOffset().
  76. *** Filter initialization ***
  77. =============================
  78. [..]
  79. (#) After channel initialization, user has to init filters.
  80. (#) As prerequisite, fill in the HAL_DFSDM_FilterMspInit() :
  81. (++) If interrupt mode is used , enable and configure DFSDMz_FLTx global
  82. interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
  83. Please note that DFSDMz_FLT0 global interrupt could be already
  84. enabled if interrupt is used for channel.
  85. (++) If DMA mode is used, configure DMA with HAL_DMA_Init() and link it
  86. with DFSDMz filter handle using __HAL_LINKDMA().
  87. (#) Configure the regular conversion, injected conversion and filter
  88. parameters for this filter using the HAL_DFSDM_FilterInit() function.
  89. *** Filter regular channel conversion ***
  90. =========================================
  91. [..]
  92. (#) Select regular channel and enable/disable continuous mode using
  93. HAL_DFSDM_FilterConfigRegChannel().
  94. (#) Start regular conversion using HAL_DFSDM_FilterRegularStart(),
  95. HAL_DFSDM_FilterRegularStart_IT(), HAL_DFSDM_FilterRegularStart_DMA() or
  96. HAL_DFSDM_FilterRegularMsbStart_DMA().
  97. (#) In polling mode, use HAL_DFSDM_FilterPollForRegConversion() to detect
  98. the end of regular conversion.
  99. (#) In interrupt mode, HAL_DFSDM_FilterRegConvCpltCallback() will be called
  100. at the end of regular conversion.
  101. (#) Get value of regular conversion and corresponding channel using
  102. HAL_DFSDM_FilterGetRegularValue().
  103. (#) In DMA mode, HAL_DFSDM_FilterRegConvHalfCpltCallback() and
  104. HAL_DFSDM_FilterRegConvCpltCallback() will be called respectively at the
  105. half transfer and at the transfer complete. Please note that
  106. HAL_DFSDM_FilterRegConvHalfCpltCallback() will be called only in DMA
  107. circular mode.
  108. (#) Stop regular conversion using HAL_DFSDM_FilterRegularStop(),
  109. HAL_DFSDM_FilterRegularStop_IT() or HAL_DFSDM_FilterRegularStop_DMA().
  110. *** Filter injected channels conversion ***
  111. ===========================================
  112. [..]
  113. (#) Select injected channels using HAL_DFSDM_FilterConfigInjChannel().
  114. (#) Start injected conversion using HAL_DFSDM_FilterInjectedStart(),
  115. HAL_DFSDM_FilterInjectedStart_IT(), HAL_DFSDM_FilterInjectedStart_DMA() or
  116. HAL_DFSDM_FilterInjectedMsbStart_DMA().
  117. (#) In polling mode, use HAL_DFSDM_FilterPollForInjConversion() to detect
  118. the end of injected conversion.
  119. (#) In interrupt mode, HAL_DFSDM_FilterInjConvCpltCallback() will be called
  120. at the end of injected conversion.
  121. (#) Get value of injected conversion and corresponding channel using
  122. HAL_DFSDM_FilterGetInjectedValue().
  123. (#) In DMA mode, HAL_DFSDM_FilterInjConvHalfCpltCallback() and
  124. HAL_DFSDM_FilterInjConvCpltCallback() will be called respectively at the
  125. half transfer and at the transfer complete. Please note that
  126. HAL_DFSDM_FilterInjConvCpltCallback() will be called only in DMA
  127. circular mode.
  128. (#) Stop injected conversion using HAL_DFSDM_FilterInjectedStop(),
  129. HAL_DFSDM_FilterInjectedStop_IT() or HAL_DFSDM_FilterInjectedStop_DMA().
  130. *** Filter analog watchdog ***
  131. ==============================
  132. [..]
  133. (#) Start filter analog watchdog using HAL_DFSDM_FilterAwdStart_IT().
  134. (#) HAL_DFSDM_FilterAwdCallback() will be called if analog watchdog occurs.
  135. (#) Stop filter analog watchdog using HAL_DFSDM_FilterAwdStop_IT().
  136. *** Filter extreme detector ***
  137. ===============================
  138. [..]
  139. (#) Start filter extreme detector using HAL_DFSDM_FilterExdStart().
  140. (#) Get extreme detector maximum value using HAL_DFSDM_FilterGetExdMaxValue().
  141. (#) Get extreme detector minimum value using HAL_DFSDM_FilterGetExdMinValue().
  142. (#) Start filter extreme detector using HAL_DFSDM_FilterExdStop().
  143. *** Filter conversion time ***
  144. ==============================
  145. [..]
  146. (#) Get conversion time value using HAL_DFSDM_FilterGetConvTimeValue().
  147. @endverbatim
  148. ******************************************************************************
  149. * @attention
  150. *
  151. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  152. *
  153. * Redistribution and use in source and binary forms, with or without modification,
  154. * are permitted provided that the following conditions are met:
  155. * 1. Redistributions of source code must retain the above copyright notice,
  156. * this list of conditions and the following disclaimer.
  157. * 2. Redistributions in binary form must reproduce the above copyright notice,
  158. * this list of conditions and the following disclaimer in the documentation
  159. * and/or other materials provided with the distribution.
  160. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  161. * may be used to endorse or promote products derived from this software
  162. * without specific prior written permission.
  163. *
  164. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  165. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  166. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  167. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  168. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  169. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  170. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  171. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  172. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  173. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  174. *
  175. ******************************************************************************
  176. */
  177. /* Includes ------------------------------------------------------------------*/
  178. #include "stm32f7xx_hal.h"
  179. /** @addtogroup STM32F7xx_HAL_Driver
  180. * @{
  181. */
  182. #ifdef HAL_DFSDM_MODULE_ENABLED
  183. #if defined (STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx)
  184. /** @defgroup DFSDM DFSDM
  185. * @brief DFSDM HAL driver module
  186. * @{
  187. */
  188. /* Private typedef -----------------------------------------------------------*/
  189. /* Private define ------------------------------------------------------------*/
  190. /** @defgroup DFSDM_Private_Define DFSDM Private Define
  191. * @{
  192. */
  193. #define DFSDM_FLTCR1_MSB_RCH_OFFSET 8
  194. #define DFSDM_MSB_MASK 0xFFFF0000U
  195. #define DFSDM_LSB_MASK 0x0000FFFFU
  196. #define DFSDM_CKAB_TIMEOUT 5000U
  197. #define DFSDM1_CHANNEL_NUMBER 8U
  198. /**
  199. * @}
  200. */
  201. /* Private macro -------------------------------------------------------------*/
  202. /* Private variables ---------------------------------------------------------*/
  203. /** @defgroup DFSDM_Private_Variables DFSDM Private Variables
  204. * @{
  205. */
  206. __IO uint32_t v_dfsdm1ChannelCounter = 0;
  207. DFSDM_Channel_HandleTypeDef* a_dfsdm1ChannelHandle[DFSDM1_CHANNEL_NUMBER] = {NULL};
  208. /**
  209. * @}
  210. */
  211. /* Private function prototypes -----------------------------------------------*/
  212. /** @defgroup DFSDM_Private_Functions DFSDM Private Functions
  213. * @{
  214. */
  215. static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels);
  216. static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance);
  217. static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
  218. static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
  219. static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
  220. static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
  221. static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma);
  222. static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma);
  223. static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma);
  224. static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma);
  225. static void DFSDM_DMAError(DMA_HandleTypeDef *hdma);
  226. /**
  227. * @}
  228. */
  229. /* Exported functions --------------------------------------------------------*/
  230. /** @defgroup DFSDM_Exported_Functions DFSDM Exported Functions
  231. * @{
  232. */
  233. /** @defgroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions
  234. * @brief Channel initialization and de-initialization functions
  235. *
  236. @verbatim
  237. ==============================================================================
  238. ##### Channel initialization and de-initialization functions #####
  239. ==============================================================================
  240. [..] This section provides functions allowing to:
  241. (+) Initialize the DFSDM channel.
  242. (+) De-initialize the DFSDM channel.
  243. @endverbatim
  244. * @{
  245. */
  246. /**
  247. * @brief Initialize the DFSDM channel according to the specified parameters
  248. * in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle.
  249. * @param hdfsdm_channel DFSDM channel handle.
  250. * @retval HAL status.
  251. */
  252. HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  253. {
  254. /* Check DFSDM Channel handle */
  255. if(hdfsdm_channel == NULL)
  256. {
  257. return HAL_ERROR;
  258. }
  259. /* Check parameters */
  260. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  261. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_channel->Init.OutputClock.Activation));
  262. assert_param(IS_DFSDM_CHANNEL_INPUT(hdfsdm_channel->Init.Input.Multiplexer));
  263. assert_param(IS_DFSDM_CHANNEL_DATA_PACKING(hdfsdm_channel->Init.Input.DataPacking));
  264. assert_param(IS_DFSDM_CHANNEL_INPUT_PINS(hdfsdm_channel->Init.Input.Pins));
  265. assert_param(IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(hdfsdm_channel->Init.SerialInterface.Type));
  266. assert_param(IS_DFSDM_CHANNEL_SPI_CLOCK(hdfsdm_channel->Init.SerialInterface.SpiClock));
  267. assert_param(IS_DFSDM_CHANNEL_FILTER_ORDER(hdfsdm_channel->Init.Awd.FilterOrder));
  268. assert_param(IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(hdfsdm_channel->Init.Awd.Oversampling));
  269. assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset));
  270. assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift));
  271. /* Check that channel has not been already initialized */
  272. if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)
  273. {
  274. return HAL_ERROR;
  275. }
  276. /* Call MSP init function */
  277. HAL_DFSDM_ChannelMspInit(hdfsdm_channel);
  278. /* Update the channel counter */
  279. v_dfsdm1ChannelCounter++;
  280. /* Configure output serial clock and enable global DFSDM interface only for first channel */
  281. if(v_dfsdm1ChannelCounter == 1)
  282. {
  283. assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));
  284. /* Set the output serial clock source */
  285. DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);
  286. DFSDM1_Channel0->CHCFGR1 |= hdfsdm_channel->Init.OutputClock.Selection;
  287. /* Reset clock divider */
  288. DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);
  289. if(hdfsdm_channel->Init.OutputClock.Activation == ENABLE)
  290. {
  291. assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
  292. /* Set the output clock divider */
  293. DFSDM1_Channel0->CHCFGR1 |= (uint32_t) ((hdfsdm_channel->Init.OutputClock.Divider - 1) <<
  294. DFSDM_CHCFGR1_CKOUTDIV_Pos);
  295. }
  296. /* enable the DFSDM global interface */
  297. DFSDM1_Channel0->CHCFGR1 |= DFSDM_CHCFGR1_DFSDMEN;
  298. }
  299. /* Set channel input parameters */
  300. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK | DFSDM_CHCFGR1_DATMPX |
  301. DFSDM_CHCFGR1_CHINSEL);
  302. hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer |
  303. hdfsdm_channel->Init.Input.DataPacking |
  304. hdfsdm_channel->Init.Input.Pins);
  305. /* Set serial interface parameters */
  306. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP | DFSDM_CHCFGR1_SPICKSEL);
  307. hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.SerialInterface.Type |
  308. hdfsdm_channel->Init.SerialInterface.SpiClock);
  309. /* Set analog watchdog parameters */
  310. hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD | DFSDM_CHAWSCDR_AWFOSR);
  311. hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder |
  312. ((hdfsdm_channel->Init.Awd.Oversampling - 1) << DFSDM_CHAWSCDR_AWFOSR_Pos));
  313. /* Set channel offset and right bit shift */
  314. hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET | DFSDM_CHCFGR2_DTRBS);
  315. hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_Pos) |
  316. (hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_Pos));
  317. /* Enable DFSDM channel */
  318. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CHEN;
  319. /* Set DFSDM Channel to ready state */
  320. hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;
  321. /* Store channel handle in DFSDM channel handle table */
  322. a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
  323. return HAL_OK;
  324. }
  325. /**
  326. * @brief De-initialize the DFSDM channel.
  327. * @param hdfsdm_channel DFSDM channel handle.
  328. * @retval HAL status.
  329. */
  330. HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  331. {
  332. /* Check DFSDM Channel handle */
  333. if(hdfsdm_channel == NULL)
  334. {
  335. return HAL_ERROR;
  336. }
  337. /* Check parameters */
  338. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  339. /* Check that channel has not been already deinitialized */
  340. if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL)
  341. {
  342. return HAL_ERROR;
  343. }
  344. /* Disable the DFSDM channel */
  345. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN);
  346. /* Update the channel counter */
  347. v_dfsdm1ChannelCounter--;
  348. /* Disable global DFSDM at deinit of last channel */
  349. if(v_dfsdm1ChannelCounter == 0)
  350. {
  351. DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN);
  352. }
  353. /* Call MSP deinit function */
  354. HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel);
  355. /* Set DFSDM Channel in reset state */
  356. hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET;
  357. /* Reset channel handle in DFSDM channel handle table */
  358. a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = (DFSDM_Channel_HandleTypeDef *) NULL;
  359. return HAL_OK;
  360. }
  361. /**
  362. * @brief Initialize the DFSDM channel MSP.
  363. * @param hdfsdm_channel DFSDM channel handle.
  364. * @retval None
  365. */
  366. __weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  367. {
  368. /* Prevent unused argument(s) compilation warning */
  369. UNUSED(hdfsdm_channel);
  370. /* NOTE : This function should not be modified, when the function is needed,
  371. the HAL_DFSDM_ChannelMspInit could be implemented in the user file.
  372. */
  373. }
  374. /**
  375. * @brief De-initialize the DFSDM channel MSP.
  376. * @param hdfsdm_channel DFSDM channel handle.
  377. * @retval None
  378. */
  379. __weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  380. {
  381. /* Prevent unused argument(s) compilation warning */
  382. UNUSED(hdfsdm_channel);
  383. /* NOTE : This function should not be modified, when the function is needed,
  384. the HAL_DFSDM_ChannelMspDeInit could be implemented in the user file.
  385. */
  386. }
  387. /**
  388. * @}
  389. */
  390. /** @defgroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions
  391. * @brief Channel operation functions
  392. *
  393. @verbatim
  394. ==============================================================================
  395. ##### Channel operation functions #####
  396. ==============================================================================
  397. [..] This section provides functions allowing to:
  398. (+) Manage clock absence detector feature.
  399. (+) Manage short circuit detector feature.
  400. (+) Get analog watchdog value.
  401. (+) Modify offset value.
  402. @endverbatim
  403. * @{
  404. */
  405. /**
  406. * @brief This function allows to start clock absence detection in polling mode.
  407. * @note Same mode has to be used for all channels.
  408. * @note If clock is not available on this channel during 5 seconds,
  409. * clock absence detection will not be activated and function
  410. * will return HAL_TIMEOUT error.
  411. * @param hdfsdm_channel DFSDM channel handle.
  412. * @retval HAL status
  413. */
  414. HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  415. {
  416. HAL_StatusTypeDef status = HAL_OK;
  417. uint32_t channel;
  418. uint32_t tickstart;
  419. /* Check parameters */
  420. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  421. /* Check DFSDM channel state */
  422. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  423. {
  424. /* Return error status */
  425. status = HAL_ERROR;
  426. }
  427. else
  428. {
  429. /* Get channel number from channel instance */
  430. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  431. /* Get timeout */
  432. tickstart = HAL_GetTick();
  433. /* Clear clock absence flag */
  434. while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1) != 0)
  435. {
  436. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
  437. /* Check the Timeout */
  438. if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
  439. {
  440. /* Set timeout status */
  441. status = HAL_TIMEOUT;
  442. break;
  443. }
  444. }
  445. if(status == HAL_OK)
  446. {
  447. /* Start clock absence detection */
  448. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
  449. }
  450. }
  451. /* Return function status */
  452. return status;
  453. }
  454. /**
  455. * @brief This function allows to poll for the clock absence detection.
  456. * @param hdfsdm_channel DFSDM channel handle.
  457. * @param Timeout Timeout value in milliseconds.
  458. * @retval HAL status
  459. */
  460. HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  461. uint32_t Timeout)
  462. {
  463. uint32_t tickstart;
  464. uint32_t channel;
  465. /* Check parameters */
  466. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  467. /* Check DFSDM channel state */
  468. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  469. {
  470. /* Return error status */
  471. return HAL_ERROR;
  472. }
  473. else
  474. {
  475. /* Get channel number from channel instance */
  476. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  477. /* Get timeout */
  478. tickstart = HAL_GetTick();
  479. /* Wait clock absence detection */
  480. while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1) == 0)
  481. {
  482. /* Check the Timeout */
  483. if(Timeout != HAL_MAX_DELAY)
  484. {
  485. if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
  486. {
  487. /* Return timeout status */
  488. return HAL_TIMEOUT;
  489. }
  490. }
  491. }
  492. /* Clear clock absence detection flag */
  493. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
  494. /* Return function status */
  495. return HAL_OK;
  496. }
  497. }
  498. /**
  499. * @brief This function allows to stop clock absence detection in polling mode.
  500. * @param hdfsdm_channel DFSDM channel handle.
  501. * @retval HAL status
  502. */
  503. HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  504. {
  505. HAL_StatusTypeDef status = HAL_OK;
  506. uint32_t channel;
  507. /* Check parameters */
  508. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  509. /* Check DFSDM channel state */
  510. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  511. {
  512. /* Return error status */
  513. status = HAL_ERROR;
  514. }
  515. else
  516. {
  517. /* Stop clock absence detection */
  518. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
  519. /* Clear clock absence flag */
  520. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  521. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
  522. }
  523. /* Return function status */
  524. return status;
  525. }
  526. /**
  527. * @brief This function allows to start clock absence detection in interrupt mode.
  528. * @note Same mode has to be used for all channels.
  529. * @note If clock is not available on this channel during 5 seconds,
  530. * clock absence detection will not be activated and function
  531. * will return HAL_TIMEOUT error.
  532. * @param hdfsdm_channel DFSDM channel handle.
  533. * @retval HAL status
  534. */
  535. HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  536. {
  537. HAL_StatusTypeDef status = HAL_OK;
  538. uint32_t channel;
  539. uint32_t tickstart;
  540. /* Check parameters */
  541. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  542. /* Check DFSDM channel state */
  543. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  544. {
  545. /* Return error status */
  546. status = HAL_ERROR;
  547. }
  548. else
  549. {
  550. /* Get channel number from channel instance */
  551. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  552. /* Get timeout */
  553. tickstart = HAL_GetTick();
  554. /* Clear clock absence flag */
  555. while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1) != 0)
  556. {
  557. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
  558. /* Check the Timeout */
  559. if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
  560. {
  561. /* Set timeout status */
  562. status = HAL_TIMEOUT;
  563. break;
  564. }
  565. }
  566. if(status == HAL_OK)
  567. {
  568. /* Activate clock absence detection interrupt */
  569. DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_CKABIE;
  570. /* Start clock absence detection */
  571. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
  572. }
  573. }
  574. /* Return function status */
  575. return status;
  576. }
  577. /**
  578. * @brief Clock absence detection callback.
  579. * @param hdfsdm_channel DFSDM channel handle.
  580. * @retval None
  581. */
  582. __weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  583. {
  584. /* Prevent unused argument(s) compilation warning */
  585. UNUSED(hdfsdm_channel);
  586. /* NOTE : This function should not be modified, when the callback is needed,
  587. the HAL_DFSDM_ChannelCkabCallback could be implemented in the user file
  588. */
  589. }
  590. /**
  591. * @brief This function allows to stop clock absence detection in interrupt mode.
  592. * @note Interrupt will be disabled for all channels
  593. * @param hdfsdm_channel DFSDM channel handle.
  594. * @retval HAL status
  595. */
  596. HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  597. {
  598. HAL_StatusTypeDef status = HAL_OK;
  599. uint32_t channel;
  600. /* Check parameters */
  601. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  602. /* Check DFSDM channel state */
  603. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  604. {
  605. /* Return error status */
  606. status = HAL_ERROR;
  607. }
  608. else
  609. {
  610. /* Stop clock absence detection */
  611. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
  612. /* Clear clock absence flag */
  613. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  614. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
  615. /* Disable clock absence detection interrupt */
  616. DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE);
  617. }
  618. /* Return function status */
  619. return status;
  620. }
  621. /**
  622. * @brief This function allows to start short circuit detection in polling mode.
  623. * @note Same mode has to be used for all channels
  624. * @param hdfsdm_channel DFSDM channel handle.
  625. * @param Threshold Short circuit detector threshold.
  626. * This parameter must be a number between Min_Data = 0 and Max_Data = 255.
  627. * @param BreakSignal Break signals assigned to short circuit event.
  628. * This parameter can be a values combination of @ref DFSDM_BreakSignals.
  629. * @retval HAL status
  630. */
  631. HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  632. uint32_t Threshold,
  633. uint32_t BreakSignal)
  634. {
  635. HAL_StatusTypeDef status = HAL_OK;
  636. /* Check parameters */
  637. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  638. assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
  639. assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
  640. /* Check DFSDM channel state */
  641. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  642. {
  643. /* Return error status */
  644. status = HAL_ERROR;
  645. }
  646. else
  647. {
  648. /* Configure threshold and break signals */
  649. hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
  650. hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \
  651. Threshold);
  652. /* Start short circuit detection */
  653. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
  654. }
  655. /* Return function status */
  656. return status;
  657. }
  658. /**
  659. * @brief This function allows to poll for the short circuit detection.
  660. * @param hdfsdm_channel DFSDM channel handle.
  661. * @param Timeout Timeout value in milliseconds.
  662. * @retval HAL status
  663. */
  664. HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  665. uint32_t Timeout)
  666. {
  667. uint32_t tickstart;
  668. uint32_t channel;
  669. /* Check parameters */
  670. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  671. /* Check DFSDM channel state */
  672. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  673. {
  674. /* Return error status */
  675. return HAL_ERROR;
  676. }
  677. else
  678. {
  679. /* Get channel number from channel instance */
  680. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  681. /* Get timeout */
  682. tickstart = HAL_GetTick();
  683. /* Wait short circuit detection */
  684. while(((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_Pos + channel)) == 0)
  685. {
  686. /* Check the Timeout */
  687. if(Timeout != HAL_MAX_DELAY)
  688. {
  689. if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
  690. {
  691. /* Return timeout status */
  692. return HAL_TIMEOUT;
  693. }
  694. }
  695. }
  696. /* Clear short circuit detection flag */
  697. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCSDF_Pos + channel));
  698. /* Return function status */
  699. return HAL_OK;
  700. }
  701. }
  702. /**
  703. * @brief This function allows to stop short circuit detection in polling mode.
  704. * @param hdfsdm_channel DFSDM channel handle.
  705. * @retval HAL status
  706. */
  707. HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  708. {
  709. HAL_StatusTypeDef status = HAL_OK;
  710. uint32_t channel;
  711. /* Check parameters */
  712. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  713. /* Check DFSDM channel state */
  714. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  715. {
  716. /* Return error status */
  717. status = HAL_ERROR;
  718. }
  719. else
  720. {
  721. /* Stop short circuit detection */
  722. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
  723. /* Clear short circuit detection flag */
  724. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  725. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCSDF_Pos + channel));
  726. }
  727. /* Return function status */
  728. return status;
  729. }
  730. /**
  731. * @brief This function allows to start short circuit detection in interrupt mode.
  732. * @note Same mode has to be used for all channels
  733. * @param hdfsdm_channel DFSDM channel handle.
  734. * @param Threshold Short circuit detector threshold.
  735. * This parameter must be a number between Min_Data = 0 and Max_Data = 255.
  736. * @param BreakSignal Break signals assigned to short circuit event.
  737. * This parameter can be a values combination of @ref DFSDM_BreakSignals.
  738. * @retval HAL status
  739. */
  740. HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  741. uint32_t Threshold,
  742. uint32_t BreakSignal)
  743. {
  744. HAL_StatusTypeDef status = HAL_OK;
  745. /* Check parameters */
  746. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  747. assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
  748. assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
  749. /* Check DFSDM channel state */
  750. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  751. {
  752. /* Return error status */
  753. status = HAL_ERROR;
  754. }
  755. else
  756. {
  757. /* Activate short circuit detection interrupt */
  758. DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_SCDIE;
  759. /* Configure threshold and break signals */
  760. hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
  761. hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \
  762. Threshold);
  763. /* Start short circuit detection */
  764. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
  765. }
  766. /* Return function status */
  767. return status;
  768. }
  769. /**
  770. * @brief Short circuit detection callback.
  771. * @param hdfsdm_channel DFSDM channel handle.
  772. * @retval None
  773. */
  774. __weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  775. {
  776. /* Prevent unused argument(s) compilation warning */
  777. UNUSED(hdfsdm_channel);
  778. /* NOTE : This function should not be modified, when the callback is needed,
  779. the HAL_DFSDM_ChannelScdCallback could be implemented in the user file
  780. */
  781. }
  782. /**
  783. * @brief This function allows to stop short circuit detection in interrupt mode.
  784. * @note Interrupt will be disabled for all channels
  785. * @param hdfsdm_channel DFSDM channel handle.
  786. * @retval HAL status
  787. */
  788. HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  789. {
  790. HAL_StatusTypeDef status = HAL_OK;
  791. uint32_t channel;
  792. /* Check parameters */
  793. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  794. /* Check DFSDM channel state */
  795. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  796. {
  797. /* Return error status */
  798. status = HAL_ERROR;
  799. }
  800. else
  801. {
  802. /* Stop short circuit detection */
  803. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
  804. /* Clear short circuit detection flag */
  805. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  806. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCSDF_Pos + channel));
  807. /* Disable short circuit detection interrupt */
  808. DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE);
  809. }
  810. /* Return function status */
  811. return status;
  812. }
  813. /**
  814. * @brief This function allows to get channel analog watchdog value.
  815. * @param hdfsdm_channel DFSDM channel handle.
  816. * @retval Channel analog watchdog value.
  817. */
  818. int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  819. {
  820. return (int16_t) hdfsdm_channel->Instance->CHWDATAR;
  821. }
  822. /**
  823. * @brief This function allows to modify channel offset value.
  824. * @param hdfsdm_channel DFSDM channel handle.
  825. * @param Offset DFSDM channel offset.
  826. * This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
  827. * @retval HAL status.
  828. */
  829. HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  830. int32_t Offset)
  831. {
  832. HAL_StatusTypeDef status = HAL_OK;
  833. /* Check parameters */
  834. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  835. assert_param(IS_DFSDM_CHANNEL_OFFSET(Offset));
  836. /* Check DFSDM channel state */
  837. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  838. {
  839. /* Return error status */
  840. status = HAL_ERROR;
  841. }
  842. else
  843. {
  844. /* Modify channel offset */
  845. hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET);
  846. hdfsdm_channel->Instance->CHCFGR2 |= ((uint32_t) Offset << DFSDM_CHCFGR2_OFFSET_Pos);
  847. }
  848. /* Return function status */
  849. return status;
  850. }
  851. /**
  852. * @}
  853. */
  854. /** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function
  855. * @brief Channel state function
  856. *
  857. @verbatim
  858. ==============================================================================
  859. ##### Channel state function #####
  860. ==============================================================================
  861. [..] This section provides function allowing to:
  862. (+) Get channel handle state.
  863. @endverbatim
  864. * @{
  865. */
  866. /**
  867. * @brief This function allows to get the current DFSDM channel handle state.
  868. * @param hdfsdm_channel DFSDM channel handle.
  869. * @retval DFSDM channel state.
  870. */
  871. HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  872. {
  873. /* Return DFSDM channel handle state */
  874. return hdfsdm_channel->State;
  875. }
  876. /**
  877. * @}
  878. */
  879. /** @defgroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions
  880. * @brief Filter initialization and de-initialization functions
  881. *
  882. @verbatim
  883. ==============================================================================
  884. ##### Filter initialization and de-initialization functions #####
  885. ==============================================================================
  886. [..] This section provides functions allowing to:
  887. (+) Initialize the DFSDM filter.
  888. (+) De-initialize the DFSDM filter.
  889. @endverbatim
  890. * @{
  891. */
  892. /**
  893. * @brief Initialize the DFSDM filter according to the specified parameters
  894. * in the DFSDM_FilterInitTypeDef structure and initialize the associated handle.
  895. * @param hdfsdm_filter DFSDM filter handle.
  896. * @retval HAL status.
  897. */
  898. HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  899. {
  900. /* Check DFSDM Channel handle */
  901. if(hdfsdm_filter == NULL)
  902. {
  903. return HAL_ERROR;
  904. }
  905. /* Check parameters */
  906. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  907. assert_param(IS_DFSDM_FILTER_REG_TRIGGER(hdfsdm_filter->Init.RegularParam.Trigger));
  908. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.FastMode));
  909. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.DmaMode));
  910. assert_param(IS_DFSDM_FILTER_INJ_TRIGGER(hdfsdm_filter->Init.InjectedParam.Trigger));
  911. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.ScanMode));
  912. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.DmaMode));
  913. assert_param(IS_DFSDM_FILTER_SINC_ORDER(hdfsdm_filter->Init.FilterParam.SincOrder));
  914. assert_param(IS_DFSDM_FILTER_OVS_RATIO(hdfsdm_filter->Init.FilterParam.Oversampling));
  915. assert_param(IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(hdfsdm_filter->Init.FilterParam.IntOversampling));
  916. /* Check parameters compatibility */
  917. if((hdfsdm_filter->Instance == DFSDM1_Filter0) &&
  918. ((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) ||
  919. (hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
  920. {
  921. return HAL_ERROR;
  922. }
  923. /* Initialize DFSDM filter variables with default values */
  924. hdfsdm_filter->RegularContMode = DFSDM_CONTINUOUS_CONV_OFF;
  925. hdfsdm_filter->InjectedChannelsNbr = 1;
  926. hdfsdm_filter->InjConvRemaining = 1;
  927. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_NONE;
  928. /* Call MSP init function */
  929. HAL_DFSDM_FilterMspInit(hdfsdm_filter);
  930. /* Set regular parameters */
  931. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
  932. if(hdfsdm_filter->Init.RegularParam.FastMode == ENABLE)
  933. {
  934. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_FAST;
  935. }
  936. else
  937. {
  938. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_FAST);
  939. }
  940. if(hdfsdm_filter->Init.RegularParam.DmaMode == ENABLE)
  941. {
  942. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RDMAEN;
  943. }
  944. else
  945. {
  946. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RDMAEN);
  947. }
  948. /* Set injected parameters */
  949. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC | DFSDM_FLTCR1_JEXTEN | DFSDM_FLTCR1_JEXTSEL);
  950. if(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_EXT_TRIGGER)
  951. {
  952. assert_param(IS_DFSDM_FILTER_EXT_TRIG(hdfsdm_filter->Init.InjectedParam.ExtTrigger));
  953. assert_param(IS_DFSDM_FILTER_EXT_TRIG_EDGE(hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge));
  954. hdfsdm_filter->Instance->FLTCR1 |= (hdfsdm_filter->Init.InjectedParam.ExtTrigger);
  955. }
  956. if(hdfsdm_filter->Init.InjectedParam.ScanMode == ENABLE)
  957. {
  958. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSCAN;
  959. }
  960. else
  961. {
  962. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSCAN);
  963. }
  964. if(hdfsdm_filter->Init.InjectedParam.DmaMode == ENABLE)
  965. {
  966. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JDMAEN;
  967. }
  968. else
  969. {
  970. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JDMAEN);
  971. }
  972. /* Set filter parameters */
  973. hdfsdm_filter->Instance->FLTFCR &= ~(DFSDM_FLTFCR_FORD | DFSDM_FLTFCR_FOSR | DFSDM_FLTFCR_IOSR);
  974. hdfsdm_filter->Instance->FLTFCR |= (hdfsdm_filter->Init.FilterParam.SincOrder |
  975. ((hdfsdm_filter->Init.FilterParam.Oversampling - 1) << DFSDM_FLTFCR_FOSR_Pos) |
  976. (hdfsdm_filter->Init.FilterParam.IntOversampling - 1));
  977. /* Store regular and injected triggers and injected scan mode*/
  978. hdfsdm_filter->RegularTrigger = hdfsdm_filter->Init.RegularParam.Trigger;
  979. hdfsdm_filter->InjectedTrigger = hdfsdm_filter->Init.InjectedParam.Trigger;
  980. hdfsdm_filter->ExtTriggerEdge = hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge;
  981. hdfsdm_filter->InjectedScanMode = hdfsdm_filter->Init.InjectedParam.ScanMode;
  982. /* Enable DFSDM filter */
  983. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  984. /* Set DFSDM filter to ready state */
  985. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_READY;
  986. return HAL_OK;
  987. }
  988. /**
  989. * @brief De-initializes the DFSDM filter.
  990. * @param hdfsdm_filter DFSDM filter handle.
  991. * @retval HAL status.
  992. */
  993. HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  994. {
  995. /* Check DFSDM filter handle */
  996. if(hdfsdm_filter == NULL)
  997. {
  998. return HAL_ERROR;
  999. }
  1000. /* Check parameters */
  1001. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1002. /* Disable the DFSDM filter */
  1003. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  1004. /* Call MSP deinit function */
  1005. HAL_DFSDM_FilterMspDeInit(hdfsdm_filter);
  1006. /* Set DFSDM filter in reset state */
  1007. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_RESET;
  1008. return HAL_OK;
  1009. }
  1010. /**
  1011. * @brief Initializes the DFSDM filter MSP.
  1012. * @param hdfsdm_filter DFSDM filter handle.
  1013. * @retval None
  1014. */
  1015. __weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1016. {
  1017. /* Prevent unused argument(s) compilation warning */
  1018. UNUSED(hdfsdm_filter);
  1019. /* NOTE : This function should not be modified, when the function is needed,
  1020. the HAL_DFSDM_FilterMspInit could be implemented in the user file.
  1021. */
  1022. }
  1023. /**
  1024. * @brief De-initializes the DFSDM filter MSP.
  1025. * @param hdfsdm_filter DFSDM filter handle.
  1026. * @retval None
  1027. */
  1028. __weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1029. {
  1030. /* Prevent unused argument(s) compilation warning */
  1031. UNUSED(hdfsdm_filter);
  1032. /* NOTE : This function should not be modified, when the function is needed,
  1033. the HAL_DFSDM_FilterMspDeInit could be implemented in the user file.
  1034. */
  1035. }
  1036. /**
  1037. * @}
  1038. */
  1039. /** @defgroup DFSDM_Exported_Functions_Group2_Filter Filter control functions
  1040. * @brief Filter control functions
  1041. *
  1042. @verbatim
  1043. ==============================================================================
  1044. ##### Filter control functions #####
  1045. ==============================================================================
  1046. [..] This section provides functions allowing to:
  1047. (+) Select channel and enable/disable continuous mode for regular conversion.
  1048. (+) Select channels for injected conversion.
  1049. @endverbatim
  1050. * @{
  1051. */
  1052. /**
  1053. * @brief This function allows to select channel and to enable/disable
  1054. * continuous mode for regular conversion.
  1055. * @param hdfsdm_filter DFSDM filter handle.
  1056. * @param Channel Channel for regular conversion.
  1057. * This parameter can be a value of @ref DFSDM_Channel_Selection.
  1058. * @param ContinuousMode Enable/disable continuous mode for regular conversion.
  1059. * This parameter can be a value of @ref DFSDM_ContinuousMode.
  1060. * @retval HAL status
  1061. */
  1062. HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1063. uint32_t Channel,
  1064. uint32_t ContinuousMode)
  1065. {
  1066. HAL_StatusTypeDef status = HAL_OK;
  1067. /* Check parameters */
  1068. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1069. assert_param(IS_DFSDM_REGULAR_CHANNEL(Channel));
  1070. assert_param(IS_DFSDM_CONTINUOUS_MODE(ContinuousMode));
  1071. /* Check DFSDM filter state */
  1072. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
  1073. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
  1074. {
  1075. /* Configure channel and continuous mode for regular conversion */
  1076. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RCH | DFSDM_FLTCR1_RCONT);
  1077. if(ContinuousMode == DFSDM_CONTINUOUS_CONV_ON)
  1078. {
  1079. hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) (((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET) |
  1080. DFSDM_FLTCR1_RCONT);
  1081. }
  1082. else
  1083. {
  1084. hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) ((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET);
  1085. }
  1086. /* Store continuous mode information */
  1087. hdfsdm_filter->RegularContMode = ContinuousMode;
  1088. }
  1089. else
  1090. {
  1091. status = HAL_ERROR;
  1092. }
  1093. /* Return function status */
  1094. return status;
  1095. }
  1096. /**
  1097. * @brief This function allows to select channels for injected conversion.
  1098. * @param hdfsdm_filter DFSDM filter handle.
  1099. * @param Channel Channels for injected conversion.
  1100. * This parameter can be a values combination of @ref DFSDM_Channel_Selection.
  1101. * @retval HAL status
  1102. */
  1103. HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1104. uint32_t Channel)
  1105. {
  1106. HAL_StatusTypeDef status = HAL_OK;
  1107. /* Check parameters */
  1108. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1109. assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
  1110. /* Check DFSDM filter state */
  1111. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
  1112. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
  1113. {
  1114. /* Configure channel for injected conversion */
  1115. hdfsdm_filter->Instance->FLTJCHGR = (uint32_t) (Channel & DFSDM_LSB_MASK);
  1116. /* Store number of injected channels */
  1117. hdfsdm_filter->InjectedChannelsNbr = DFSDM_GetInjChannelsNbr(Channel);
  1118. /* Update number of injected channels remaining */
  1119. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  1120. hdfsdm_filter->InjectedChannelsNbr : 1;
  1121. }
  1122. else
  1123. {
  1124. status = HAL_ERROR;
  1125. }
  1126. /* Return function status */
  1127. return status;
  1128. }
  1129. /**
  1130. * @}
  1131. */
  1132. /** @defgroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions
  1133. * @brief Filter operation functions
  1134. *
  1135. @verbatim
  1136. ==============================================================================
  1137. ##### Filter operation functions #####
  1138. ==============================================================================
  1139. [..] This section provides functions allowing to:
  1140. (+) Start conversion of regular/injected channel.
  1141. (+) Poll for the end of regular/injected conversion.
  1142. (+) Stop conversion of regular/injected channel.
  1143. (+) Start conversion of regular/injected channel and enable interrupt.
  1144. (+) Call the callback functions at the end of regular/injected conversions.
  1145. (+) Stop conversion of regular/injected channel and disable interrupt.
  1146. (+) Start conversion of regular/injected channel and enable DMA transfer.
  1147. (+) Stop conversion of regular/injected channel and disable DMA transfer.
  1148. (+) Start analog watchdog and enable interrupt.
  1149. (+) Call the callback function when analog watchdog occurs.
  1150. (+) Stop analog watchdog and disable interrupt.
  1151. (+) Start extreme detector.
  1152. (+) Stop extreme detector.
  1153. (+) Get result of regular channel conversion.
  1154. (+) Get result of injected channel conversion.
  1155. (+) Get extreme detector maximum and minimum values.
  1156. (+) Get conversion time.
  1157. (+) Handle DFSDM interrupt request.
  1158. @endverbatim
  1159. * @{
  1160. */
  1161. /**
  1162. * @brief This function allows to start regular conversion in polling mode.
  1163. * @note This function should be called only when DFSDM filter instance is
  1164. * in idle state or if injected conversion is ongoing.
  1165. * @param hdfsdm_filter DFSDM filter handle.
  1166. * @retval HAL status
  1167. */
  1168. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1169. {
  1170. HAL_StatusTypeDef status = HAL_OK;
  1171. /* Check parameters */
  1172. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1173. /* Check DFSDM filter state */
  1174. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1175. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
  1176. {
  1177. /* Start regular conversion */
  1178. DFSDM_RegConvStart(hdfsdm_filter);
  1179. }
  1180. else
  1181. {
  1182. status = HAL_ERROR;
  1183. }
  1184. /* Return function status */
  1185. return status;
  1186. }
  1187. /**
  1188. * @brief This function allows to poll for the end of regular conversion.
  1189. * @note This function should be called only if regular conversion is ongoing.
  1190. * @param hdfsdm_filter DFSDM filter handle.
  1191. * @param Timeout Timeout value in milliseconds.
  1192. * @retval HAL status
  1193. */
  1194. HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1195. uint32_t Timeout)
  1196. {
  1197. uint32_t tickstart;
  1198. /* Check parameters */
  1199. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1200. /* Check DFSDM filter state */
  1201. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
  1202. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1203. {
  1204. /* Return error status */
  1205. return HAL_ERROR;
  1206. }
  1207. else
  1208. {
  1209. /* Get timeout */
  1210. tickstart = HAL_GetTick();
  1211. /* Wait end of regular conversion */
  1212. while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != DFSDM_FLTISR_REOCF)
  1213. {
  1214. /* Check the Timeout */
  1215. if(Timeout != HAL_MAX_DELAY)
  1216. {
  1217. if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
  1218. {
  1219. /* Return timeout status */
  1220. return HAL_TIMEOUT;
  1221. }
  1222. }
  1223. }
  1224. /* Check if overrun occurs */
  1225. if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) == DFSDM_FLTISR_ROVRF)
  1226. {
  1227. /* Update error code and call error callback */
  1228. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
  1229. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  1230. /* Clear regular overrun flag */
  1231. hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
  1232. }
  1233. /* Update DFSDM filter state only if not continuous conversion and SW trigger */
  1234. if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  1235. (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
  1236. {
  1237. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
  1238. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
  1239. }
  1240. /* Return function status */
  1241. return HAL_OK;
  1242. }
  1243. }
  1244. /**
  1245. * @brief This function allows to stop regular conversion in polling mode.
  1246. * @note This function should be called only if regular conversion is ongoing.
  1247. * @param hdfsdm_filter DFSDM filter handle.
  1248. * @retval HAL status
  1249. */
  1250. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1251. {
  1252. HAL_StatusTypeDef status = HAL_OK;
  1253. /* Check parameters */
  1254. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1255. /* Check DFSDM filter state */
  1256. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
  1257. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1258. {
  1259. /* Return error status */
  1260. status = HAL_ERROR;
  1261. }
  1262. else
  1263. {
  1264. /* Stop regular conversion */
  1265. DFSDM_RegConvStop(hdfsdm_filter);
  1266. }
  1267. /* Return function status */
  1268. return status;
  1269. }
  1270. /**
  1271. * @brief This function allows to start regular conversion in interrupt mode.
  1272. * @note This function should be called only when DFSDM filter instance is
  1273. * in idle state or if injected conversion is ongoing.
  1274. * @param hdfsdm_filter DFSDM filter handle.
  1275. * @retval HAL status
  1276. */
  1277. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1278. {
  1279. HAL_StatusTypeDef status = HAL_OK;
  1280. /* Check parameters */
  1281. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1282. /* Check DFSDM filter state */
  1283. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1284. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
  1285. {
  1286. /* Enable interrupts for regular conversions */
  1287. hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
  1288. /* Start regular conversion */
  1289. DFSDM_RegConvStart(hdfsdm_filter);
  1290. }
  1291. else
  1292. {
  1293. status = HAL_ERROR;
  1294. }
  1295. /* Return function status */
  1296. return status;
  1297. }
  1298. /**
  1299. * @brief This function allows to stop regular conversion in interrupt mode.
  1300. * @note This function should be called only if regular conversion is ongoing.
  1301. * @param hdfsdm_filter DFSDM filter handle.
  1302. * @retval HAL status
  1303. */
  1304. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1305. {
  1306. HAL_StatusTypeDef status = HAL_OK;
  1307. /* Check parameters */
  1308. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1309. /* Check DFSDM filter state */
  1310. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
  1311. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1312. {
  1313. /* Return error status */
  1314. status = HAL_ERROR;
  1315. }
  1316. else
  1317. {
  1318. /* Disable interrupts for regular conversions */
  1319. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
  1320. /* Stop regular conversion */
  1321. DFSDM_RegConvStop(hdfsdm_filter);
  1322. }
  1323. /* Return function status */
  1324. return status;
  1325. }
  1326. /**
  1327. * @brief This function allows to start regular conversion in DMA mode.
  1328. * @note This function should be called only when DFSDM filter instance is
  1329. * in idle state or if injected conversion is ongoing.
  1330. * Please note that data on buffer will contain signed regular conversion
  1331. * value on 24 most significant bits and corresponding channel on 3 least
  1332. * significant bits.
  1333. * @param hdfsdm_filter DFSDM filter handle.
  1334. * @param pData The destination buffer address.
  1335. * @param Length The length of data to be transferred from DFSDM filter to memory.
  1336. * @retval HAL status
  1337. */
  1338. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1339. int32_t *pData,
  1340. uint32_t Length)
  1341. {
  1342. HAL_StatusTypeDef status = HAL_OK;
  1343. /* Check parameters */
  1344. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1345. /* Check destination address and length */
  1346. if((pData == NULL) || (Length == 0))
  1347. {
  1348. status = HAL_ERROR;
  1349. }
  1350. /* Check that DMA is enabled for regular conversion */
  1351. else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
  1352. {
  1353. status = HAL_ERROR;
  1354. }
  1355. /* Check parameters compatibility */
  1356. else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1357. (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  1358. (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
  1359. (Length != 1))
  1360. {
  1361. status = HAL_ERROR;
  1362. }
  1363. else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1364. (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  1365. (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
  1366. {
  1367. status = HAL_ERROR;
  1368. }
  1369. /* Check DFSDM filter state */
  1370. else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1371. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
  1372. {
  1373. /* Set callbacks on DMA handler */
  1374. hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
  1375. hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
  1376. hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
  1377. DFSDM_DMARegularHalfConvCplt : NULL;
  1378. /* Start DMA in interrupt mode */
  1379. if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \
  1380. (uint32_t) pData, Length) != HAL_OK)
  1381. {
  1382. /* Set DFSDM filter in error state */
  1383. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1384. status = HAL_ERROR;
  1385. }
  1386. else
  1387. {
  1388. /* Start regular conversion */
  1389. DFSDM_RegConvStart(hdfsdm_filter);
  1390. }
  1391. }
  1392. else
  1393. {
  1394. status = HAL_ERROR;
  1395. }
  1396. /* Return function status */
  1397. return status;
  1398. }
  1399. /**
  1400. * @brief This function allows to start regular conversion in DMA mode and to get
  1401. * only the 16 most significant bits of conversion.
  1402. * @note This function should be called only when DFSDM filter instance is
  1403. * in idle state or if injected conversion is ongoing.
  1404. * Please note that data on buffer will contain signed 16 most significant
  1405. * bits of regular conversion.
  1406. * @param hdfsdm_filter DFSDM filter handle.
  1407. * @param pData The destination buffer address.
  1408. * @param Length The length of data to be transferred from DFSDM filter to memory.
  1409. * @retval HAL status
  1410. */
  1411. HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1412. int16_t *pData,
  1413. uint32_t Length)
  1414. {
  1415. HAL_StatusTypeDef status = HAL_OK;
  1416. /* Check parameters */
  1417. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1418. /* Check destination address and length */
  1419. if((pData == NULL) || (Length == 0))
  1420. {
  1421. status = HAL_ERROR;
  1422. }
  1423. /* Check that DMA is enabled for regular conversion */
  1424. else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
  1425. {
  1426. status = HAL_ERROR;
  1427. }
  1428. /* Check parameters compatibility */
  1429. else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1430. (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  1431. (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
  1432. (Length != 1))
  1433. {
  1434. status = HAL_ERROR;
  1435. }
  1436. else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1437. (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  1438. (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
  1439. {
  1440. status = HAL_ERROR;
  1441. }
  1442. /* Check DFSDM filter state */
  1443. else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1444. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
  1445. {
  1446. /* Set callbacks on DMA handler */
  1447. hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
  1448. hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
  1449. hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
  1450. DFSDM_DMARegularHalfConvCplt : NULL;
  1451. /* Start DMA in interrupt mode */
  1452. if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)(&hdfsdm_filter->Instance->FLTRDATAR) + 2, \
  1453. (uint32_t) pData, Length) != HAL_OK)
  1454. {
  1455. /* Set DFSDM filter in error state */
  1456. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1457. status = HAL_ERROR;
  1458. }
  1459. else
  1460. {
  1461. /* Start regular conversion */
  1462. DFSDM_RegConvStart(hdfsdm_filter);
  1463. }
  1464. }
  1465. else
  1466. {
  1467. status = HAL_ERROR;
  1468. }
  1469. /* Return function status */
  1470. return status;
  1471. }
  1472. /**
  1473. * @brief This function allows to stop regular conversion in DMA mode.
  1474. * @note This function should be called only if regular conversion is ongoing.
  1475. * @param hdfsdm_filter DFSDM filter handle.
  1476. * @retval HAL status
  1477. */
  1478. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1479. {
  1480. HAL_StatusTypeDef status = HAL_OK;
  1481. /* Check parameters */
  1482. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1483. /* Check DFSDM filter state */
  1484. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
  1485. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1486. {
  1487. /* Return error status */
  1488. status = HAL_ERROR;
  1489. }
  1490. else
  1491. {
  1492. /* Stop current DMA transfer */
  1493. if(HAL_DMA_Abort(hdfsdm_filter->hdmaReg) != HAL_OK)
  1494. {
  1495. /* Set DFSDM filter in error state */
  1496. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1497. status = HAL_ERROR;
  1498. }
  1499. else
  1500. {
  1501. /* Stop regular conversion */
  1502. DFSDM_RegConvStop(hdfsdm_filter);
  1503. }
  1504. }
  1505. /* Return function status */
  1506. return status;
  1507. }
  1508. /**
  1509. * @brief This function allows to get regular conversion value.
  1510. * @param hdfsdm_filter DFSDM filter handle.
  1511. * @param Channel Corresponding channel of regular conversion.
  1512. * @retval Regular conversion value
  1513. */
  1514. int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1515. uint32_t *Channel)
  1516. {
  1517. uint32_t reg = 0;
  1518. int32_t value = 0;
  1519. /* Check parameters */
  1520. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1521. assert_param(Channel != NULL);
  1522. /* Get value of data register for regular channel */
  1523. reg = hdfsdm_filter->Instance->FLTRDATAR;
  1524. /* Extract channel and regular conversion value */
  1525. *Channel = (reg & DFSDM_FLTRDATAR_RDATACH);
  1526. value = ((int32_t)(reg & DFSDM_FLTRDATAR_RDATA) >> DFSDM_FLTRDATAR_RDATA_Pos);
  1527. /* return regular conversion value */
  1528. return value;
  1529. }
  1530. /**
  1531. * @brief This function allows to start injected conversion in polling mode.
  1532. * @note This function should be called only when DFSDM filter instance is
  1533. * in idle state or if regular conversion is ongoing.
  1534. * @param hdfsdm_filter DFSDM filter handle.
  1535. * @retval HAL status
  1536. */
  1537. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1538. {
  1539. HAL_StatusTypeDef status = HAL_OK;
  1540. /* Check parameters */
  1541. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1542. /* Check DFSDM filter state */
  1543. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1544. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
  1545. {
  1546. /* Start injected conversion */
  1547. DFSDM_InjConvStart(hdfsdm_filter);
  1548. }
  1549. else
  1550. {
  1551. status = HAL_ERROR;
  1552. }
  1553. /* Return function status */
  1554. return status;
  1555. }
  1556. /**
  1557. * @brief This function allows to poll for the end of injected conversion.
  1558. * @note This function should be called only if injected conversion is ongoing.
  1559. * @param hdfsdm_filter DFSDM filter handle.
  1560. * @param Timeout Timeout value in milliseconds.
  1561. * @retval HAL status
  1562. */
  1563. HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1564. uint32_t Timeout)
  1565. {
  1566. uint32_t tickstart;
  1567. /* Check parameters */
  1568. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1569. /* Check DFSDM filter state */
  1570. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
  1571. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1572. {
  1573. /* Return error status */
  1574. return HAL_ERROR;
  1575. }
  1576. else
  1577. {
  1578. /* Get timeout */
  1579. tickstart = HAL_GetTick();
  1580. /* Wait end of injected conversions */
  1581. while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != DFSDM_FLTISR_JEOCF)
  1582. {
  1583. /* Check the Timeout */
  1584. if(Timeout != HAL_MAX_DELAY)
  1585. {
  1586. if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
  1587. {
  1588. /* Return timeout status */
  1589. return HAL_TIMEOUT;
  1590. }
  1591. }
  1592. }
  1593. /* Check if overrun occurs */
  1594. if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) == DFSDM_FLTISR_JOVRF)
  1595. {
  1596. /* Update error code and call error callback */
  1597. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
  1598. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  1599. /* Clear injected overrun flag */
  1600. hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
  1601. }
  1602. /* Update remaining injected conversions */
  1603. hdfsdm_filter->InjConvRemaining--;
  1604. if(hdfsdm_filter->InjConvRemaining == 0)
  1605. {
  1606. /* Update DFSDM filter state only if trigger is software */
  1607. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  1608. {
  1609. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
  1610. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
  1611. }
  1612. /* end of injected sequence, reset the value */
  1613. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  1614. hdfsdm_filter->InjectedChannelsNbr : 1;
  1615. }
  1616. /* Return function status */
  1617. return HAL_OK;
  1618. }
  1619. }
  1620. /**
  1621. * @brief This function allows to stop injected conversion in polling mode.
  1622. * @note This function should be called only if injected conversion is ongoing.
  1623. * @param hdfsdm_filter DFSDM filter handle.
  1624. * @retval HAL status
  1625. */
  1626. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1627. {
  1628. HAL_StatusTypeDef status = HAL_OK;
  1629. /* Check parameters */
  1630. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1631. /* Check DFSDM filter state */
  1632. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
  1633. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1634. {
  1635. /* Return error status */
  1636. status = HAL_ERROR;
  1637. }
  1638. else
  1639. {
  1640. /* Stop injected conversion */
  1641. DFSDM_InjConvStop(hdfsdm_filter);
  1642. }
  1643. /* Return function status */
  1644. return status;
  1645. }
  1646. /**
  1647. * @brief This function allows to start injected conversion in interrupt mode.
  1648. * @note This function should be called only when DFSDM filter instance is
  1649. * in idle state or if regular conversion is ongoing.
  1650. * @param hdfsdm_filter DFSDM filter handle.
  1651. * @retval HAL status
  1652. */
  1653. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1654. {
  1655. HAL_StatusTypeDef status = HAL_OK;
  1656. /* Check parameters */
  1657. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1658. /* Check DFSDM filter state */
  1659. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1660. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
  1661. {
  1662. /* Enable interrupts for injected conversions */
  1663. hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
  1664. /* Start injected conversion */
  1665. DFSDM_InjConvStart(hdfsdm_filter);
  1666. }
  1667. else
  1668. {
  1669. status = HAL_ERROR;
  1670. }
  1671. /* Return function status */
  1672. return status;
  1673. }
  1674. /**
  1675. * @brief This function allows to stop injected conversion in interrupt mode.
  1676. * @note This function should be called only if injected conversion is ongoing.
  1677. * @param hdfsdm_filter DFSDM filter handle.
  1678. * @retval HAL status
  1679. */
  1680. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1681. {
  1682. HAL_StatusTypeDef status = HAL_OK;
  1683. /* Check parameters */
  1684. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1685. /* Check DFSDM filter state */
  1686. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
  1687. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1688. {
  1689. /* Return error status */
  1690. status = HAL_ERROR;
  1691. }
  1692. else
  1693. {
  1694. /* Disable interrupts for injected conversions */
  1695. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
  1696. /* Stop injected conversion */
  1697. DFSDM_InjConvStop(hdfsdm_filter);
  1698. }
  1699. /* Return function status */
  1700. return status;
  1701. }
  1702. /**
  1703. * @brief This function allows to start injected conversion in DMA mode.
  1704. * @note This function should be called only when DFSDM filter instance is
  1705. * in idle state or if regular conversion is ongoing.
  1706. * Please note that data on buffer will contain signed injected conversion
  1707. * value on 24 most significant bits and corresponding channel on 3 least
  1708. * significant bits.
  1709. * @param hdfsdm_filter DFSDM filter handle.
  1710. * @param pData The destination buffer address.
  1711. * @param Length The length of data to be transferred from DFSDM filter to memory.
  1712. * @retval HAL status
  1713. */
  1714. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1715. int32_t *pData,
  1716. uint32_t Length)
  1717. {
  1718. HAL_StatusTypeDef status = HAL_OK;
  1719. /* Check parameters */
  1720. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1721. /* Check destination address and length */
  1722. if((pData == NULL) || (Length == 0))
  1723. {
  1724. status = HAL_ERROR;
  1725. }
  1726. /* Check that DMA is enabled for injected conversion */
  1727. else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
  1728. {
  1729. status = HAL_ERROR;
  1730. }
  1731. /* Check parameters compatibility */
  1732. else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1733. (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
  1734. (Length > hdfsdm_filter->InjConvRemaining))
  1735. {
  1736. status = HAL_ERROR;
  1737. }
  1738. else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1739. (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
  1740. {
  1741. status = HAL_ERROR;
  1742. }
  1743. /* Check DFSDM filter state */
  1744. else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1745. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
  1746. {
  1747. /* Set callbacks on DMA handler */
  1748. hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
  1749. hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
  1750. hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
  1751. DFSDM_DMAInjectedHalfConvCplt : NULL;
  1752. /* Start DMA in interrupt mode */
  1753. if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)&hdfsdm_filter->Instance->FLTJDATAR, \
  1754. (uint32_t) pData, Length) != HAL_OK)
  1755. {
  1756. /* Set DFSDM filter in error state */
  1757. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1758. status = HAL_ERROR;
  1759. }
  1760. else
  1761. {
  1762. /* Start injected conversion */
  1763. DFSDM_InjConvStart(hdfsdm_filter);
  1764. }
  1765. }
  1766. else
  1767. {
  1768. status = HAL_ERROR;
  1769. }
  1770. /* Return function status */
  1771. return status;
  1772. }
  1773. /**
  1774. * @brief This function allows to start injected conversion in DMA mode and to get
  1775. * only the 16 most significant bits of conversion.
  1776. * @note This function should be called only when DFSDM filter instance is
  1777. * in idle state or if regular conversion is ongoing.
  1778. * Please note that data on buffer will contain signed 16 most significant
  1779. * bits of injected conversion.
  1780. * @param hdfsdm_filter DFSDM filter handle.
  1781. * @param pData The destination buffer address.
  1782. * @param Length The length of data to be transferred from DFSDM filter to memory.
  1783. * @retval HAL status
  1784. */
  1785. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1786. int16_t *pData,
  1787. uint32_t Length)
  1788. {
  1789. HAL_StatusTypeDef status = HAL_OK;
  1790. /* Check parameters */
  1791. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1792. /* Check destination address and length */
  1793. if((pData == NULL) || (Length == 0))
  1794. {
  1795. status = HAL_ERROR;
  1796. }
  1797. /* Check that DMA is enabled for injected conversion */
  1798. else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
  1799. {
  1800. status = HAL_ERROR;
  1801. }
  1802. /* Check parameters compatibility */
  1803. else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1804. (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
  1805. (Length > hdfsdm_filter->InjConvRemaining))
  1806. {
  1807. status = HAL_ERROR;
  1808. }
  1809. else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1810. (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
  1811. {
  1812. status = HAL_ERROR;
  1813. }
  1814. /* Check DFSDM filter state */
  1815. else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1816. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
  1817. {
  1818. /* Set callbacks on DMA handler */
  1819. hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
  1820. hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
  1821. hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
  1822. DFSDM_DMAInjectedHalfConvCplt : NULL;
  1823. /* Start DMA in interrupt mode */
  1824. if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)(&hdfsdm_filter->Instance->FLTJDATAR) + 2, \
  1825. (uint32_t) pData, Length) != HAL_OK)
  1826. {
  1827. /* Set DFSDM filter in error state */
  1828. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1829. status = HAL_ERROR;
  1830. }
  1831. else
  1832. {
  1833. /* Start injected conversion */
  1834. DFSDM_InjConvStart(hdfsdm_filter);
  1835. }
  1836. }
  1837. else
  1838. {
  1839. status = HAL_ERROR;
  1840. }
  1841. /* Return function status */
  1842. return status;
  1843. }
  1844. /**
  1845. * @brief This function allows to stop injected conversion in DMA mode.
  1846. * @note This function should be called only if injected conversion is ongoing.
  1847. * @param hdfsdm_filter DFSDM filter handle.
  1848. * @retval HAL status
  1849. */
  1850. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1851. {
  1852. HAL_StatusTypeDef status = HAL_OK;
  1853. /* Check parameters */
  1854. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1855. /* Check DFSDM filter state */
  1856. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
  1857. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1858. {
  1859. /* Return error status */
  1860. status = HAL_ERROR;
  1861. }
  1862. else
  1863. {
  1864. /* Stop current DMA transfer */
  1865. if(HAL_DMA_Abort(hdfsdm_filter->hdmaInj) != HAL_OK)
  1866. {
  1867. /* Set DFSDM filter in error state */
  1868. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1869. status = HAL_ERROR;
  1870. }
  1871. else
  1872. {
  1873. /* Stop regular conversion */
  1874. DFSDM_InjConvStop(hdfsdm_filter);
  1875. }
  1876. }
  1877. /* Return function status */
  1878. return status;
  1879. }
  1880. /**
  1881. * @brief This function allows to get injected conversion value.
  1882. * @param hdfsdm_filter DFSDM filter handle.
  1883. * @param Channel Corresponding channel of injected conversion.
  1884. * @retval Injected conversion value
  1885. */
  1886. int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1887. uint32_t *Channel)
  1888. {
  1889. uint32_t reg = 0;
  1890. int32_t value = 0;
  1891. /* Check parameters */
  1892. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1893. assert_param(Channel != NULL);
  1894. /* Get value of data register for injected channel */
  1895. reg = hdfsdm_filter->Instance->FLTJDATAR;
  1896. /* Extract channel and injected conversion value */
  1897. *Channel = (reg & DFSDM_FLTJDATAR_JDATACH);
  1898. value = ((int32_t)(reg & DFSDM_FLTJDATAR_JDATA) >> DFSDM_FLTJDATAR_JDATA_Pos);
  1899. /* return regular conversion value */
  1900. return value;
  1901. }
  1902. /**
  1903. * @brief This function allows to start filter analog watchdog in interrupt mode.
  1904. * @param hdfsdm_filter DFSDM filter handle.
  1905. * @param awdParam DFSDM filter analog watchdog parameters.
  1906. * @retval HAL status
  1907. */
  1908. HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1909. DFSDM_Filter_AwdParamTypeDef *awdParam)
  1910. {
  1911. HAL_StatusTypeDef status = HAL_OK;
  1912. /* Check parameters */
  1913. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1914. assert_param(IS_DFSDM_FILTER_AWD_DATA_SOURCE(awdParam->DataSource));
  1915. assert_param(IS_DFSDM_INJECTED_CHANNEL(awdParam->Channel));
  1916. assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->HighThreshold));
  1917. assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->LowThreshold));
  1918. assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->HighBreakSignal));
  1919. assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->LowBreakSignal));
  1920. /* Check DFSDM filter state */
  1921. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
  1922. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
  1923. {
  1924. /* Return error status */
  1925. status = HAL_ERROR;
  1926. }
  1927. else
  1928. {
  1929. /* Set analog watchdog data source */
  1930. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
  1931. hdfsdm_filter->Instance->FLTCR1 |= awdParam->DataSource;
  1932. /* Set thresholds and break signals */
  1933. hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
  1934. hdfsdm_filter->Instance->FLTAWHTR |= (((uint32_t) awdParam->HighThreshold << DFSDM_FLTAWHTR_AWHT_Pos) | \
  1935. awdParam->HighBreakSignal);
  1936. hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
  1937. hdfsdm_filter->Instance->FLTAWLTR |= (((uint32_t) awdParam->LowThreshold << DFSDM_FLTAWLTR_AWLT_Pos) | \
  1938. awdParam->LowBreakSignal);
  1939. /* Set channels and interrupt for analog watchdog */
  1940. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH);
  1941. hdfsdm_filter->Instance->FLTCR2 |= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_AWDCH_Pos) | \
  1942. DFSDM_FLTCR2_AWDIE);
  1943. }
  1944. /* Return function status */
  1945. return status;
  1946. }
  1947. /**
  1948. * @brief This function allows to stop filter analog watchdog in interrupt mode.
  1949. * @param hdfsdm_filter DFSDM filter handle.
  1950. * @retval HAL status
  1951. */
  1952. HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1953. {
  1954. HAL_StatusTypeDef status = HAL_OK;
  1955. /* Check parameters */
  1956. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1957. /* Check DFSDM filter state */
  1958. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
  1959. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
  1960. {
  1961. /* Return error status */
  1962. status = HAL_ERROR;
  1963. }
  1964. else
  1965. {
  1966. /* Reset channels for analog watchdog and deactivate interrupt */
  1967. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH | DFSDM_FLTCR2_AWDIE);
  1968. /* Clear all analog watchdog flags */
  1969. hdfsdm_filter->Instance->FLTAWCFR = (DFSDM_FLTAWCFR_CLRAWHTF | DFSDM_FLTAWCFR_CLRAWLTF);
  1970. /* Reset thresholds and break signals */
  1971. hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
  1972. hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
  1973. /* Reset analog watchdog data source */
  1974. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
  1975. }
  1976. /* Return function status */
  1977. return status;
  1978. }
  1979. /**
  1980. * @brief This function allows to start extreme detector feature.
  1981. * @param hdfsdm_filter DFSDM filter handle.
  1982. * @param Channel Channels where extreme detector is enabled.
  1983. * This parameter can be a values combination of @ref DFSDM_Channel_Selection.
  1984. * @retval HAL status
  1985. */
  1986. HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1987. uint32_t Channel)
  1988. {
  1989. HAL_StatusTypeDef status = HAL_OK;
  1990. /* Check parameters */
  1991. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1992. assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
  1993. /* Check DFSDM filter state */
  1994. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
  1995. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
  1996. {
  1997. /* Return error status */
  1998. status = HAL_ERROR;
  1999. }
  2000. else
  2001. {
  2002. /* Set channels for extreme detector */
  2003. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
  2004. hdfsdm_filter->Instance->FLTCR2 |= ((Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_EXCH_Pos);
  2005. }
  2006. /* Return function status */
  2007. return status;
  2008. }
  2009. /**
  2010. * @brief This function allows to stop extreme detector feature.
  2011. * @param hdfsdm_filter DFSDM filter handle.
  2012. * @retval HAL status
  2013. */
  2014. HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2015. {
  2016. HAL_StatusTypeDef status = HAL_OK;
  2017. __IO uint32_t reg1;
  2018. __IO uint32_t reg2;
  2019. /* Check parameters */
  2020. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2021. /* Check DFSDM filter state */
  2022. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
  2023. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
  2024. {
  2025. /* Return error status */
  2026. status = HAL_ERROR;
  2027. }
  2028. else
  2029. {
  2030. /* Reset channels for extreme detector */
  2031. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
  2032. /* Clear extreme detector values */
  2033. reg1 = hdfsdm_filter->Instance->FLTEXMAX;
  2034. reg2 = hdfsdm_filter->Instance->FLTEXMIN;
  2035. UNUSED(reg1); /* To avoid GCC warning */
  2036. UNUSED(reg2); /* To avoid GCC warning */
  2037. }
  2038. /* Return function status */
  2039. return status;
  2040. }
  2041. /**
  2042. * @brief This function allows to get extreme detector maximum value.
  2043. * @param hdfsdm_filter DFSDM filter handle.
  2044. * @param Channel Corresponding channel.
  2045. * @retval Extreme detector maximum value
  2046. * This value is between Min_Data = -8388608 and Max_Data = 8388607.
  2047. */
  2048. int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2049. uint32_t *Channel)
  2050. {
  2051. uint32_t reg = 0;
  2052. int32_t value = 0;
  2053. /* Check parameters */
  2054. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2055. assert_param(Channel != NULL);
  2056. /* Get value of extreme detector maximum register */
  2057. reg = hdfsdm_filter->Instance->FLTEXMAX;
  2058. /* Extract channel and extreme detector maximum value */
  2059. *Channel = (reg & DFSDM_FLTEXMAX_EXMAXCH);
  2060. value = ((int32_t)(reg & DFSDM_FLTEXMAX_EXMAX) >> DFSDM_FLTEXMAX_EXMAX_Pos);
  2061. /* return extreme detector maximum value */
  2062. return value;
  2063. }
  2064. /**
  2065. * @brief This function allows to get extreme detector minimum value.
  2066. * @param hdfsdm_filter DFSDM filter handle.
  2067. * @param Channel Corresponding channel.
  2068. * @retval Extreme detector minimum value
  2069. * This value is between Min_Data = -8388608 and Max_Data = 8388607.
  2070. */
  2071. int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2072. uint32_t *Channel)
  2073. {
  2074. uint32_t reg = 0;
  2075. int32_t value = 0;
  2076. /* Check parameters */
  2077. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2078. assert_param(Channel != NULL);
  2079. /* Get value of extreme detector minimum register */
  2080. reg = hdfsdm_filter->Instance->FLTEXMIN;
  2081. /* Extract channel and extreme detector minimum value */
  2082. *Channel = (reg & DFSDM_FLTEXMIN_EXMINCH);
  2083. value = ((int32_t)(reg & DFSDM_FLTEXMIN_EXMIN) >> DFSDM_FLTEXMIN_EXMIN_Pos);
  2084. /* return extreme detector minimum value */
  2085. return value;
  2086. }
  2087. /**
  2088. * @brief This function allows to get conversion time value.
  2089. * @param hdfsdm_filter DFSDM filter handle.
  2090. * @retval Conversion time value
  2091. * @note To get time in second, this value has to be divided by DFSDM clock frequency.
  2092. */
  2093. uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2094. {
  2095. uint32_t reg = 0;
  2096. uint32_t value = 0;
  2097. /* Check parameters */
  2098. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2099. /* Get value of conversion timer register */
  2100. reg = hdfsdm_filter->Instance->FLTCNVTIMR;
  2101. /* Extract conversion time value */
  2102. value = ((reg & DFSDM_FLTCNVTIMR_CNVCNT) >> DFSDM_FLTCNVTIMR_CNVCNT_Pos);
  2103. /* return extreme detector minimum value */
  2104. return value;
  2105. }
  2106. /**
  2107. * @brief This function handles the DFSDM interrupts.
  2108. * @param hdfsdm_filter DFSDM filter handle.
  2109. * @retval None
  2110. */
  2111. void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2112. {
  2113. /* Check if overrun occurs during regular conversion */
  2114. if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) != 0) && \
  2115. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_ROVRIE) != 0))
  2116. {
  2117. /* Clear regular overrun flag */
  2118. hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
  2119. /* Update error code */
  2120. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
  2121. /* Call error callback */
  2122. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  2123. }
  2124. /* Check if overrun occurs during injected conversion */
  2125. else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) != 0) && \
  2126. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_JOVRIE) != 0))
  2127. {
  2128. /* Clear injected overrun flag */
  2129. hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
  2130. /* Update error code */
  2131. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
  2132. /* Call error callback */
  2133. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  2134. }
  2135. /* Check if end of regular conversion */
  2136. else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != 0) && \
  2137. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_REOCIE) != 0))
  2138. {
  2139. /* Call regular conversion complete callback */
  2140. HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
  2141. /* End of conversion if mode is not continuous and software trigger */
  2142. if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  2143. (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
  2144. {
  2145. /* Disable interrupts for regular conversions */
  2146. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE);
  2147. /* Update DFSDM filter state */
  2148. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
  2149. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
  2150. }
  2151. }
  2152. /* Check if end of injected conversion */
  2153. else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != 0) && \
  2154. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_JEOCIE) != 0))
  2155. {
  2156. /* Call injected conversion complete callback */
  2157. HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
  2158. /* Update remaining injected conversions */
  2159. hdfsdm_filter->InjConvRemaining--;
  2160. if(hdfsdm_filter->InjConvRemaining == 0)
  2161. {
  2162. /* End of conversion if trigger is software */
  2163. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  2164. {
  2165. /* Disable interrupts for injected conversions */
  2166. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE);
  2167. /* Update DFSDM filter state */
  2168. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
  2169. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
  2170. }
  2171. /* end of injected sequence, reset the value */
  2172. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  2173. hdfsdm_filter->InjectedChannelsNbr : 1;
  2174. }
  2175. }
  2176. /* Check if analog watchdog occurs */
  2177. else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_AWDF) != 0) && \
  2178. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_AWDIE) != 0))
  2179. {
  2180. uint32_t reg = 0;
  2181. uint32_t threshold = 0;
  2182. uint32_t channel = 0;
  2183. /* Get channel and threshold */
  2184. reg = hdfsdm_filter->Instance->FLTAWSR;
  2185. threshold = ((reg & DFSDM_FLTAWSR_AWLTF) != 0) ? DFSDM_AWD_LOW_THRESHOLD : DFSDM_AWD_HIGH_THRESHOLD;
  2186. if(threshold == DFSDM_AWD_HIGH_THRESHOLD)
  2187. {
  2188. reg = reg >> DFSDM_FLTAWSR_AWHTF_Pos;
  2189. }
  2190. while((reg & 1) == 0)
  2191. {
  2192. channel++;
  2193. reg = reg >> 1;
  2194. }
  2195. /* Clear analog watchdog flag */
  2196. hdfsdm_filter->Instance->FLTAWCFR = (threshold == DFSDM_AWD_HIGH_THRESHOLD) ? \
  2197. (1 << (DFSDM_FLTAWSR_AWHTF_Pos + channel)) : \
  2198. (1 << channel);
  2199. /* Call analog watchdog callback */
  2200. HAL_DFSDM_FilterAwdCallback(hdfsdm_filter, channel, threshold);
  2201. }
  2202. /* Check if clock absence occurs */
  2203. else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
  2204. ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) != 0) && \
  2205. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_CKABIE) != 0))
  2206. {
  2207. uint32_t reg = 0;
  2208. uint32_t channel = 0;
  2209. reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_Pos);
  2210. while(channel < DFSDM1_CHANNEL_NUMBER)
  2211. {
  2212. /* Check if flag is set and corresponding channel is enabled */
  2213. if(((reg & 1) != 0) && (a_dfsdm1ChannelHandle[channel] != NULL))
  2214. {
  2215. /* Check clock absence has been enabled for this channel */
  2216. if((a_dfsdm1ChannelHandle[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0)
  2217. {
  2218. /* Clear clock absence flag */
  2219. hdfsdm_filter->Instance->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
  2220. /* Call clock absence callback */
  2221. HAL_DFSDM_ChannelCkabCallback(a_dfsdm1ChannelHandle[channel]);
  2222. }
  2223. }
  2224. channel++;
  2225. reg = reg >> 1;
  2226. }
  2227. }
  2228. /* Check if short circuit detection occurs */
  2229. else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
  2230. ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) != 0) && \
  2231. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_SCDIE) != 0))
  2232. {
  2233. uint32_t reg = 0;
  2234. uint32_t channel = 0;
  2235. /* Get channel */
  2236. reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_Pos);
  2237. while((reg & 1) == 0)
  2238. {
  2239. channel++;
  2240. reg = reg >> 1;
  2241. }
  2242. /* Clear short circuit detection flag */
  2243. hdfsdm_filter->Instance->FLTICR = (1 << (DFSDM_FLTICR_CLRSCSDF_Pos + channel));
  2244. /* Call short circuit detection callback */
  2245. HAL_DFSDM_ChannelScdCallback(a_dfsdm1ChannelHandle[channel]);
  2246. }
  2247. }
  2248. /**
  2249. * @brief Regular conversion complete callback.
  2250. * @note In interrupt mode, user has to read conversion value in this function
  2251. * using HAL_DFSDM_FilterGetRegularValue.
  2252. * @param hdfsdm_filter DFSDM filter handle.
  2253. * @retval None
  2254. */
  2255. __weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2256. {
  2257. /* Prevent unused argument(s) compilation warning */
  2258. UNUSED(hdfsdm_filter);
  2259. /* NOTE : This function should not be modified, when the callback is needed,
  2260. the HAL_DFSDM_FilterRegConvCpltCallback could be implemented in the user file.
  2261. */
  2262. }
  2263. /**
  2264. * @brief Half regular conversion complete callback.
  2265. * @param hdfsdm_filter DFSDM filter handle.
  2266. * @retval None
  2267. */
  2268. __weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2269. {
  2270. /* Prevent unused argument(s) compilation warning */
  2271. UNUSED(hdfsdm_filter);
  2272. /* NOTE : This function should not be modified, when the callback is needed,
  2273. the HAL_DFSDM_FilterRegConvHalfCpltCallback could be implemented in the user file.
  2274. */
  2275. }
  2276. /**
  2277. * @brief Injected conversion complete callback.
  2278. * @note In interrupt mode, user has to read conversion value in this function
  2279. * using HAL_DFSDM_FilterGetInjectedValue.
  2280. * @param hdfsdm_filter DFSDM filter handle.
  2281. * @retval None
  2282. */
  2283. __weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2284. {
  2285. /* Prevent unused argument(s) compilation warning */
  2286. UNUSED(hdfsdm_filter);
  2287. /* NOTE : This function should not be modified, when the callback is needed,
  2288. the HAL_DFSDM_FilterInjConvCpltCallback could be implemented in the user file.
  2289. */
  2290. }
  2291. /**
  2292. * @brief Half injected conversion complete callback.
  2293. * @param hdfsdm_filter DFSDM filter handle.
  2294. * @retval None
  2295. */
  2296. __weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2297. {
  2298. /* Prevent unused argument(s) compilation warning */
  2299. UNUSED(hdfsdm_filter);
  2300. /* NOTE : This function should not be modified, when the callback is needed,
  2301. the HAL_DFSDM_FilterInjConvHalfCpltCallback could be implemented in the user file.
  2302. */
  2303. }
  2304. /**
  2305. * @brief Filter analog watchdog callback.
  2306. * @param hdfsdm_filter DFSDM filter handle.
  2307. * @param Channel Corresponding channel.
  2308. * @param Threshold Low or high threshold has been reached.
  2309. * @retval None
  2310. */
  2311. __weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2312. uint32_t Channel, uint32_t Threshold)
  2313. {
  2314. /* Prevent unused argument(s) compilation warning */
  2315. UNUSED(hdfsdm_filter);
  2316. UNUSED(Channel);
  2317. UNUSED(Threshold);
  2318. /* NOTE : This function should not be modified, when the callback is needed,
  2319. the HAL_DFSDM_FilterAwdCallback could be implemented in the user file.
  2320. */
  2321. }
  2322. /**
  2323. * @brief Error callback.
  2324. * @param hdfsdm_filter DFSDM filter handle.
  2325. * @retval None
  2326. */
  2327. __weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2328. {
  2329. /* Prevent unused argument(s) compilation warning */
  2330. UNUSED(hdfsdm_filter);
  2331. /* NOTE : This function should not be modified, when the callback is needed,
  2332. the HAL_DFSDM_FilterErrorCallback could be implemented in the user file.
  2333. */
  2334. }
  2335. /**
  2336. * @}
  2337. */
  2338. /** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions
  2339. * @brief Filter state functions
  2340. *
  2341. @verbatim
  2342. ==============================================================================
  2343. ##### Filter state functions #####
  2344. ==============================================================================
  2345. [..] This section provides functions allowing to:
  2346. (+) Get the DFSDM filter state.
  2347. (+) Get the DFSDM filter error.
  2348. @endverbatim
  2349. * @{
  2350. */
  2351. /**
  2352. * @brief This function allows to get the current DFSDM filter handle state.
  2353. * @param hdfsdm_filter DFSDM filter handle.
  2354. * @retval DFSDM filter state.
  2355. */
  2356. HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2357. {
  2358. /* Return DFSDM filter handle state */
  2359. return hdfsdm_filter->State;
  2360. }
  2361. /**
  2362. * @brief This function allows to get the current DFSDM filter error.
  2363. * @param hdfsdm_filter DFSDM filter handle.
  2364. * @retval DFSDM filter error code.
  2365. */
  2366. uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2367. {
  2368. return hdfsdm_filter->ErrorCode;
  2369. }
  2370. /**
  2371. * @}
  2372. */
  2373. /**
  2374. * @}
  2375. */
  2376. /* End of exported functions -------------------------------------------------*/
  2377. /* Private functions ---------------------------------------------------------*/
  2378. /** @addtogroup DFSDM_Private_Functions DFSDM Private Functions
  2379. * @{
  2380. */
  2381. /**
  2382. * @brief DMA half transfer complete callback for regular conversion.
  2383. * @param hdma DMA handle.
  2384. * @retval None
  2385. */
  2386. static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma)
  2387. {
  2388. /* Get DFSDM filter handle */
  2389. DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  2390. /* Call regular half conversion complete callback */
  2391. HAL_DFSDM_FilterRegConvHalfCpltCallback(hdfsdm_filter);
  2392. }
  2393. /**
  2394. * @brief DMA transfer complete callback for regular conversion.
  2395. * @param hdma DMA handle.
  2396. * @retval None
  2397. */
  2398. static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma)
  2399. {
  2400. /* Get DFSDM filter handle */
  2401. DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  2402. /* Call regular conversion complete callback */
  2403. HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
  2404. }
  2405. /**
  2406. * @brief DMA half transfer complete callback for injected conversion.
  2407. * @param hdma DMA handle.
  2408. * @retval None
  2409. */
  2410. static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma)
  2411. {
  2412. /* Get DFSDM filter handle */
  2413. DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  2414. /* Call injected half conversion complete callback */
  2415. HAL_DFSDM_FilterInjConvHalfCpltCallback(hdfsdm_filter);
  2416. }
  2417. /**
  2418. * @brief DMA transfer complete callback for injected conversion.
  2419. * @param hdma DMA handle.
  2420. * @retval None
  2421. */
  2422. static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma)
  2423. {
  2424. /* Get DFSDM filter handle */
  2425. DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  2426. /* Call injected conversion complete callback */
  2427. HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
  2428. }
  2429. /**
  2430. * @brief DMA error callback.
  2431. * @param hdma DMA handle.
  2432. * @retval None
  2433. */
  2434. static void DFSDM_DMAError(DMA_HandleTypeDef *hdma)
  2435. {
  2436. /* Get DFSDM filter handle */
  2437. DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  2438. /* Update error code */
  2439. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_DMA;
  2440. /* Call error callback */
  2441. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  2442. }
  2443. /**
  2444. * @brief This function allows to get the number of injected channels.
  2445. * @param Channels bitfield of injected channels.
  2446. * @retval Number of injected channels.
  2447. */
  2448. static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels)
  2449. {
  2450. uint32_t nbChannels = 0;
  2451. uint32_t tmp;
  2452. /* Get the number of channels from bitfield */
  2453. tmp = (uint32_t) (Channels & DFSDM_LSB_MASK);
  2454. while(tmp != 0)
  2455. {
  2456. if((tmp & 1) != 0)
  2457. {
  2458. nbChannels++;
  2459. }
  2460. tmp = (uint32_t) (tmp >> 1);
  2461. }
  2462. return nbChannels;
  2463. }
  2464. /**
  2465. * @brief This function allows to get the channel number from channel instance.
  2466. * @param Instance DFSDM channel instance.
  2467. * @retval Channel number.
  2468. */
  2469. static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance)
  2470. {
  2471. uint32_t channel = 0xFF;
  2472. /* Get channel from instance */
  2473. if(Instance == DFSDM1_Channel0)
  2474. {
  2475. channel = 0;
  2476. }
  2477. else if(Instance == DFSDM1_Channel1)
  2478. {
  2479. channel = 1;
  2480. }
  2481. else if(Instance == DFSDM1_Channel2)
  2482. {
  2483. channel = 2;
  2484. }
  2485. else if(Instance == DFSDM1_Channel3)
  2486. {
  2487. channel = 3;
  2488. }
  2489. else if(Instance == DFSDM1_Channel4)
  2490. {
  2491. channel = 4;
  2492. }
  2493. else if(Instance == DFSDM1_Channel5)
  2494. {
  2495. channel = 5;
  2496. }
  2497. else if(Instance == DFSDM1_Channel6)
  2498. {
  2499. channel = 6;
  2500. }
  2501. else if(Instance == DFSDM1_Channel7)
  2502. {
  2503. channel = 7;
  2504. }
  2505. return channel;
  2506. }
  2507. /**
  2508. * @brief This function allows to really start regular conversion.
  2509. * @param hdfsdm_filter DFSDM filter handle.
  2510. * @retval None
  2511. */
  2512. static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
  2513. {
  2514. /* Check regular trigger */
  2515. if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)
  2516. {
  2517. /* Software start of regular conversion */
  2518. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
  2519. }
  2520. else /* synchronous trigger */
  2521. {
  2522. /* Disable DFSDM filter */
  2523. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  2524. /* Set RSYNC bit in DFSDM_FLTCR1 register */
  2525. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSYNC;
  2526. /* Enable DFSDM filter */
  2527. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  2528. /* If injected conversion was in progress, restart it */
  2529. if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)
  2530. {
  2531. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  2532. {
  2533. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
  2534. }
  2535. /* Update remaining injected conversions */
  2536. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  2537. hdfsdm_filter->InjectedChannelsNbr : 1;
  2538. }
  2539. }
  2540. /* Update DFSDM filter state */
  2541. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
  2542. HAL_DFSDM_FILTER_STATE_REG : HAL_DFSDM_FILTER_STATE_REG_INJ;
  2543. }
  2544. /**
  2545. * @brief This function allows to really stop regular conversion.
  2546. * @param hdfsdm_filter DFSDM filter handle.
  2547. * @retval None
  2548. */
  2549. static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
  2550. {
  2551. /* Disable DFSDM filter */
  2552. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  2553. /* If regular trigger was synchronous, reset RSYNC bit in DFSDM_FLTCR1 register */
  2554. if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SYNC_TRIGGER)
  2555. {
  2556. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
  2557. }
  2558. /* Enable DFSDM filter */
  2559. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  2560. /* If injected conversion was in progress, restart it */
  2561. if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ)
  2562. {
  2563. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  2564. {
  2565. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
  2566. }
  2567. /* Update remaining injected conversions */
  2568. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  2569. hdfsdm_filter->InjectedChannelsNbr : 1;
  2570. }
  2571. /* Update DFSDM filter state */
  2572. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
  2573. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
  2574. }
  2575. /**
  2576. * @brief This function allows to really start injected conversion.
  2577. * @param hdfsdm_filter DFSDM filter handle.
  2578. * @retval None
  2579. */
  2580. static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
  2581. {
  2582. /* Check injected trigger */
  2583. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  2584. {
  2585. /* Software start of injected conversion */
  2586. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
  2587. }
  2588. else /* external or synchronous trigger */
  2589. {
  2590. /* Disable DFSDM filter */
  2591. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  2592. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
  2593. {
  2594. /* Set JSYNC bit in DFSDM_FLTCR1 register */
  2595. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSYNC;
  2596. }
  2597. else /* external trigger */
  2598. {
  2599. /* Set JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
  2600. hdfsdm_filter->Instance->FLTCR1 |= hdfsdm_filter->ExtTriggerEdge;
  2601. }
  2602. /* Enable DFSDM filter */
  2603. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  2604. /* If regular conversion was in progress, restart it */
  2605. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) && \
  2606. (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
  2607. {
  2608. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
  2609. }
  2610. }
  2611. /* Update DFSDM filter state */
  2612. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
  2613. HAL_DFSDM_FILTER_STATE_INJ : HAL_DFSDM_FILTER_STATE_REG_INJ;
  2614. }
  2615. /**
  2616. * @brief This function allows to really stop injected conversion.
  2617. * @param hdfsdm_filter DFSDM filter handle.
  2618. * @retval None
  2619. */
  2620. static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
  2621. {
  2622. /* Disable DFSDM filter */
  2623. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  2624. /* If injected trigger was synchronous, reset JSYNC bit in DFSDM_FLTCR1 register */
  2625. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
  2626. {
  2627. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC);
  2628. }
  2629. else if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_EXT_TRIGGER)
  2630. {
  2631. /* Reset JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
  2632. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JEXTEN);
  2633. }
  2634. /* Enable DFSDM filter */
  2635. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  2636. /* If regular conversion was in progress, restart it */
  2637. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) && \
  2638. (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
  2639. {
  2640. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
  2641. }
  2642. /* Update remaining injected conversions */
  2643. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  2644. hdfsdm_filter->InjectedChannelsNbr : 1;
  2645. /* Update DFSDM filter state */
  2646. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
  2647. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
  2648. }
  2649. /**
  2650. * @}
  2651. */
  2652. /* End of private functions --------------------------------------------------*/
  2653. /**
  2654. * @}
  2655. */
  2656. #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
  2657. #endif /* HAL_DFSDM_MODULE_ENABLED */
  2658. /**
  2659. * @}
  2660. */
  2661. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/