stm32l0xx_hal_pwr.h 17 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l0xx_hal_pwr.h
  4. * @author MCD Application Team
  5. * @version V1.7.0
  6. * @date 31-May-2016
  7. * @brief Header file of PWR HAL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32L0xx_HAL_PWR_H
  39. #define __STM32L0xx_HAL_PWR_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. /* Includes ------------------------------------------------------------------*/
  44. #include "stm32l0xx_hal_def.h"
  45. /** @addtogroup STM32L0xx_HAL_Driver
  46. * @{
  47. */
  48. /** @defgroup PWR PWR
  49. * @{
  50. */
  51. /** @defgroup PWR_Exported_Types PWR Exported Types
  52. * @{
  53. */
  54. /**
  55. * @brief PWR PVD configuration structure definition
  56. */
  57. typedef struct
  58. {
  59. uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
  60. This parameter can be a value of @ref PWR_PVD_detection_level */
  61. uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
  62. This parameter can be a value of @ref PWR_PVD_Mode */
  63. }PWR_PVDTypeDef;
  64. /**
  65. * @}
  66. */
  67. /** @addtogroup PWR_Private
  68. * @{
  69. */
  70. #define PWR_EXTI_LINE_PVD EXTI_FTSR_TR16 /*!< External interrupt line 16 Connected to the PVD EXTI Line */
  71. /**
  72. * @}
  73. */
  74. /** @defgroup PWR_Exported_Constants PWR Exported Constants
  75. * @{
  76. */
  77. /** @defgroup PWR_register_alias_address PWR Register alias address
  78. * @{
  79. */
  80. #define PWR_WAKEUP_PIN1 PWR_CSR_EWUP1
  81. #define PWR_WAKEUP_PIN2 PWR_CSR_EWUP2
  82. #if defined (STM32L011xx) || defined (STM32L021xx) || defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L071xx) || \
  83. defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
  84. #define PWR_WAKEUP_PIN3 PWR_CSR_EWUP3
  85. #endif
  86. /**
  87. * @}
  88. */
  89. /** @defgroup PWR_PVD_detection_level PVD detection level
  90. * @{
  91. */
  92. #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
  93. #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
  94. #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
  95. #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
  96. #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
  97. #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
  98. #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
  99. #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7 /* External input analog voltage
  100. (Compare internally to VREFINT) */
  101. /**
  102. * @}
  103. */
  104. /** @defgroup PWR_PVD_Mode PWR PVD Mode
  105. * @{
  106. */
  107. #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000U) /*!< basic mode is used */
  108. #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001U) /*!< External Interrupt Mode with Rising edge trigger detection */
  109. #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002U) /*!< External Interrupt Mode with Falling edge trigger detection */
  110. #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
  111. #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001U) /*!< Event Mode with Rising edge trigger detection */
  112. #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002U) /*!< Event Mode with Falling edge trigger detection */
  113. #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003U) /*!< Event Mode with Rising/Falling edge trigger detection */
  114. /**
  115. * @}
  116. */
  117. /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode
  118. * @{
  119. */
  120. #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000U)
  121. #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPSDSR
  122. /**
  123. * @}
  124. */
  125. /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
  126. * @{
  127. */
  128. #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01U)
  129. #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02U)
  130. /**
  131. * @}
  132. */
  133. /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
  134. * @{
  135. */
  136. #define PWR_STOPENTRY_WFI ((uint8_t)0x01U)
  137. #define PWR_STOPENTRY_WFE ((uint8_t)0x02U)
  138. /**
  139. * @}
  140. */
  141. /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale
  142. * @{
  143. */
  144. #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS_0
  145. #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1
  146. #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS
  147. #define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
  148. ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
  149. ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
  150. /**
  151. * @}
  152. */
  153. /** @defgroup PWR_Flag PWR Flag
  154. * @{
  155. */
  156. #define PWR_FLAG_WU PWR_CSR_WUF
  157. #define PWR_FLAG_SB PWR_CSR_SBF
  158. #define PWR_FLAG_PVDO PWR_CSR_PVDO
  159. #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
  160. #define PWR_FLAG_VOS PWR_CSR_VOSF
  161. #define PWR_FLAG_REGLP PWR_CSR_REGLPF
  162. /**
  163. * @}
  164. */
  165. /**
  166. * @}
  167. */
  168. /** @defgroup PWR_Exported_Macro PWR Exported Macros
  169. * @{
  170. */
  171. /** @brief macros configure the main internal regulator output voltage.
  172. * When exiting Low Power Run Mode or during dynamic voltage scaling configuration,
  173. * the reference manual recommends to poll PWR_FLAG_REGLP bit to wait for the regulator
  174. * to reach main mode (resp. to get stabilized) for a transition from 0 to 1.
  175. * Only then the clock can be increased.
  176. *
  177. * @param __REGULATOR__: specifies the regulator output voltage to achieve
  178. * a tradeoff between performance and power consumption when the device does
  179. * not operate at the maximum frequency (refer to the datasheets for more details).
  180. * This parameter can be one of the following values:
  181. * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode,
  182. * System frequency up to 32 MHz.
  183. * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode,
  184. * System frequency up to 16 MHz.
  185. * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode,
  186. * System frequency up to 4.2 MHz
  187. * @retval None
  188. */
  189. #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)))
  190. /** @brief Check PWR flag is set or not.
  191. * @param __FLAG__: specifies the flag to check.
  192. * This parameter can be one of the following values:
  193. * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
  194. * was received from the WKUP pin or from the RTC alarm (Alarm B),
  195. * RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
  196. * An additional wakeup event is detected if the WKUP pin is enabled
  197. * (by setting the EWUP bit) when the WKUP pin level is already high.
  198. * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
  199. * resumed from StandBy mode.
  200. * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
  201. * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode.
  202. * For this reason, this bit is equal to 0 after Standby or reset
  203. * until the PVDE bit is set.
  204. * @arg PWR_FLAG_VREFINTRDY: Internal voltage reference (VREFINT) ready flag.
  205. * This bit indicates the state of the internal voltage reference, VREFINT.
  206. * @arg PWR_FLAG_VOS: Voltage Scaling select flag. A delay is required for
  207. * the internal regulator to be ready after the voltage range is changed.
  208. * The VOSF bit indicates that the regulator has reached the voltage level
  209. * defined with bits VOS of PWR_CR register.
  210. * @arg PWR_FLAG_REGLP: Regulator LP flag. When the MCU exits from Low power run
  211. * mode, this bit stays at 1 until the regulator is ready in main mode.
  212. * A polling on this bit is recommended to wait for the regulator main mode.
  213. * This bit is reset by hardware when the regulator is ready.
  214. * @retval The new state of __FLAG__ (TRUE or FALSE).
  215. */
  216. #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
  217. /** @brief Clear the PWR pending flags.
  218. * @param __FLAG__: specifies the flag to clear.
  219. * This parameter can be one of the following values:
  220. * @arg PWR_FLAG_WU: Wake Up flag
  221. * @arg PWR_FLAG_SB: StandBy flag
  222. */
  223. #define __HAL_PWR_CLEAR_FLAG(__FLAG__) SET_BIT(PWR->CR, (__FLAG__) << 2U)
  224. /**
  225. * @brief Enable interrupt on PVD Exti Line 16.
  226. * @retval None.
  227. */
  228. #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
  229. /**
  230. * @brief Disable interrupt on PVD Exti Line 16.
  231. * @retval None.
  232. */
  233. #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
  234. /**
  235. * @brief Enable event on PVD Exti Line 16.
  236. * @retval None.
  237. */
  238. #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
  239. /**
  240. * @brief Disable event on PVD Exti Line 16.
  241. * @retval None.
  242. */
  243. #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
  244. /**
  245. * @brief PVD EXTI line configuration: set falling edge trigger.
  246. * @retval None.
  247. */
  248. #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
  249. /**
  250. * @brief Disable the PVD Extended Interrupt Falling Trigger.
  251. * @retval None.
  252. */
  253. #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
  254. /**
  255. * @brief PVD EXTI line configuration: set rising edge trigger.
  256. * @retval None.
  257. */
  258. #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
  259. /**
  260. * @brief Disable the PVD Extended Interrupt Rising Trigger.
  261. * This parameter can be:
  262. * @retval None.
  263. */
  264. #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
  265. /**
  266. * @brief PVD EXTI line configuration: set rising & falling edge trigger.
  267. * @retval None.
  268. */
  269. #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() do { __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); } while(0);
  270. /**
  271. * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
  272. * This parameter can be:
  273. * @retval None.
  274. */
  275. #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() do { __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); } while(0);
  276. /**
  277. * @brief Check whether the specified PVD EXTI interrupt flag is set or not.
  278. * @retval EXTI PVD Line Status.
  279. */
  280. #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
  281. /**
  282. * @brief Clear the PVD EXTI flag.
  283. * @retval None.
  284. */
  285. #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
  286. /**
  287. * @brief Generate a Software interrupt on selected EXTI line.
  288. * @retval None.
  289. */
  290. #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD)
  291. /**
  292. * @brief Generate a Software interrupt on selected EXTI line.
  293. * @retval None.
  294. */
  295. #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD)
  296. /**
  297. * @}
  298. */
  299. /** @addtogroup PWR_Private
  300. * @{
  301. */
  302. #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
  303. ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
  304. ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
  305. ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
  306. #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
  307. ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
  308. ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
  309. ((MODE) == PWR_PVD_MODE_NORMAL))
  310. #if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
  311. #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
  312. ((PIN) == PWR_WAKEUP_PIN2) || \
  313. ((PIN) == PWR_WAKEUP_PIN3))
  314. #elif defined (STM32L051xx) || defined (STM32L052xx) || defined (STM32L053xx) || defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx)
  315. #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
  316. ((PIN) == PWR_WAKEUP_PIN2))
  317. #elif defined (STM32L031xx) || defined (STM32L041xx)
  318. #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
  319. ((PIN) == PWR_WAKEUP_PIN2))
  320. #elif defined (STM32L011xx) || defined (STM32L021xx)
  321. #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
  322. ((PIN) == PWR_WAKEUP_PIN3))
  323. #endif
  324. #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
  325. ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
  326. #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
  327. #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
  328. /**
  329. * @}
  330. */
  331. /* Include PWR HAL Extension module */
  332. #include "stm32l0xx_hal_pwr_ex.h"
  333. /** @defgroup PWR_Exported_Functions PWR Exported Functions
  334. * @{
  335. */
  336. /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
  337. * @{
  338. */
  339. void HAL_PWR_DeInit(void);
  340. void HAL_PWR_EnableBkUpAccess(void);
  341. void HAL_PWR_DisableBkUpAccess(void);
  342. /**
  343. * @}
  344. */
  345. /** @defgroup PWR_Exported_Functions_Group2 Low Power modes configuration functions
  346. * @{
  347. */
  348. /* PVD control functions ************************************************/
  349. void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
  350. void HAL_PWR_EnablePVD(void);
  351. void HAL_PWR_DisablePVD(void);
  352. void HAL_PWR_PVD_IRQHandler(void);
  353. void HAL_PWR_PVDCallback(void);
  354. /* WakeUp pins configuration functions ****************************************/
  355. void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
  356. void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
  357. /* Low Power modes configuration functions ************************************/
  358. void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
  359. void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
  360. void HAL_PWR_EnterSTANDBYMode(void);
  361. void HAL_PWR_EnableSleepOnExit(void);
  362. void HAL_PWR_DisableSleepOnExit(void);
  363. void HAL_PWR_EnableSEVOnPend(void);
  364. void HAL_PWR_DisableSEVOnPend(void);
  365. /**
  366. * @}
  367. */
  368. /**
  369. * @}
  370. */
  371. /* Define the private group ***********************************/
  372. /**************************************************************/
  373. /** @defgroup PWR_Private PWR Private
  374. * @{
  375. */
  376. /**
  377. * @}
  378. */
  379. /**************************************************************/
  380. /**
  381. * @}
  382. */
  383. /**
  384. * @}
  385. */
  386. #ifdef __cplusplus
  387. }
  388. #endif
  389. #endif /* __STM32L0xx_HAL_PWR_H */
  390. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/