gpio.c 97 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622
  1. //*****************************************************************************
  2. //
  3. // gpio.c - API for GPIO ports
  4. //
  5. // Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved.
  6. // Software License Agreement
  7. //
  8. // Redistribution and use in source and binary forms, with or without
  9. // modification, are permitted provided that the following conditions
  10. // are met:
  11. //
  12. // Redistributions of source code must retain the above copyright
  13. // notice, this list of conditions and the following disclaimer.
  14. //
  15. // Redistributions in binary form must reproduce the above copyright
  16. // notice, this list of conditions and the following disclaimer in the
  17. // documentation and/or other materials provided with the
  18. // distribution.
  19. //
  20. // Neither the name of Texas Instruments Incorporated nor the names of
  21. // its contributors may be used to endorse or promote products derived
  22. // from this software without specific prior written permission.
  23. //
  24. // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  25. // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  26. // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  27. // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  28. // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  29. // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  30. // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  31. // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  32. // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  33. // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  34. // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35. //
  36. // This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
  37. //
  38. //*****************************************************************************
  39. //*****************************************************************************
  40. //
  41. //! \addtogroup gpio_api
  42. //! @{
  43. //
  44. //*****************************************************************************
  45. #include <stdbool.h>
  46. #include <stdint.h>
  47. #include "inc/hw_gpio.h"
  48. #include "inc/hw_ints.h"
  49. #include "inc/hw_memmap.h"
  50. #include "inc/hw_sysctl.h"
  51. #include "inc/hw_types.h"
  52. #include "driverlib/debug.h"
  53. #include "driverlib/gpio.h"
  54. #include "driverlib/interrupt.h"
  55. //*****************************************************************************
  56. //
  57. // A mapping of GPIO port address to interrupt number.
  58. //
  59. //*****************************************************************************
  60. static const uint32_t g_ppui32GPIOIntMapBlizzard[][2] =
  61. {
  62. { GPIO_PORTA_BASE, INT_GPIOA_TM4C123 },
  63. { GPIO_PORTA_AHB_BASE, INT_GPIOA_TM4C123 },
  64. { GPIO_PORTB_BASE, INT_GPIOB_TM4C123 },
  65. { GPIO_PORTB_AHB_BASE, INT_GPIOB_TM4C123 },
  66. { GPIO_PORTC_BASE, INT_GPIOC_TM4C123 },
  67. { GPIO_PORTC_AHB_BASE, INT_GPIOC_TM4C123 },
  68. { GPIO_PORTD_BASE, INT_GPIOD_TM4C123 },
  69. { GPIO_PORTD_AHB_BASE, INT_GPIOD_TM4C123 },
  70. { GPIO_PORTE_BASE, INT_GPIOE_TM4C123 },
  71. { GPIO_PORTE_AHB_BASE, INT_GPIOE_TM4C123 },
  72. { GPIO_PORTF_BASE, INT_GPIOF_TM4C123 },
  73. { GPIO_PORTF_AHB_BASE, INT_GPIOF_TM4C123 },
  74. { GPIO_PORTG_BASE, INT_GPIOG_TM4C123 },
  75. { GPIO_PORTG_AHB_BASE, INT_GPIOG_TM4C123 },
  76. { GPIO_PORTH_BASE, INT_GPIOH_TM4C123 },
  77. { GPIO_PORTH_AHB_BASE, INT_GPIOH_TM4C123 },
  78. { GPIO_PORTJ_BASE, INT_GPIOJ_TM4C123 },
  79. { GPIO_PORTJ_AHB_BASE, INT_GPIOJ_TM4C123 },
  80. { GPIO_PORTK_BASE, INT_GPIOK_TM4C123 },
  81. { GPIO_PORTL_BASE, INT_GPIOL_TM4C123 },
  82. { GPIO_PORTM_BASE, INT_GPIOM_TM4C123 },
  83. { GPIO_PORTN_BASE, INT_GPION_TM4C123 },
  84. { GPIO_PORTP_BASE, INT_GPIOP0_TM4C123 },
  85. { GPIO_PORTQ_BASE, INT_GPIOQ0_TM4C123 },
  86. };
  87. static const uint_fast32_t g_ui32GPIOIntMapBlizzardRows =
  88. sizeof(g_ppui32GPIOIntMapBlizzard) / sizeof(g_ppui32GPIOIntMapBlizzard[0]);
  89. static const uint32_t g_ppui32GPIOIntMapSnowflake[][2] =
  90. {
  91. { GPIO_PORTA_BASE, INT_GPIOA_TM4C129 },
  92. { GPIO_PORTA_AHB_BASE, INT_GPIOA_TM4C129 },
  93. { GPIO_PORTB_BASE, INT_GPIOB_TM4C129 },
  94. { GPIO_PORTB_AHB_BASE, INT_GPIOB_TM4C129 },
  95. { GPIO_PORTC_BASE, INT_GPIOC_TM4C129 },
  96. { GPIO_PORTC_AHB_BASE, INT_GPIOC_TM4C129 },
  97. { GPIO_PORTD_BASE, INT_GPIOD_TM4C129 },
  98. { GPIO_PORTD_AHB_BASE, INT_GPIOD_TM4C129 },
  99. { GPIO_PORTE_BASE, INT_GPIOE_TM4C129 },
  100. { GPIO_PORTE_AHB_BASE, INT_GPIOE_TM4C129 },
  101. { GPIO_PORTF_BASE, INT_GPIOF_TM4C129 },
  102. { GPIO_PORTF_AHB_BASE, INT_GPIOF_TM4C129 },
  103. { GPIO_PORTG_BASE, INT_GPIOG_TM4C129 },
  104. { GPIO_PORTG_AHB_BASE, INT_GPIOG_TM4C129 },
  105. { GPIO_PORTH_BASE, INT_GPIOH_TM4C129 },
  106. { GPIO_PORTH_AHB_BASE, INT_GPIOH_TM4C129 },
  107. { GPIO_PORTJ_BASE, INT_GPIOJ_TM4C129 },
  108. { GPIO_PORTJ_AHB_BASE, INT_GPIOJ_TM4C129 },
  109. { GPIO_PORTK_BASE, INT_GPIOK_TM4C129 },
  110. { GPIO_PORTL_BASE, INT_GPIOL_TM4C129 },
  111. { GPIO_PORTM_BASE, INT_GPIOM_TM4C129 },
  112. { GPIO_PORTN_BASE, INT_GPION_TM4C129 },
  113. { GPIO_PORTP_BASE, INT_GPIOP0_TM4C129 },
  114. { GPIO_PORTQ_BASE, INT_GPIOQ0_TM4C129 },
  115. { GPIO_PORTR_BASE, INT_GPIOR_TM4C129 },
  116. { GPIO_PORTS_BASE, INT_GPIOS_TM4C129 },
  117. { GPIO_PORTT_BASE, INT_GPIOT_TM4C129 },
  118. };
  119. static const uint_fast32_t g_ui32GPIOIntMapSnowflakeRows =
  120. (sizeof(g_ppui32GPIOIntMapSnowflake) /
  121. sizeof(g_ppui32GPIOIntMapSnowflake[0]));
  122. //*****************************************************************************
  123. //
  124. // The base addresses of all the GPIO modules. Both the APB and AHB apertures
  125. // are provided.
  126. //
  127. //*****************************************************************************
  128. static const uint32_t g_pui32GPIOBaseAddrs[] =
  129. {
  130. GPIO_PORTA_BASE, GPIO_PORTA_AHB_BASE,
  131. GPIO_PORTB_BASE, GPIO_PORTB_AHB_BASE,
  132. GPIO_PORTC_BASE, GPIO_PORTC_AHB_BASE,
  133. GPIO_PORTD_BASE, GPIO_PORTD_AHB_BASE,
  134. GPIO_PORTE_BASE, GPIO_PORTE_AHB_BASE,
  135. GPIO_PORTF_BASE, GPIO_PORTF_AHB_BASE,
  136. GPIO_PORTG_BASE, GPIO_PORTG_AHB_BASE,
  137. GPIO_PORTH_BASE, GPIO_PORTH_AHB_BASE,
  138. GPIO_PORTJ_BASE, GPIO_PORTJ_AHB_BASE,
  139. GPIO_PORTK_BASE, GPIO_PORTK_BASE,
  140. GPIO_PORTL_BASE, GPIO_PORTL_BASE,
  141. GPIO_PORTM_BASE, GPIO_PORTM_BASE,
  142. GPIO_PORTN_BASE, GPIO_PORTN_BASE,
  143. GPIO_PORTP_BASE, GPIO_PORTP_BASE,
  144. GPIO_PORTQ_BASE, GPIO_PORTQ_BASE,
  145. GPIO_PORTR_BASE, GPIO_PORTR_BASE,
  146. GPIO_PORTS_BASE, GPIO_PORTS_BASE,
  147. GPIO_PORTT_BASE, GPIO_PORTT_BASE,
  148. };
  149. //*****************************************************************************
  150. //
  151. //! \internal
  152. //! Checks a GPIO base address.
  153. //!
  154. //! \param ui32Port is the base address of the GPIO port.
  155. //!
  156. //! This function determines if a GPIO port base address is valid.
  157. //!
  158. //! \return Returns \b true if the base address is valid and \b false
  159. //! otherwise.
  160. //
  161. //*****************************************************************************
  162. #ifdef DEBUG
  163. static bool
  164. _GPIOBaseValid(uint32_t ui32Port)
  165. {
  166. return((ui32Port == GPIO_PORTA_BASE) ||
  167. (ui32Port == GPIO_PORTA_AHB_BASE) ||
  168. (ui32Port == GPIO_PORTB_BASE) ||
  169. (ui32Port == GPIO_PORTB_AHB_BASE) ||
  170. (ui32Port == GPIO_PORTC_BASE) ||
  171. (ui32Port == GPIO_PORTC_AHB_BASE) ||
  172. (ui32Port == GPIO_PORTD_BASE) ||
  173. (ui32Port == GPIO_PORTD_AHB_BASE) ||
  174. (ui32Port == GPIO_PORTE_BASE) ||
  175. (ui32Port == GPIO_PORTE_AHB_BASE) ||
  176. (ui32Port == GPIO_PORTF_BASE) ||
  177. (ui32Port == GPIO_PORTF_AHB_BASE) ||
  178. (ui32Port == GPIO_PORTG_BASE) ||
  179. (ui32Port == GPIO_PORTG_AHB_BASE) ||
  180. (ui32Port == GPIO_PORTH_BASE) ||
  181. (ui32Port == GPIO_PORTH_AHB_BASE) ||
  182. (ui32Port == GPIO_PORTJ_BASE) ||
  183. (ui32Port == GPIO_PORTJ_AHB_BASE) ||
  184. (ui32Port == GPIO_PORTK_BASE) ||
  185. (ui32Port == GPIO_PORTL_BASE) ||
  186. (ui32Port == GPIO_PORTM_BASE) ||
  187. (ui32Port == GPIO_PORTN_BASE) ||
  188. (ui32Port == GPIO_PORTP_BASE) ||
  189. (ui32Port == GPIO_PORTQ_BASE) ||
  190. (ui32Port == GPIO_PORTR_BASE) ||
  191. (ui32Port == GPIO_PORTS_BASE) ||
  192. (ui32Port == GPIO_PORTT_BASE));
  193. }
  194. #endif
  195. //*****************************************************************************
  196. //
  197. //! Gets the GPIO interrupt number.
  198. //!
  199. //! \param ui32Port is the base address of the GPIO port.
  200. //!
  201. //! Given a GPIO base address, this function returns the corresponding
  202. //! interrupt number.
  203. //!
  204. //! \return Returns a GPIO interrupt number, or 0 if \e ui32Port is invalid.
  205. //
  206. //*****************************************************************************
  207. static uint32_t
  208. _GPIOIntNumberGet(uint32_t ui32Port)
  209. {
  210. uint_fast32_t ui32Idx, ui32Rows;
  211. const uint32_t (*ppui32GPIOIntMap)[2];
  212. //
  213. // Check the arguments.
  214. //
  215. ASSERT(_GPIOBaseValid(ui32Port));
  216. ppui32GPIOIntMap = g_ppui32GPIOIntMapBlizzard;
  217. ui32Rows = g_ui32GPIOIntMapBlizzardRows;
  218. if(CLASS_IS_TM4C129)
  219. {
  220. ppui32GPIOIntMap = g_ppui32GPIOIntMapSnowflake;
  221. ui32Rows = g_ui32GPIOIntMapSnowflakeRows;
  222. }
  223. //
  224. // Loop through the table that maps I2C base addresses to interrupt
  225. // numbers.
  226. //
  227. for(ui32Idx = 0; ui32Idx < ui32Rows; ui32Idx++)
  228. {
  229. //
  230. // See if this base address matches.
  231. //
  232. if(ppui32GPIOIntMap[ui32Idx][0] == ui32Port)
  233. {
  234. //
  235. // Return the corresponding interrupt number.
  236. //
  237. return(ppui32GPIOIntMap[ui32Idx][1]);
  238. }
  239. }
  240. //
  241. // The base address could not be found, so return an error.
  242. //
  243. return(0);
  244. }
  245. //*****************************************************************************
  246. //
  247. //! Sets the direction and mode of the specified pin(s).
  248. //!
  249. //! \param ui32Port is the base address of the GPIO port
  250. //! \param ui8Pins is the bit-packed representation of the pin(s).
  251. //! \param ui32PinIO is the pin direction and/or mode.
  252. //!
  253. //! This function configures the specified pin(s) on the selected GPIO port
  254. //! as either input or output under software control, or it configures the
  255. //! pin to be under hardware control.
  256. //!
  257. //! The parameter \e ui32PinIO is an enumerated data type that can be one of
  258. //! the following values:
  259. //!
  260. //! - \b GPIO_DIR_MODE_IN
  261. //! - \b GPIO_DIR_MODE_OUT
  262. //! - \b GPIO_DIR_MODE_HW
  263. //!
  264. //! where \b GPIO_DIR_MODE_IN specifies that the pin is programmed as a
  265. //! software controlled input, \b GPIO_DIR_MODE_OUT specifies that the pin is
  266. //! programmed as a software controlled output, and \b GPIO_DIR_MODE_HW
  267. //! specifies that the pin is placed under hardware control.
  268. //!
  269. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  270. //! set identifies the pin to be accessed, and where bit 0 of the byte
  271. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  272. //!
  273. //! \note GPIOPadConfigSet() must also be used to configure the corresponding
  274. //! pad(s) in order for them to propagate the signal to/from the GPIO.
  275. //!
  276. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  277. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  278. //! locked against inadvertent reconfiguration. These pins must be unlocked
  279. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  280. //! registers before this function can be called. Please see the ``gpio_jtag''
  281. //! example application for the mechanism required and consult your part
  282. //! datasheet for information on affected pins.
  283. //!
  284. //! \return None.
  285. //
  286. //*****************************************************************************
  287. void
  288. GPIODirModeSet(uint32_t ui32Port, uint8_t ui8Pins, uint32_t ui32PinIO)
  289. {
  290. //
  291. // Check the arguments.
  292. //
  293. ASSERT(_GPIOBaseValid(ui32Port));
  294. ASSERT((ui32PinIO == GPIO_DIR_MODE_IN) ||
  295. (ui32PinIO == GPIO_DIR_MODE_OUT) ||
  296. (ui32PinIO == GPIO_DIR_MODE_HW));
  297. //
  298. // Set the pin direction and mode.
  299. //
  300. HWREG(ui32Port + GPIO_O_DIR) = ((ui32PinIO & 1) ?
  301. (HWREG(ui32Port + GPIO_O_DIR) | ui8Pins) :
  302. (HWREG(ui32Port + GPIO_O_DIR) & ~(ui8Pins)));
  303. HWREG(ui32Port + GPIO_O_AFSEL) = ((ui32PinIO & 2) ?
  304. (HWREG(ui32Port + GPIO_O_AFSEL) |
  305. ui8Pins) :
  306. (HWREG(ui32Port + GPIO_O_AFSEL) &
  307. ~(ui8Pins)));
  308. }
  309. //*****************************************************************************
  310. //
  311. //! Gets the direction and mode of a pin.
  312. //!
  313. //! \param ui32Port is the base address of the GPIO port.
  314. //! \param ui8Pin is the pin number.
  315. //!
  316. //! This function gets the direction and control mode for a specified pin on
  317. //! the selected GPIO port. The pin can be configured as either an input or
  318. //! output under software control, or it can be under hardware control. The
  319. //! type of control and direction are returned as an enumerated data type.
  320. //!
  321. //! \return Returns one of the enumerated data types described for
  322. //! GPIODirModeSet().
  323. //
  324. //*****************************************************************************
  325. uint32_t
  326. GPIODirModeGet(uint32_t ui32Port, uint8_t ui8Pin)
  327. {
  328. uint32_t ui32Dir, ui32AFSEL;
  329. //
  330. // Check the arguments.
  331. //
  332. ASSERT(_GPIOBaseValid(ui32Port));
  333. ASSERT(ui8Pin < 8);
  334. //
  335. // Convert from a pin number to a bit position.
  336. //
  337. ui8Pin = 1 << ui8Pin;
  338. //
  339. // Return the pin direction and mode.
  340. //
  341. ui32Dir = HWREG(ui32Port + GPIO_O_DIR);
  342. ui32AFSEL = HWREG(ui32Port + GPIO_O_AFSEL);
  343. return(((ui32Dir & ui8Pin) ? 1 : 0) | ((ui32AFSEL & ui8Pin) ? 2 : 0));
  344. }
  345. //*****************************************************************************
  346. //
  347. //! Sets the interrupt type for the specified pin(s).
  348. //!
  349. //! \param ui32Port is the base address of the GPIO port.
  350. //! \param ui8Pins is the bit-packed representation of the pin(s).
  351. //! \param ui32IntType specifies the type of interrupt trigger mechanism.
  352. //!
  353. //! This function sets up the various interrupt trigger mechanisms for the
  354. //! specified pin(s) on the selected GPIO port.
  355. //!
  356. //! One of the following flags can be used to define the \e ui32IntType
  357. //! parameter:
  358. //!
  359. //! - \b GPIO_FALLING_EDGE sets detection to edge and trigger to falling
  360. //! - \b GPIO_RISING_EDGE sets detection to edge and trigger to rising
  361. //! - \b GPIO_BOTH_EDGES sets detection to both edges
  362. //! - \b GPIO_LOW_LEVEL sets detection to low level
  363. //! - \b GPIO_HIGH_LEVEL sets detection to high level
  364. //!
  365. //! In addition to the above flags, the following flag can be OR'd in to the
  366. //! \e ui32IntType parameter:
  367. //!
  368. //! - \b GPIO_DISCRETE_INT sets discrete interrupts for each pin on a GPIO
  369. //! port.
  370. //!
  371. //! The \b GPIO_DISCRETE_INT is not available on all devices or all GPIO ports,
  372. //! consult the data sheet to ensure that the device and the GPIO port supports
  373. //! discrete interrupts.
  374. //!
  375. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  376. //! set identifies the pin to be accessed, and where bit 0 of the byte
  377. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  378. //!
  379. //! \note In order to avoid any spurious interrupts, the user must ensure that
  380. //! the GPIO inputs remain stable for the duration of this function.
  381. //!
  382. //! \return None.
  383. //
  384. //*****************************************************************************
  385. void
  386. GPIOIntTypeSet(uint32_t ui32Port, uint8_t ui8Pins,
  387. uint32_t ui32IntType)
  388. {
  389. //
  390. // Check the arguments.
  391. //
  392. ASSERT(_GPIOBaseValid(ui32Port));
  393. ASSERT(((ui32IntType & 0xF) == GPIO_FALLING_EDGE) ||
  394. ((ui32IntType & 0xF) == GPIO_RISING_EDGE) ||
  395. ((ui32IntType & 0xF) == GPIO_BOTH_EDGES) ||
  396. ((ui32IntType & 0xF) == GPIO_LOW_LEVEL) ||
  397. ((ui32IntType & 0xF) == GPIO_HIGH_LEVEL));
  398. ASSERT(((ui32IntType & 0x000F0000) == 0) ||
  399. (((ui32IntType & 0x000F0000) == GPIO_DISCRETE_INT) &&
  400. ((ui32Port == GPIO_PORTP_BASE) || (ui32Port == GPIO_PORTQ_BASE))));
  401. //
  402. // Set the pin interrupt type.
  403. //
  404. HWREG(ui32Port + GPIO_O_IBE) = ((ui32IntType & 1) ?
  405. (HWREG(ui32Port + GPIO_O_IBE) | ui8Pins) :
  406. (HWREG(ui32Port + GPIO_O_IBE) & ~(ui8Pins)));
  407. HWREG(ui32Port + GPIO_O_IS) = ((ui32IntType & 2) ?
  408. (HWREG(ui32Port + GPIO_O_IS) | ui8Pins) :
  409. (HWREG(ui32Port + GPIO_O_IS) & ~(ui8Pins)));
  410. HWREG(ui32Port + GPIO_O_IEV) = ((ui32IntType & 4) ?
  411. (HWREG(ui32Port + GPIO_O_IEV) | ui8Pins) :
  412. (HWREG(ui32Port + GPIO_O_IEV) & ~(ui8Pins)));
  413. //
  414. // Set or clear the discrete interrupt feature. This is not available
  415. // on all parts or ports but is safe to write in all cases.
  416. //
  417. HWREG(ui32Port + GPIO_O_SI) = ((ui32IntType & 0x10000) ?
  418. (HWREG(ui32Port + GPIO_O_SI) | 0x01) :
  419. (HWREG(ui32Port + GPIO_O_SI) & ~(0x01)));
  420. }
  421. //*****************************************************************************
  422. //
  423. //! Gets the interrupt type for a pin.
  424. //!
  425. //! \param ui32Port is the base address of the GPIO port.
  426. //! \param ui8Pin is the pin number.
  427. //!
  428. //! This function gets the interrupt type for a specified pin on the selected
  429. //! GPIO port. The pin can be configured as a falling-edge, rising-edge, or
  430. //! both-edges detected interrupt, or it can be configured as a low-level or
  431. //! high-level detected interrupt. The type of interrupt detection mechanism
  432. //! is returned and can include the \b GPIO_DISCRETE_INT flag.
  433. //!
  434. //! \return Returns one of the flags described for GPIOIntTypeSet().
  435. //
  436. //*****************************************************************************
  437. uint32_t
  438. GPIOIntTypeGet(uint32_t ui32Port, uint8_t ui8Pin)
  439. {
  440. uint32_t ui32IBE, ui32IS, ui32IEV, ui32SI;
  441. //
  442. // Check the arguments.
  443. //
  444. ASSERT(_GPIOBaseValid(ui32Port));
  445. ASSERT(ui8Pin < 8);
  446. //
  447. // Convert from a pin number to a bit position.
  448. //
  449. ui8Pin = 1 << ui8Pin;
  450. //
  451. // Return the pin interrupt type.
  452. //
  453. ui32IBE = HWREG(ui32Port + GPIO_O_IBE);
  454. ui32IS = HWREG(ui32Port + GPIO_O_IS);
  455. ui32IEV = HWREG(ui32Port + GPIO_O_IEV);
  456. ui32SI = HWREG(ui32Port + GPIO_O_SI);
  457. return(((ui32IBE & ui8Pin) ? 1 : 0) | ((ui32IS & ui8Pin) ? 2 : 0) |
  458. ((ui32IEV & ui8Pin) ? 4 : 0) | (ui32SI & 0x01) ? 0x10000 : 0);
  459. }
  460. //*****************************************************************************
  461. //
  462. //! Sets the pad configuration for the specified pin(s).
  463. //!
  464. //! \param ui32Port is the base address of the GPIO port.
  465. //! \param ui8Pins is the bit-packed representation of the pin(s).
  466. //! \param ui32Strength specifies the output drive strength.
  467. //! \param ui32PinType specifies the pin type.
  468. //!
  469. //! This function sets the drive strength and type for the specified pin(s)
  470. //! on the selected GPIO port. For pin(s) configured as input ports, the
  471. //! pad is configured as requested, but the only real effect on the input
  472. //! is the configuration of the pull-up or pull-down termination.
  473. //!
  474. //! The parameter \e ui32Strength can be one of the following values:
  475. //!
  476. //! - \b GPIO_STRENGTH_2MA
  477. //! - \b GPIO_STRENGTH_4MA
  478. //! - \b GPIO_STRENGTH_8MA
  479. //! - \b GPIO_STRENGTH_8MA_SC
  480. //! - \b GPIO_STRENGTH_6MA
  481. //! - \b GPIO_STRENGTH_10MA
  482. //! - \b GPIO_STRENGTH_12MA
  483. //!
  484. //! where \b GPIO_STRENGTH_xMA specifies either 2, 4, or 8 mA output drive
  485. //! strength, and \b GPIO_OUT_STRENGTH_8MA_SC specifies 8 mA output drive with
  486. //! slew control.
  487. //!
  488. //! Some Tiva devices also support output drive strengths of 6, 10, and 12
  489. //! mA.
  490. //!
  491. //! The parameter \e ui32PinType can be one of the following values:
  492. //!
  493. //! - \b GPIO_PIN_TYPE_STD
  494. //! - \b GPIO_PIN_TYPE_STD_WPU
  495. //! - \b GPIO_PIN_TYPE_STD_WPD
  496. //! - \b GPIO_PIN_TYPE_OD
  497. //! - \b GPIO_PIN_TYPE_ANALOG
  498. //! - \b GPIO_PIN_TYPE_WAKE_HIGH
  499. //! - \b GPIO_PIN_TYPE_WAKE_LOW
  500. //!
  501. //! where \b GPIO_PIN_TYPE_STD* specifies a push-pull pin, \b GPIO_PIN_TYPE_OD*
  502. //! specifies an open-drain pin, \b *_WPU specifies a weak pull-up, \b *_WPD
  503. //! specifies a weak pull-down, and \b GPIO_PIN_TYPE_ANALOG specifies an analog
  504. //! input.
  505. //!
  506. //! The \b GPIO_PIN_TYPE_WAKE_* settings specify the pin to be used as a
  507. //! hibernation wake source. The pin sense level can be high or low. These
  508. //! settings are only available on some Tiva devices.
  509. //!
  510. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  511. //! set identifies the pin to be accessed, and where bit 0 of the byte
  512. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  513. //!
  514. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  515. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  516. //! locked against inadvertent reconfiguration. These pins must be unlocked
  517. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  518. //! registers before this function can be called. Please see the ``gpio_jtag''
  519. //! example application for the mechanism required and consult your part
  520. //! datasheet for information on affected pins.
  521. //!
  522. //! \return None.
  523. //
  524. //*****************************************************************************
  525. void
  526. GPIOPadConfigSet(uint32_t ui32Port, uint8_t ui8Pins,
  527. uint32_t ui32Strength, uint32_t ui32PinType)
  528. {
  529. uint8_t ui8Bit;
  530. //
  531. // Check the arguments.
  532. //
  533. ASSERT(_GPIOBaseValid(ui32Port));
  534. ASSERT((ui32Strength == GPIO_STRENGTH_2MA) ||
  535. (ui32Strength == GPIO_STRENGTH_4MA) ||
  536. (ui32Strength == GPIO_STRENGTH_6MA) ||
  537. (ui32Strength == GPIO_STRENGTH_8MA) ||
  538. (ui32Strength == GPIO_STRENGTH_8MA_SC) ||
  539. (ui32Strength == GPIO_STRENGTH_10MA) ||
  540. (ui32Strength == GPIO_STRENGTH_12MA));
  541. ASSERT((ui32PinType == GPIO_PIN_TYPE_STD) ||
  542. (ui32PinType == GPIO_PIN_TYPE_STD_WPU) ||
  543. (ui32PinType == GPIO_PIN_TYPE_STD_WPD) ||
  544. (ui32PinType == GPIO_PIN_TYPE_OD) ||
  545. (ui32PinType == GPIO_PIN_TYPE_WAKE_LOW) ||
  546. (ui32PinType == GPIO_PIN_TYPE_WAKE_HIGH) ||
  547. (ui32PinType == GPIO_PIN_TYPE_ANALOG));
  548. //
  549. // Set the GPIO peripheral configuration register first as required. This
  550. // register only appears in TM4E111 and later device classes, but is a
  551. // harmless write on older devices. Walk pins 0-7 and clear or set the
  552. // provided PC[EDMn] encoding.
  553. //
  554. for(ui8Bit = 0; ui8Bit < 8; ui8Bit++)
  555. {
  556. if(ui8Pins & (1 << ui8Bit))
  557. {
  558. HWREG(ui32Port + GPIO_O_PC) = (HWREG(ui32Port + GPIO_O_PC) &
  559. ~(0x3 << (2 * ui8Bit)));
  560. HWREG(ui32Port + GPIO_O_PC) |= (((ui32Strength >> 5) & 0x3) <<
  561. (2 * ui8Bit));
  562. }
  563. }
  564. //
  565. // Set the output drive strength.
  566. //
  567. HWREG(ui32Port + GPIO_O_DR2R) = ((ui32Strength & 1) ?
  568. (HWREG(ui32Port + GPIO_O_DR2R) |
  569. ui8Pins) :
  570. (HWREG(ui32Port + GPIO_O_DR2R) &
  571. ~(ui8Pins)));
  572. HWREG(ui32Port + GPIO_O_DR4R) = ((ui32Strength & 2) ?
  573. (HWREG(ui32Port + GPIO_O_DR4R) |
  574. ui8Pins) :
  575. (HWREG(ui32Port + GPIO_O_DR4R) &
  576. ~(ui8Pins)));
  577. HWREG(ui32Port + GPIO_O_DR8R) = ((ui32Strength & 4) ?
  578. (HWREG(ui32Port + GPIO_O_DR8R) |
  579. ui8Pins) :
  580. (HWREG(ui32Port + GPIO_O_DR8R) &
  581. ~(ui8Pins)));
  582. HWREG(ui32Port + GPIO_O_SLR) = ((ui32Strength & 8) ?
  583. (HWREG(ui32Port + GPIO_O_SLR) |
  584. ui8Pins) :
  585. (HWREG(ui32Port + GPIO_O_SLR) &
  586. ~(ui8Pins)));
  587. //
  588. // Set the 12-mA drive select register. This register only appears in
  589. // TM4E111 and later device classes, but is a harmless write on older
  590. // devices.
  591. //
  592. HWREG(ui32Port + GPIO_O_DR12R) = ((ui32Strength & 0x10) ?
  593. (HWREG(ui32Port + GPIO_O_DR12R) |
  594. ui8Pins) :
  595. (HWREG(ui32Port + GPIO_O_DR12R) &
  596. ~(ui8Pins)));
  597. //
  598. // Set the pin type.
  599. //
  600. HWREG(ui32Port + GPIO_O_ODR) = ((ui32PinType & 1) ?
  601. (HWREG(ui32Port + GPIO_O_ODR) | ui8Pins) :
  602. (HWREG(ui32Port + GPIO_O_ODR) & ~(ui8Pins)));
  603. HWREG(ui32Port + GPIO_O_PUR) = ((ui32PinType & 2) ?
  604. (HWREG(ui32Port + GPIO_O_PUR) | ui8Pins) :
  605. (HWREG(ui32Port + GPIO_O_PUR) & ~(ui8Pins)));
  606. HWREG(ui32Port + GPIO_O_PDR) = ((ui32PinType & 4) ?
  607. (HWREG(ui32Port + GPIO_O_PDR) | ui8Pins) :
  608. (HWREG(ui32Port + GPIO_O_PDR) & ~(ui8Pins)));
  609. HWREG(ui32Port + GPIO_O_DEN) = ((ui32PinType & 8) ?
  610. (HWREG(ui32Port + GPIO_O_DEN) | ui8Pins) :
  611. (HWREG(ui32Port + GPIO_O_DEN) & ~(ui8Pins)));
  612. //
  613. // Set the wake pin enable register and the wake level register. These
  614. // registers only appear in TM4E111 and later device classes, but are
  615. // harmless writes on older devices.
  616. //
  617. HWREG(ui32Port + GPIO_O_WAKELVL) = ((ui32PinType & 0x200) ?
  618. (HWREG(ui32Port + GPIO_O_WAKELVL) |
  619. ui8Pins) :
  620. (HWREG(ui32Port + GPIO_O_WAKELVL) &
  621. ~(ui8Pins)));
  622. HWREG(ui32Port + GPIO_O_WAKEPEN) = ((ui32PinType & 0x300) ?
  623. (HWREG(ui32Port + GPIO_O_WAKEPEN) |
  624. ui8Pins) :
  625. (HWREG(ui32Port + GPIO_O_WAKEPEN) &
  626. ~(ui8Pins)));
  627. //
  628. // Set the analog mode select register.
  629. //
  630. HWREG(ui32Port + GPIO_O_AMSEL) =
  631. ((ui32PinType == GPIO_PIN_TYPE_ANALOG) ?
  632. (HWREG(ui32Port + GPIO_O_AMSEL) | ui8Pins) :
  633. (HWREG(ui32Port + GPIO_O_AMSEL) & ~(ui8Pins)));
  634. }
  635. //*****************************************************************************
  636. //
  637. //! Gets the pad configuration for a pin.
  638. //!
  639. //! \param ui32Port is the base address of the GPIO port.
  640. //! \param ui8Pin is the pin number.
  641. //! \param pui32Strength is a pointer to storage for the output drive strength.
  642. //! \param pui32PinType is a pointer to storage for the output drive type.
  643. //!
  644. //! This function gets the pad configuration for a specified pin on the
  645. //! selected GPIO port. The values returned in \e pui32Strength and
  646. //! \e pui32PinType correspond to the values used in GPIOPadConfigSet(). This
  647. //! function also works for pin(s) configured as input pin(s); however, the
  648. //! only meaningful data returned is whether the pin is terminated with a
  649. //! pull-up or down resistor.
  650. //!
  651. //! \return None
  652. //
  653. //*****************************************************************************
  654. void
  655. GPIOPadConfigGet(uint32_t ui32Port, uint8_t ui8Pin,
  656. uint32_t *pui32Strength, uint32_t *pui32PinType)
  657. {
  658. uint32_t ui32PinType, ui32Strength;
  659. //
  660. // Check the arguments.
  661. //
  662. ASSERT(_GPIOBaseValid(ui32Port));
  663. ASSERT(ui8Pin < 8);
  664. //
  665. // Convert from a pin number to a bit position.
  666. //
  667. ui8Pin = (1 << ui8Pin);
  668. //
  669. // Get the drive strength for this pin.
  670. //
  671. ui32Strength = ((HWREG(ui32Port + GPIO_O_DR2R) & ui8Pin) ? 1 : 0);
  672. ui32Strength |= ((HWREG(ui32Port + GPIO_O_DR4R) & ui8Pin) ? 2 : 0);
  673. ui32Strength |= ((HWREG(ui32Port + GPIO_O_DR8R) & ui8Pin) ? 4 : 0);
  674. ui32Strength |= ((HWREG(ui32Port + GPIO_O_SLR) & ui8Pin) ? 8 : 0);
  675. ui32Strength |= ((HWREG(ui32Port + GPIO_O_DR12R) & ui8Pin) ? 0x10 : 0);
  676. ui32Strength |= (((HWREG(ui32Port + GPIO_O_PC) >>
  677. (2 * ui8Pin)) & 0x3) << 5);
  678. *pui32Strength = ui32Strength;
  679. //
  680. // Get the pin type.
  681. //
  682. ui32PinType = ((HWREG(ui32Port + GPIO_O_ODR) & ui8Pin) ? 1 : 0);
  683. ui32PinType |= ((HWREG(ui32Port + GPIO_O_PUR) & ui8Pin) ? 2 : 0);
  684. ui32PinType |= ((HWREG(ui32Port + GPIO_O_PDR) & ui8Pin) ? 4 : 0);
  685. ui32PinType |= ((HWREG(ui32Port + GPIO_O_DEN) & ui8Pin) ? 8 : 0);
  686. if(HWREG(ui32Port + GPIO_O_WAKEPEN) & ui8Pin)
  687. {
  688. ui32PinType |= ((HWREG(ui32Port + GPIO_O_WAKELVL) & ui8Pin) ?
  689. 0x200 : 0x100);
  690. }
  691. *pui32PinType = ui32PinType;
  692. }
  693. //*****************************************************************************
  694. //
  695. //! Enables the specified GPIO interrupts.
  696. //!
  697. //! \param ui32Port is the base address of the GPIO port.
  698. //! \param ui32IntFlags is the bit mask of the interrupt sources to enable.
  699. //!
  700. //! This function enables the indicated GPIO interrupt sources. Only the
  701. //! sources that are enabled can be reflected to the processor interrupt;
  702. //! disabled sources have no effect on the processor.
  703. //!
  704. //! The \e ui32IntFlags parameter is the logical OR of any of the following:
  705. //!
  706. //! - \b GPIO_INT_PIN_0 - interrupt due to activity on Pin 0.
  707. //! - \b GPIO_INT_PIN_1 - interrupt due to activity on Pin 1.
  708. //! - \b GPIO_INT_PIN_2 - interrupt due to activity on Pin 2.
  709. //! - \b GPIO_INT_PIN_3 - interrupt due to activity on Pin 3.
  710. //! - \b GPIO_INT_PIN_4 - interrupt due to activity on Pin 4.
  711. //! - \b GPIO_INT_PIN_5 - interrupt due to activity on Pin 5.
  712. //! - \b GPIO_INT_PIN_6 - interrupt due to activity on Pin 6.
  713. //! - \b GPIO_INT_PIN_7 - interrupt due to activity on Pin 7.
  714. //! - \b GPIO_INT_DMA - interrupt due to DMA activity on this GPIO module.
  715. //!
  716. //! \note If this call is being used to enable summary interrupts on GPIO port
  717. //! P or Q (GPIOIntTypeSet() with GPIO_DISCRETE_INT not enabled), then all
  718. //! individual interrupts for these ports must be enabled in the GPIO module
  719. //! using GPIOIntEnable() and all but the interrupt for pin 0 must be disabled
  720. //! in the NVIC using the IntDisable() function. The summary interrupts for
  721. //! the ports are routed to the INT_GPIOP0 or INT_GPIOQ0 which must be enabled
  722. //! to handle the interrupt. If this is not done then any individual GPIO pin
  723. //! interrupts that are left enabled also trigger the individual interrupts.
  724. //!
  725. //! \return None.
  726. //
  727. //*****************************************************************************
  728. void
  729. GPIOIntEnable(uint32_t ui32Port, uint32_t ui32IntFlags)
  730. {
  731. //
  732. // Check the arguments.
  733. //
  734. ASSERT(_GPIOBaseValid(ui32Port));
  735. //
  736. // Enable the interrupts.
  737. //
  738. HWREG(ui32Port + GPIO_O_IM) |= ui32IntFlags;
  739. }
  740. //*****************************************************************************
  741. //
  742. //! Disables the specified GPIO interrupts.
  743. //!
  744. //! \param ui32Port is the base address of the GPIO port.
  745. //! \param ui32IntFlags is the bit mask of the interrupt sources to disable.
  746. //!
  747. //! This function disables the indicated GPIO interrupt sources. Only the
  748. //! sources that are enabled can be reflected to the processor interrupt;
  749. //! disabled sources have no effect on the processor.
  750. //!
  751. //! The \e ui32IntFlags parameter is the logical OR of any of the following:
  752. //!
  753. //! - \b GPIO_INT_PIN_0 - interrupt due to activity on Pin 0.
  754. //! - \b GPIO_INT_PIN_1 - interrupt due to activity on Pin 1.
  755. //! - \b GPIO_INT_PIN_2 - interrupt due to activity on Pin 2.
  756. //! - \b GPIO_INT_PIN_3 - interrupt due to activity on Pin 3.
  757. //! - \b GPIO_INT_PIN_4 - interrupt due to activity on Pin 4.
  758. //! - \b GPIO_INT_PIN_5 - interrupt due to activity on Pin 5.
  759. //! - \b GPIO_INT_PIN_6 - interrupt due to activity on Pin 6.
  760. //! - \b GPIO_INT_PIN_7 - interrupt due to activity on Pin 7.
  761. //! - \b GPIO_INT_DMA - interrupt due to DMA activity on this GPIO module.
  762. //!
  763. //! \return None.
  764. //
  765. //*****************************************************************************
  766. void
  767. GPIOIntDisable(uint32_t ui32Port, uint32_t ui32IntFlags)
  768. {
  769. //
  770. // Check the arguments.
  771. //
  772. ASSERT(_GPIOBaseValid(ui32Port));
  773. //
  774. // Disable the interrupts.
  775. //
  776. HWREG(ui32Port + GPIO_O_IM) &= ~(ui32IntFlags);
  777. }
  778. //*****************************************************************************
  779. //
  780. //! Gets interrupt status for the specified GPIO port.
  781. //!
  782. //! \param ui32Port is the base address of the GPIO port.
  783. //! \param bMasked specifies whether masked or raw interrupt status is
  784. //! returned.
  785. //!
  786. //! If \e bMasked is set as \b true, then the masked interrupt status is
  787. //! returned; otherwise, the raw interrupt status is returned.
  788. //!
  789. //! \return Returns the current interrupt status for the specified GPIO module.
  790. //! The value returned is the logical OR of the \b GPIO_INT_* values that are
  791. //! currently active.
  792. //
  793. //*****************************************************************************
  794. uint32_t
  795. GPIOIntStatus(uint32_t ui32Port, bool bMasked)
  796. {
  797. //
  798. // Check the arguments.
  799. //
  800. ASSERT(_GPIOBaseValid(ui32Port));
  801. //
  802. // Return the interrupt status.
  803. //
  804. if(bMasked)
  805. {
  806. return(HWREG(ui32Port + GPIO_O_MIS));
  807. }
  808. else
  809. {
  810. return(HWREG(ui32Port + GPIO_O_RIS));
  811. }
  812. }
  813. //*****************************************************************************
  814. //
  815. //! Clears the specified interrupt sources.
  816. //!
  817. //! \param ui32Port is the base address of the GPIO port.
  818. //! \param ui32IntFlags is the bit mask of the interrupt sources to disable.
  819. //!
  820. //! Clears the interrupt for the specified interrupt source(s).
  821. //!
  822. //! The \e ui32IntFlags parameter is the logical OR of the \b GPIO_INT_*
  823. //! values.
  824. //!
  825. //! \note Because there is a write buffer in the Cortex-M processor, it may
  826. //! take several clock cycles before the interrupt source is actually cleared.
  827. //! Therefore, it is recommended that the interrupt source be cleared early in
  828. //! the interrupt handler (as opposed to the very last action) to avoid
  829. //! returning from the interrupt handler before the interrupt source is
  830. //! actually cleared. Failure to do so may result in the interrupt handler
  831. //! being immediately reentered (because the interrupt controller still sees
  832. //! the interrupt source asserted).
  833. //!
  834. //! \return None.
  835. //
  836. //*****************************************************************************
  837. void
  838. GPIOIntClear(uint32_t ui32Port, uint32_t ui32IntFlags)
  839. {
  840. //
  841. // Check the arguments.
  842. //
  843. ASSERT(_GPIOBaseValid(ui32Port));
  844. //
  845. // Clear the interrupts.
  846. //
  847. HWREG(ui32Port + GPIO_O_ICR) = ui32IntFlags;
  848. }
  849. //*****************************************************************************
  850. //
  851. //! Registers an interrupt handler for a GPIO port.
  852. //!
  853. //! \param ui32Port is the base address of the GPIO port.
  854. //! \param pfnIntHandler is a pointer to the GPIO port interrupt handling
  855. //! function.
  856. //!
  857. //! This function ensures that the interrupt handler specified by
  858. //! \e pfnIntHandler is called when an interrupt is detected from the selected
  859. //! GPIO port. This function also enables the corresponding GPIO interrupt
  860. //! in the interrupt controller; individual pin interrupts and interrupt
  861. //! sources must be enabled with GPIOIntEnable().
  862. //!
  863. //! \sa IntRegister() for important information about registering interrupt
  864. //! handlers.
  865. //!
  866. //! \return None.
  867. //
  868. //*****************************************************************************
  869. void
  870. GPIOIntRegister(uint32_t ui32Port, void (*pfnIntHandler)(void))
  871. {
  872. uint32_t ui32Int;
  873. //
  874. // Check the arguments.
  875. //
  876. ASSERT(_GPIOBaseValid(ui32Port));
  877. //
  878. // Get the interrupt number associated with the specified GPIO.
  879. //
  880. ui32Int = _GPIOIntNumberGet(ui32Port);
  881. ASSERT(ui32Int != 0);
  882. //
  883. // Register the interrupt handler.
  884. //
  885. IntRegister(ui32Int, pfnIntHandler);
  886. //
  887. // Enable the GPIO interrupt.
  888. //
  889. IntEnable(ui32Int);
  890. }
  891. //*****************************************************************************
  892. //
  893. //! Removes an interrupt handler for a GPIO port.
  894. //!
  895. //! \param ui32Port is the base address of the GPIO port.
  896. //!
  897. //! This function unregisters the interrupt handler for the specified
  898. //! GPIO port. This function also disables the corresponding
  899. //! GPIO port interrupt in the interrupt controller; individual GPIO interrupts
  900. //! and interrupt sources must be disabled with GPIOIntDisable().
  901. //!
  902. //! \sa IntRegister() for important information about registering interrupt
  903. //! handlers.
  904. //!
  905. //! \return None.
  906. //
  907. //*****************************************************************************
  908. void
  909. GPIOIntUnregister(uint32_t ui32Port)
  910. {
  911. uint32_t ui32Int;
  912. //
  913. // Check the arguments.
  914. //
  915. ASSERT(_GPIOBaseValid(ui32Port));
  916. //
  917. // Get the interrupt number associated with the specified GPIO.
  918. //
  919. ui32Int = _GPIOIntNumberGet(ui32Port);
  920. ASSERT(ui32Int != 0);
  921. //
  922. // Disable the GPIO interrupt.
  923. //
  924. IntDisable(ui32Int);
  925. //
  926. // Unregister the interrupt handler.
  927. //
  928. IntUnregister(ui32Int);
  929. }
  930. //*****************************************************************************
  931. //
  932. //! Registers an interrupt handler for an individual pin of a GPIO port.
  933. //!
  934. //! \param ui32Port is the base address of the GPIO port.
  935. //! \param ui32Pin is the pin whose interrupt is to be registered.
  936. //! \param pfnIntHandler is a pointer to the GPIO port interrupt handling
  937. //! function.
  938. //!
  939. //! This function ensures that the interrupt handler specified by
  940. //! \e pfnIntHandler is called when an interrupt is detected from the selected
  941. //! pin of a GPIO port. This function also enables the corresponding GPIO pin
  942. //! interrupt in the interrupt controller.
  943. //!
  944. //! \sa IntRegister() for important information about registering interrupt
  945. //! handlers.
  946. //!
  947. //! \return None.
  948. //
  949. //*****************************************************************************
  950. void
  951. GPIOIntRegisterPin(uint32_t ui32Port, uint32_t ui32Pin,
  952. void (*pfnIntHandler)(void))
  953. {
  954. uint32_t ui32Int;
  955. //
  956. // Check the arguments.
  957. //
  958. ASSERT((ui32Port == GPIO_PORTP_BASE) || (ui32Port == GPIO_PORTQ_BASE));
  959. ASSERT((ui32Pin > 0) && (ui32Pin < 8));
  960. ASSERT(pfnIntHandler != 0);
  961. //
  962. // Get the interrupt number associated with the specified GPIO.
  963. //
  964. ui32Int = _GPIOIntNumberGet(ui32Port);
  965. //
  966. // Register the interrupt handler.
  967. //
  968. IntRegister((ui32Int + ui32Pin), pfnIntHandler);
  969. //
  970. // Enable the GPIO pin interrupt.
  971. //
  972. IntEnable(ui32Int + ui32Pin);
  973. }
  974. //*****************************************************************************
  975. //
  976. //! Removes an interrupt handler for an individual pin of a GPIO port.
  977. //!
  978. //! \param ui32Port is the base address of the GPIO port.
  979. //! \param ui32Pin is the pin whose interrupt is to be unregistered.
  980. //!
  981. //! This function unregisters the interrupt handler for the specified pin of a
  982. //! GPIO port. This function also disables the corresponding GPIO pin
  983. //! interrupt in the interrupt controller.
  984. //!
  985. //! \sa IntRegister() for important information about registering interrupt
  986. //! handlers.
  987. //!
  988. //! \return None.
  989. //
  990. //*****************************************************************************
  991. void
  992. GPIOIntUnregisterPin(uint32_t ui32Port, uint32_t ui32Pin)
  993. {
  994. uint32_t ui32Int;
  995. //
  996. // Check the arguments.
  997. //
  998. ASSERT((ui32Port == GPIO_PORTP_BASE) || (ui32Port == GPIO_PORTQ_BASE));
  999. ASSERT((ui32Pin > 0) && (ui32Pin < 8));
  1000. //
  1001. // Get the interrupt number associated with the specified GPIO.
  1002. //
  1003. ui32Int = _GPIOIntNumberGet(ui32Port);
  1004. //
  1005. // Disable the GPIO pin interrupt.
  1006. //
  1007. IntDisable(ui32Int + ui32Pin);
  1008. //
  1009. // UnRegister the interrupt handler.
  1010. //
  1011. IntUnregister(ui32Int + ui32Pin);
  1012. }
  1013. //*****************************************************************************
  1014. //
  1015. //! Reads the values present of the specified pin(s).
  1016. //!
  1017. //! \param ui32Port is the base address of the GPIO port.
  1018. //! \param ui8Pins is the bit-packed representation of the pin(s).
  1019. //!
  1020. //! The values at the specified pin(s) are read, as specified by \e ui8Pins.
  1021. //! Values are returned for both input and output pin(s), and the value
  1022. //! for pin(s) that are not specified by \e ui8Pins are set to 0.
  1023. //!
  1024. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  1025. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1026. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1027. //!
  1028. //! \return Returns a bit-packed byte providing the state of the specified
  1029. //! pin, where bit 0 of the byte represents GPIO port pin 0, bit 1 represents
  1030. //! GPIO port pin 1, and so on. Any bit that is not specified by \e ui8Pins
  1031. //! is returned as a 0. Bits 31:8 should be ignored.
  1032. //
  1033. //*****************************************************************************
  1034. int32_t
  1035. GPIOPinRead(uint32_t ui32Port, uint8_t ui8Pins)
  1036. {
  1037. //
  1038. // Check the arguments.
  1039. //
  1040. ASSERT(_GPIOBaseValid(ui32Port));
  1041. //
  1042. // Return the pin value(s).
  1043. //
  1044. return(HWREG(ui32Port + (GPIO_O_DATA + (ui8Pins << 2))));
  1045. }
  1046. //*****************************************************************************
  1047. //
  1048. //! Writes a value to the specified pin(s).
  1049. //!
  1050. //! \param ui32Port is the base address of the GPIO port.
  1051. //! \param ui8Pins is the bit-packed representation of the pin(s).
  1052. //! \param ui8Val is the value to write to the pin(s).
  1053. //!
  1054. //! Writes the corresponding bit values to the output pin(s) specified by
  1055. //! \e ui8Pins. Writing to a pin configured as an input pin has no effect.
  1056. //!
  1057. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  1058. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1059. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1060. //!
  1061. //! \return None.
  1062. //
  1063. //*****************************************************************************
  1064. void
  1065. GPIOPinWrite(uint32_t ui32Port, uint8_t ui8Pins, uint8_t ui8Val)
  1066. {
  1067. //
  1068. // Check the arguments.
  1069. //
  1070. ASSERT(_GPIOBaseValid(ui32Port));
  1071. //
  1072. // Write the pins.
  1073. //
  1074. HWREG(ui32Port + (GPIO_O_DATA + (ui8Pins << 2))) = ui8Val;
  1075. }
  1076. //*****************************************************************************
  1077. //
  1078. //! Configures pin(s) for use as analog-to-digital converter inputs.
  1079. //!
  1080. //! \param ui32Port is the base address of the GPIO port.
  1081. //! \param ui8Pins is the bit-packed representation of the pin(s).
  1082. //!
  1083. //! The analog-to-digital converter input pins must be properly configured for
  1084. //! the analog-to-digital peripheral to function correctly. This function
  1085. //! provides the proper configuration for those pin(s).
  1086. //!
  1087. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  1088. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1089. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1090. //!
  1091. //! \note This function cannot be used to turn any pin into an ADC input; it
  1092. //! only configures an ADC input pin for proper operation.
  1093. //!
  1094. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  1095. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  1096. //! locked against inadvertent reconfiguration. These pins must be unlocked
  1097. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  1098. //! registers before this function can be called. Please see the ``gpio_jtag''
  1099. //! example application for the mechanism required and consult your part
  1100. //! datasheet for information on affected pins.
  1101. //!
  1102. //! \return None.
  1103. //
  1104. //*****************************************************************************
  1105. void
  1106. GPIOPinTypeADC(uint32_t ui32Port, uint8_t ui8Pins)
  1107. {
  1108. //
  1109. // Check the arguments.
  1110. //
  1111. ASSERT(_GPIOBaseValid(ui32Port));
  1112. //
  1113. // Make the pin(s) be inputs.
  1114. //
  1115. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_IN);
  1116. //
  1117. // Set the pad(s) for analog operation.
  1118. //
  1119. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA,
  1120. GPIO_PIN_TYPE_ANALOG);
  1121. }
  1122. //*****************************************************************************
  1123. //
  1124. //! Configures pin(s) for use as a CAN device.
  1125. //!
  1126. //! \param ui32Port is the base address of the GPIO port.
  1127. //! \param ui8Pins is the bit-packed representation of the pin(s).
  1128. //!
  1129. //! The CAN pins must be properly configured for the CAN peripherals to
  1130. //! function correctly. This function provides a typical configuration for
  1131. //! those pin(s); other configurations may work as well depending upon the
  1132. //! board setup (for example, using the on-chip pull-ups).
  1133. //!
  1134. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  1135. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1136. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1137. //!
  1138. //! \note This function cannot be used to turn any pin into a CAN pin; it only
  1139. //! configures a CAN pin for proper operation. Note that a GPIOPinConfigure()
  1140. //! function call is also required to properly configure a pin for the CAN
  1141. //! function.
  1142. //!
  1143. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  1144. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  1145. //! locked against inadvertent reconfiguration. These pins must be unlocked
  1146. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  1147. //! registers before this function can be called. Please see the ``gpio_jtag''
  1148. //! example application for the mechanism required and consult your part
  1149. //! datasheet for information on affected pins.
  1150. //!
  1151. //! \return None.
  1152. //
  1153. //*****************************************************************************
  1154. void
  1155. GPIOPinTypeCAN(uint32_t ui32Port, uint8_t ui8Pins)
  1156. {
  1157. //
  1158. // Check the arguments.
  1159. //
  1160. ASSERT(_GPIOBaseValid(ui32Port));
  1161. //
  1162. // Make the pin(s) be inputs.
  1163. //
  1164. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
  1165. //
  1166. // Set the pad(s) for standard push-pull operation.
  1167. //
  1168. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);
  1169. }
  1170. //*****************************************************************************
  1171. //
  1172. //! Configures pin(s) for use as an analog comparator input.
  1173. //!
  1174. //! \param ui32Port is the base address of the GPIO port.
  1175. //! \param ui8Pins is the bit-packed representation of the pin(s).
  1176. //!
  1177. //! The analog comparator input pins must be properly configured for the analog
  1178. //! comparator to function correctly. This function provides the proper
  1179. //! configuration for those pin(s).
  1180. //!
  1181. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  1182. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1183. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1184. //!
  1185. //! \note This function cannot be used to turn any pin into an analog
  1186. //! comparator input; it only configures an analog comparator pin for proper
  1187. //! operation. Note that a GPIOPinConfigure() function call is also required
  1188. //! to properly configure a pin for the analog comparator function.
  1189. //!
  1190. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  1191. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  1192. //! locked against inadvertent reconfiguration. These pins must be unlocked
  1193. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  1194. //! registers before this function can be called. Please see the ``gpio_jtag''
  1195. //! example application for the mechanism required and consult your part
  1196. //! datasheet for information on affected pins.
  1197. //!
  1198. //! \return None.
  1199. //
  1200. //*****************************************************************************
  1201. void
  1202. GPIOPinTypeComparator(uint32_t ui32Port, uint8_t ui8Pins)
  1203. {
  1204. //
  1205. // Check the arguments.
  1206. //
  1207. ASSERT(_GPIOBaseValid(ui32Port));
  1208. //
  1209. // Make the pin(s) be inputs.
  1210. //
  1211. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_IN);
  1212. //
  1213. // Set the pad(s) for analog operation.
  1214. //
  1215. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA,
  1216. GPIO_PIN_TYPE_ANALOG);
  1217. }
  1218. //*****************************************************************************
  1219. //
  1220. //! Configures pin(s) for use as an analog comparator output.
  1221. //!
  1222. //! \param ui32Port is the base address of the GPIO port.
  1223. //! \param ui8Pins is the bit-packed representation of the pin(s).
  1224. //!
  1225. //! The analog comparator output pins must be properly configured for the analog
  1226. //! comparator to function correctly. This function provides the proper
  1227. //! configuration for those pin(s).
  1228. //!
  1229. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  1230. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1231. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1232. //!
  1233. //! \return None.
  1234. //
  1235. //*****************************************************************************
  1236. void GPIOPinTypeComparatorOutput(uint32_t ui32Port, uint8_t ui8Pins)
  1237. {
  1238. //
  1239. // Check the arguments.
  1240. //
  1241. ASSERT(_GPIOBaseValid(ui32Port));
  1242. //
  1243. // Make the pin(s) be inputs.
  1244. //
  1245. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
  1246. //
  1247. // Set the pad(s) for standard push-pull operation.
  1248. //
  1249. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
  1250. }
  1251. //*****************************************************************************
  1252. //
  1253. //! Configures pin(s) for use as an clock to be output from the device.
  1254. //!
  1255. //! \param ui32Port is the base address of the GPIO port.
  1256. //! \param ui8Pins is the bit-packed representation of the pin(s).
  1257. //!
  1258. //! The system control output pin must be properly configured for the DIVSCLK to
  1259. //! function correctly. This function provides the proper configuration for
  1260. //! those pin(s).
  1261. //!
  1262. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  1263. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1264. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1265. //!
  1266. //! \return None.
  1267. //
  1268. //*****************************************************************************
  1269. void GPIOPinTypeDIVSCLK(uint32_t ui32Port, uint8_t ui8Pins)
  1270. {
  1271. //
  1272. // Check the arguments.
  1273. //
  1274. ASSERT(_GPIOBaseValid(ui32Port));
  1275. //
  1276. // Make the pin(s) be inputs.
  1277. //
  1278. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
  1279. //
  1280. // Set the pad(s) for standard push-pull operation.
  1281. //
  1282. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
  1283. }
  1284. //*****************************************************************************
  1285. //
  1286. //! Configures pin(s) for use by the external peripheral interface.
  1287. //!
  1288. //! \param ui32Port is the base address of the GPIO port.
  1289. //! \param ui8Pins is the bit-packed representation of the pin(s).
  1290. //!
  1291. //! The external peripheral interface pins must be properly configured for the
  1292. //! external peripheral interface to function correctly. This function
  1293. //! provides a typical configuration for those pin(s); other configurations may
  1294. //! work as well depending upon the board setup (for example, using the on-chip
  1295. //! pull-ups).
  1296. //!
  1297. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  1298. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1299. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1300. //!
  1301. //! \note This function cannot be used to turn any pin into an external
  1302. //! peripheral interface pin; it only configures an external peripheral
  1303. //! interface pin for proper operation. Note that a GPIOPinConfigure()
  1304. //! function call is also required to properly configure a pin for the
  1305. //! external peripheral interface function.
  1306. //!
  1307. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  1308. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  1309. //! locked against inadvertent reconfiguration. These pins must be unlocked
  1310. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  1311. //! registers before this function can be called. Please see the ``gpio_jtag''
  1312. //! example application for the mechanism required and consult your part
  1313. //! datasheet for information on affected pins.
  1314. //!
  1315. //! \return None.
  1316. //
  1317. //*****************************************************************************
  1318. void
  1319. GPIOPinTypeEPI(uint32_t ui32Port, uint8_t ui8Pins)
  1320. {
  1321. //
  1322. // Check the arguments.
  1323. //
  1324. ASSERT(_GPIOBaseValid(ui32Port));
  1325. //
  1326. // Make the pin(s) be peripheral controlled.
  1327. //
  1328. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
  1329. //
  1330. // Set the pad(s) for standard push-pull operation.
  1331. //
  1332. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);
  1333. }
  1334. //*****************************************************************************
  1335. //
  1336. //! Configures pin(s) for use by the Ethernet peripheral as LED signals.
  1337. //!
  1338. //! \param ui32Port is the base address of the GPIO port.
  1339. //! \param ui8Pins is the bit-packed representation of the pin(s).
  1340. //!
  1341. //! The Ethernet peripheral provides four signals that can be used to drive
  1342. //! an LED (for example, for link status/activity). This function provides a
  1343. //! typical configuration for the pins.
  1344. //!
  1345. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  1346. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1347. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1348. //!
  1349. //! \note This function cannot be used to turn any pin into an Ethernet LED
  1350. //! pin; it only configures an Ethernet LED pin for proper operation. Note
  1351. //! that a GPIOPinConfigure() function call is also required to properly
  1352. //! configure the pin for the Ethernet LED function.
  1353. //!
  1354. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  1355. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  1356. //! locked against inadvertent reconfiguration. These pins must be unlocked
  1357. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  1358. //! registers before this function can be called. Please see the ``gpio_jtag''
  1359. //! example application for the mechanism required and consult your part
  1360. //! datasheet for information on affected pins.
  1361. //!
  1362. //! \return None.
  1363. //
  1364. //*****************************************************************************
  1365. void
  1366. GPIOPinTypeEthernetLED(uint32_t ui32Port, uint8_t ui8Pins)
  1367. {
  1368. //
  1369. // Check the arguments.
  1370. //
  1371. ASSERT(_GPIOBaseValid(ui32Port));
  1372. //
  1373. // Make the pin(s) be peripheral controlled.
  1374. //
  1375. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
  1376. //
  1377. // Set the pad(s) for standard push-pull operation.
  1378. //
  1379. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);
  1380. }
  1381. //*****************************************************************************
  1382. //
  1383. //! Configures pin(s) for use by the Ethernet peripheral as MII signals.
  1384. //!
  1385. //! \param ui32Port is the base address of the GPIO port.
  1386. //! \param ui8Pins is the bit-packed representation of the pin(s).
  1387. //!
  1388. //! The Ethernet peripheral on some parts provides a set of MII signals that
  1389. //! are used to connect to an external PHY. This function provides a typical
  1390. //! configuration for the pins.
  1391. //!
  1392. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  1393. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1394. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1395. //!
  1396. //! \note This function cannot be used to turn any pin into an Ethernet MII
  1397. //! pin; it only configures an Ethernet MII pin for proper operation. Note
  1398. //! that a GPIOPinConfigure() function call is also required to properly
  1399. //! configure the pin for the Ethernet MII function.
  1400. //!
  1401. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  1402. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  1403. //! locked against inadvertent reconfiguration. These pins must be unlocked
  1404. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  1405. //! registers before this function can be called. Please see the ``gpio_jtag''
  1406. //! example application for the mechanism required and consult your part
  1407. //! datasheet for information on affected pins.
  1408. //!
  1409. //! \return None.
  1410. //
  1411. //*****************************************************************************
  1412. void
  1413. GPIOPinTypeEthernetMII(uint32_t ui32Port, uint8_t ui8Pins)
  1414. {
  1415. //
  1416. // Check the arguments.
  1417. //
  1418. ASSERT(_GPIOBaseValid(ui32Port));
  1419. //
  1420. // Make the pin(s) be peripheral controlled.
  1421. //
  1422. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
  1423. //
  1424. // Set the pad(s) for standard push-pull operation.
  1425. //
  1426. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);
  1427. }
  1428. //*****************************************************************************
  1429. //
  1430. //! Configures pin(s) for use as GPIO inputs.
  1431. //!
  1432. //! \param ui32Port is the base address of the GPIO port.
  1433. //! \param ui8Pins is the bit-packed representation of the pin(s).
  1434. //!
  1435. //! The GPIO pins must be properly configured in order to function correctly as
  1436. //! GPIO inputs. This function provides the proper configuration for those
  1437. //! pin(s).
  1438. //!
  1439. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  1440. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1441. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1442. //!
  1443. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  1444. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  1445. //! locked against inadvertent reconfiguration. These pins must be unlocked
  1446. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  1447. //! registers before this function can be called. Please see the ``gpio_jtag''
  1448. //! example application for the mechanism required and consult your part
  1449. //! datasheet for information on affected pins.
  1450. //!
  1451. //! \return None.
  1452. //
  1453. //*****************************************************************************
  1454. void
  1455. GPIOPinTypeGPIOInput(uint32_t ui32Port, uint8_t ui8Pins)
  1456. {
  1457. //
  1458. // Check the arguments.
  1459. //
  1460. ASSERT(_GPIOBaseValid(ui32Port));
  1461. //
  1462. // Make the pin(s) be inputs.
  1463. //
  1464. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_IN);
  1465. //
  1466. // Set the pad(s) for standard push-pull operation.
  1467. //
  1468. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
  1469. }
  1470. //*****************************************************************************
  1471. //
  1472. //! Configures pin(s) for use as GPIO outputs.
  1473. //!
  1474. //! \param ui32Port is the base address of the GPIO port.
  1475. //! \param ui8Pins is the bit-packed representation of the pin(s).
  1476. //!
  1477. //! The GPIO pins must be properly configured in order to function correctly as
  1478. //! GPIO outputs. This function provides the proper configuration for those
  1479. //! pin(s).
  1480. //!
  1481. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  1482. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1483. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1484. //!
  1485. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  1486. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  1487. //! locked against inadvertent reconfiguration. These pins must be unlocked
  1488. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  1489. //! registers before this function can be called. Please see the ``gpio_jtag''
  1490. //! example application for the mechanism required and consult your part
  1491. //! datasheet for information on affected pins.
  1492. //!
  1493. //! \return None.
  1494. //
  1495. //*****************************************************************************
  1496. void
  1497. GPIOPinTypeGPIOOutput(uint32_t ui32Port, uint8_t ui8Pins)
  1498. {
  1499. //
  1500. // Check the arguments.
  1501. //
  1502. ASSERT(_GPIOBaseValid(ui32Port));
  1503. //
  1504. // Set the pad(s) for standard push-pull operation.
  1505. //
  1506. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
  1507. //
  1508. // Make the pin(s) be outputs.
  1509. //
  1510. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_OUT);
  1511. }
  1512. //*****************************************************************************
  1513. //
  1514. //! Configures pin(s) for use as GPIO open drain outputs.
  1515. //!
  1516. //! \param ui32Port is the base address of the GPIO port.
  1517. //! \param ui8Pins is the bit-packed representation of the pin(s).
  1518. //!
  1519. //! The GPIO pins must be properly configured in order to function correctly as
  1520. //! GPIO outputs. This function provides the proper configuration for those
  1521. //! pin(s).
  1522. //!
  1523. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  1524. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1525. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1526. //!
  1527. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  1528. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  1529. //! locked against inadvertent reconfiguration. These pins must be unlocked
  1530. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  1531. //! registers before this function can be called. Please see the ``gpio_jtag''
  1532. //! example application for the mechanism required and consult your part
  1533. //! datasheet for information on affected pins.
  1534. //!
  1535. //! \return None.
  1536. //
  1537. //*****************************************************************************
  1538. void
  1539. GPIOPinTypeGPIOOutputOD(uint32_t ui32Port, uint8_t ui8Pins)
  1540. {
  1541. //
  1542. // Check the arguments.
  1543. //
  1544. ASSERT(_GPIOBaseValid(ui32Port));
  1545. //
  1546. // Set the pad(s) for standard push-pull operation.
  1547. //
  1548. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_OD);
  1549. //
  1550. // Make the pin(s) be outputs.
  1551. //
  1552. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_OUT);
  1553. }
  1554. //*****************************************************************************
  1555. //
  1556. //! Configures pin(s) for use as an Hibernate RTC Clock.
  1557. //!
  1558. //! \param ui32Port is the base address of the GPIO port.
  1559. //! \param ui8Pins is the bit-packed representation of the pin(s).
  1560. //!
  1561. //! The hibernate output pin must be properly configured for the RTCCLK to
  1562. //! function correctly. This function provides the proper configuration for the
  1563. //! RTC Clock to be output from the device.
  1564. //!
  1565. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  1566. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1567. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1568. //!
  1569. //! \return None.
  1570. //
  1571. //*****************************************************************************
  1572. void GPIOPinTypeHibernateRTCCLK(uint32_t ui32Port, uint8_t ui8Pins)
  1573. {
  1574. //
  1575. // Check the arguments.
  1576. //
  1577. ASSERT(_GPIOBaseValid(ui32Port));
  1578. //
  1579. // Make the pin(s) be inputs.
  1580. //
  1581. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
  1582. //
  1583. // Set the pad(s) for standard push-pull operation.
  1584. //
  1585. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
  1586. }
  1587. //*****************************************************************************
  1588. //
  1589. //! Configures pin for use as SDA by the I2C peripheral.
  1590. //!
  1591. //! \param ui32Port is the base address of the GPIO port.
  1592. //! \param ui8Pins is the bit-packed representation of the pin.
  1593. //!
  1594. //! The I2C pins must be properly configured for the I2C peripheral to function
  1595. //! correctly. This function provides the proper configuration for the SDA
  1596. //! pin.
  1597. //!
  1598. //! The pin is specified using a bit-packed byte, where each bit that is
  1599. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1600. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1601. //!
  1602. //! \note This function cannot be used to turn any pin into an I2C SDA pin; it
  1603. //! only configures an I2C SDA pin for proper operation. Note that a
  1604. //! GPIOPinConfigure() function call is also required to properly configure a
  1605. //! pin for the I2C SDA function.
  1606. //!
  1607. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  1608. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  1609. //! locked against inadvertent reconfiguration. These pins must be unlocked
  1610. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  1611. //! registers before this function can be called. Please see the ``gpio_jtag''
  1612. //! example application for the mechanism required and consult your part
  1613. //! datasheet for information on affected pins.
  1614. //!
  1615. //! \return None.
  1616. //
  1617. //*****************************************************************************
  1618. void
  1619. GPIOPinTypeI2C(uint32_t ui32Port, uint8_t ui8Pins)
  1620. {
  1621. //
  1622. // Check the arguments.
  1623. //
  1624. ASSERT(_GPIOBaseValid(ui32Port));
  1625. //
  1626. // Make the pin(s) be peripheral controlled.
  1627. //
  1628. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
  1629. //
  1630. // Set the pad(s) for open-drain operation with a weak pull-up.
  1631. //
  1632. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_OD);
  1633. }
  1634. //*****************************************************************************
  1635. //
  1636. //! Configures pin for use as SCL by the I2C peripheral.
  1637. //!
  1638. //! \param ui32Port is the base address of the GPIO port.
  1639. //! \param ui8Pins is the bit-packed representation of the pin.
  1640. //!
  1641. //! The I2C pins must be properly configured for the I2C peripheral to function
  1642. //! correctly. This function provides the proper configuration for the SCL
  1643. //! pin.
  1644. //!
  1645. //! The pin is specified using a bit-packed byte, where each bit that is
  1646. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1647. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1648. //!
  1649. //! \note This function cannot be used to turn any pin into an I2C SCL pin; it
  1650. //! only configures an I2C SCL pin for proper operation. Note that a
  1651. //! GPIOPinConfigure() function call is also required to properly configure a
  1652. //! pin for the I2C SCL function.
  1653. //!
  1654. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  1655. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  1656. //! locked against inadvertent reconfiguration. These pins must be unlocked
  1657. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  1658. //! registers before this function can be called. Please see the ``gpio_jtag''
  1659. //! example application for the mechanism required and consult your part
  1660. //! datasheet for information on affected pins.
  1661. //!
  1662. //! \return None.
  1663. //
  1664. //*****************************************************************************
  1665. void
  1666. GPIOPinTypeI2CSCL(uint32_t ui32Port, uint8_t ui8Pins)
  1667. {
  1668. //
  1669. // Check the arguments.
  1670. //
  1671. ASSERT(_GPIOBaseValid(ui32Port));
  1672. //
  1673. // Make the pin(s) be peripheral controlled.
  1674. //
  1675. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
  1676. //
  1677. // Set the pad(s) for push-pull operation.
  1678. //
  1679. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
  1680. }
  1681. //*****************************************************************************
  1682. //
  1683. //! Configures pin(s) for use by the LCD Controller.
  1684. //!
  1685. //! \param ui32Port is the base address of the GPIO port.
  1686. //! \param ui8Pins is the bit-packed representation of the pin(s).
  1687. //!
  1688. //! The LCD controller pins must be properly configured for the LCD controller
  1689. //! to function correctly. This function provides a typical configuration for
  1690. //! those pin(s); other configurations may work as well depending upon the
  1691. //! board setup (for example, using the on-chip pull-ups).
  1692. //!
  1693. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  1694. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1695. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1696. //!
  1697. //! \note This function cannot be used to turn any pin into an LCD pin; it only
  1698. //! configures an LCD pin for proper operation. Note that a GPIOPinConfigure()
  1699. //! function call is also required to properly configure a pin for the LCD
  1700. //! controller function.
  1701. //!
  1702. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  1703. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  1704. //! locked against inadvertent reconfiguration. These pins must be unlocked
  1705. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  1706. //! registers before this function can be called. Please see the ``gpio_jtag''
  1707. //! example application for the mechanism required and consult your part
  1708. //! datasheet for information on affected pins.
  1709. //!
  1710. //! \return None.
  1711. //
  1712. //*****************************************************************************
  1713. void
  1714. GPIOPinTypeLCD(uint32_t ui32Port, uint8_t ui8Pins)
  1715. {
  1716. //
  1717. // Check the arguments.
  1718. //
  1719. ASSERT(_GPIOBaseValid(ui32Port));
  1720. //
  1721. // Make the pin(s) be peripheral controlled.
  1722. //
  1723. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
  1724. //
  1725. // Set the pad(s) for standard push-pull operation and beefed up drive.
  1726. //
  1727. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);
  1728. }
  1729. //*****************************************************************************
  1730. //
  1731. //! Configures pin(s) for use by the 1-Wire module.
  1732. //!
  1733. //! \param ui32Port is the base address of the GPIO port.
  1734. //! \param ui8Pins is the bit-packed representation of the pin(s).
  1735. //!
  1736. //! The 1-Wire pin must be properly configured for the 1-Wire peripheral to
  1737. //! function correctly. This function provides a typical configuration for
  1738. //! those pin(s); other configurations may work as well depending upon the
  1739. //! board setup (for example, using the on-chip pull-ups).
  1740. //!
  1741. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  1742. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1743. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1744. //!
  1745. //! \note This function cannot be used to turn any pin into a 1-Wire pin; it
  1746. //! only configures a 1-Wire pin for proper operation. Note that a
  1747. //! GPIOPinConfigure() function call is also required to properly configure a
  1748. //! pin for the 1-Wire function.
  1749. //!
  1750. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  1751. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  1752. //! locked against inadvertent reconfiguration. These pins must be unlocked
  1753. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  1754. //! registers before this function can be called. Please see the ``gpio_jtag''
  1755. //! example application for the mechanism required and consult your part
  1756. //! datasheet for information on affected pins.
  1757. //!
  1758. //! \return None.
  1759. //
  1760. //*****************************************************************************
  1761. void
  1762. GPIOPinTypeOneWire(uint32_t ui32Port, uint8_t ui8Pins)
  1763. {
  1764. //
  1765. // Check the arguments.
  1766. //
  1767. ASSERT(_GPIOBaseValid(ui32Port));
  1768. //
  1769. // Make the pin(s) be peripheral controlled.
  1770. //
  1771. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
  1772. //
  1773. // Set the pad(s) for standard push-pull operation.
  1774. //
  1775. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
  1776. }
  1777. //*****************************************************************************
  1778. //
  1779. //! Configures pin(s) for use by the PWM peripheral.
  1780. //!
  1781. //! \param ui32Port is the base address of the GPIO port.
  1782. //! \param ui8Pins is the bit-packed representation of the pin(s).
  1783. //!
  1784. //! The PWM pins must be properly configured for the PWM peripheral to function
  1785. //! correctly. This function provides a typical configuration for those
  1786. //! pin(s); other configurations may work as well depending upon the board
  1787. //! setup (for example, using the on-chip pull-ups).
  1788. //!
  1789. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  1790. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1791. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1792. //!
  1793. //! \note This function cannot be used to turn any pin into a PWM pin; it only
  1794. //! configures a PWM pin for proper operation. Note that a GPIOPinConfigure()
  1795. //! function call is also required to properly configure a pin for the PWM
  1796. //! function.
  1797. //!
  1798. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  1799. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  1800. //! locked against inadvertent reconfiguration. These pins must be unlocked
  1801. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  1802. //! registers before this function can be called. Please see the ``gpio_jtag''
  1803. //! example application for the mechanism required and consult your part
  1804. //! datasheet for information on affected pins.
  1805. //!
  1806. //! \return None.
  1807. //
  1808. //*****************************************************************************
  1809. void
  1810. GPIOPinTypePWM(uint32_t ui32Port, uint8_t ui8Pins)
  1811. {
  1812. //
  1813. // Check the arguments.
  1814. //
  1815. ASSERT(_GPIOBaseValid(ui32Port));
  1816. //
  1817. // Make the pin(s) be peripheral controlled.
  1818. //
  1819. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
  1820. //
  1821. // Set the pad(s) for standard push-pull operation.
  1822. //
  1823. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
  1824. }
  1825. //*****************************************************************************
  1826. //
  1827. //! Configures pin(s) for use by the QEI peripheral.
  1828. //!
  1829. //! \param ui32Port is the base address of the GPIO port.
  1830. //! \param ui8Pins is the bit-packed representation of the pin(s).
  1831. //!
  1832. //! The QEI pins must be properly configured for the QEI peripheral to function
  1833. //! correctly. This function provides a typical configuration for those
  1834. //! pin(s); other configurations may work as well depending upon the board
  1835. //! setup (for example, not using the on-chip pull-ups).
  1836. //!
  1837. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  1838. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1839. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1840. //!
  1841. //! \note This function cannot be used to turn any pin into a QEI pin; it only
  1842. //! configures a QEI pin for proper operation. Note that a GPIOPinConfigure()
  1843. //! function call is also required to properly configure a pin for the QEI
  1844. //! function.
  1845. //!
  1846. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  1847. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  1848. //! locked against inadvertent reconfiguration. These pins must be unlocked
  1849. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  1850. //! registers before this function can be called. Please see the ``gpio_jtag''
  1851. //! example application for the mechanism required and consult your part
  1852. //! datasheet for information on affected pins.
  1853. //!
  1854. //! \return None.
  1855. //
  1856. //*****************************************************************************
  1857. void
  1858. GPIOPinTypeQEI(uint32_t ui32Port, uint8_t ui8Pins)
  1859. {
  1860. //
  1861. // Check the arguments.
  1862. //
  1863. ASSERT(_GPIOBaseValid(ui32Port));
  1864. //
  1865. // Make the pin(s) be peripheral controlled.
  1866. //
  1867. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
  1868. //
  1869. // Set the pad(s) for standard push-pull operation with a weak pull-up.
  1870. //
  1871. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA,
  1872. GPIO_PIN_TYPE_STD_WPU);
  1873. }
  1874. //*****************************************************************************
  1875. //
  1876. //! Configures pin(s) for use by the SSI peripheral.
  1877. //!
  1878. //! \param ui32Port is the base address of the GPIO port.
  1879. //! \param ui8Pins is the bit-packed representation of the pin(s).
  1880. //!
  1881. //! The SSI pins must be properly configured for the SSI peripheral to function
  1882. //! correctly. This function provides a typical configuration for those
  1883. //! pin(s); other configurations may work as well depending upon the board
  1884. //! setup (for example, using the on-chip pull-ups).
  1885. //!
  1886. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  1887. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1888. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1889. //!
  1890. //! \note This function cannot be used to turn any pin into a SSI pin; it only
  1891. //! configures a SSI pin for proper operation. Note that a GPIOPinConfigure()
  1892. //! function call is also required to properly configure a pin for the SSI
  1893. //! function.
  1894. //!
  1895. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  1896. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  1897. //! locked against inadvertent reconfiguration. These pins must be unlocked
  1898. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  1899. //! registers before this function can be called. Please see the ``gpio_jtag''
  1900. //! example application for the mechanism required and consult your part
  1901. //! datasheet for information on affected pins.
  1902. //!
  1903. //! \return None.
  1904. //
  1905. //*****************************************************************************
  1906. void
  1907. GPIOPinTypeSSI(uint32_t ui32Port, uint8_t ui8Pins)
  1908. {
  1909. //
  1910. // Check the arguments.
  1911. //
  1912. ASSERT(_GPIOBaseValid(ui32Port));
  1913. //
  1914. // Make the pin(s) be peripheral controlled.
  1915. //
  1916. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
  1917. //
  1918. // Set the pad(s) for standard push-pull operation.
  1919. //
  1920. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
  1921. }
  1922. //*****************************************************************************
  1923. //
  1924. //! Configures pin(s) for use by the Timer peripheral.
  1925. //!
  1926. //! \param ui32Port is the base address of the GPIO port.
  1927. //! \param ui8Pins is the bit-packed representation of the pin(s).
  1928. //!
  1929. //! The CCP pins must be properly configured for the timer peripheral to
  1930. //! function correctly. This function provides a typical configuration for
  1931. //! those pin(s); other configurations may work as well depending upon the
  1932. //! board setup (for example, using the on-chip pull-ups).
  1933. //!
  1934. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  1935. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1936. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1937. //!
  1938. //! \note This function cannot be used to turn any pin into a timer pin; it
  1939. //! only configures a timer pin for proper operation. Note that a
  1940. //! GPIOPinConfigure() function call is also required to properly configure a
  1941. //! pin for the CCP function.
  1942. //!
  1943. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  1944. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  1945. //! locked against inadvertent reconfiguration. These pins must be unlocked
  1946. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  1947. //! registers before this function can be called. Please see the ``gpio_jtag''
  1948. //! example application for the mechanism required and consult your part
  1949. //! datasheet for information on affected pins.
  1950. //!
  1951. //! \return None.
  1952. //
  1953. //*****************************************************************************
  1954. void
  1955. GPIOPinTypeTimer(uint32_t ui32Port, uint8_t ui8Pins)
  1956. {
  1957. //
  1958. // Check the arguments.
  1959. //
  1960. ASSERT(_GPIOBaseValid(ui32Port));
  1961. //
  1962. // Make the pin(s) be peripheral controlled.
  1963. //
  1964. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
  1965. //
  1966. // Set the pad(s) for standard push-pull operation.
  1967. //
  1968. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
  1969. }
  1970. //*****************************************************************************
  1971. //
  1972. //! Configures pin(s) for use by the Trace peripheral.
  1973. //!
  1974. //! \param ui32Port is the base address of the GPIO port.
  1975. //! \param ui8Pins is the bit-packed representation of the pin(s).
  1976. //!
  1977. //! The Trace pins must be properly configured for the Trace peripheral to
  1978. //! function correctly. This function provides a typical configuration for
  1979. //! those pin(s).
  1980. //!
  1981. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  1982. //! set identifies the pin to be accessed, and where bit 0 of the byte
  1983. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  1984. //!
  1985. //! \note This function cannot be used to turn any pin into a trace pin; it
  1986. //! only configures a trace pin for proper operation. Note that a
  1987. //! GPIOPinConfigure() function call is also required to properly configure a
  1988. //! pin for the Trace function.
  1989. //!
  1990. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  1991. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  1992. //! locked against inadvertent reconfiguration. These pins must be unlocked
  1993. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  1994. //! registers before this function can be called. Please see the ``gpio_jtag''
  1995. //! example application for the mechanism required and consult your part
  1996. //! datasheet for information on affected pins.
  1997. //!
  1998. //! \return None.
  1999. //
  2000. //*****************************************************************************
  2001. void
  2002. GPIOPinTypeTrace(uint32_t ui32Port, uint8_t ui8Pins)
  2003. {
  2004. //
  2005. // Check the arguments.
  2006. //
  2007. ASSERT(_GPIOBaseValid(ui32Port));
  2008. //
  2009. // Make the pin(s) be peripheral controlled.
  2010. //
  2011. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
  2012. //
  2013. // Set the pad(s) for standard push-pull operation.
  2014. //
  2015. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
  2016. }
  2017. //*****************************************************************************
  2018. //
  2019. //! Configures pin(s) for use by the UART peripheral.
  2020. //!
  2021. //! \param ui32Port is the base address of the GPIO port.
  2022. //! \param ui8Pins is the bit-packed representation of the pin(s).
  2023. //!
  2024. //! The UART pins must be properly configured for the UART peripheral to
  2025. //! function correctly. This function provides a typical configuration for
  2026. //! those pin(s); other configurations may work as well depending upon the
  2027. //! board setup (for example, using the on-chip pull-ups).
  2028. //!
  2029. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  2030. //! set identifies the pin to be accessed, and where bit 0 of the byte
  2031. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  2032. //!
  2033. //! \note This function cannot be used to turn any pin into a UART pin; it
  2034. //! only configures a UART pin for proper operation. Note that a
  2035. //! GPIOPinConfigure() function call is also required to properly configure a
  2036. //! pin for the UART function.
  2037. //!
  2038. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  2039. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  2040. //! locked against inadvertent reconfiguration. These pins must be unlocked
  2041. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  2042. //! registers before this function can be called. Please see the ``gpio_jtag''
  2043. //! example application for the mechanism required and consult your part
  2044. //! datasheet for information on affected pins.
  2045. //!
  2046. //! \return None.
  2047. //
  2048. //*****************************************************************************
  2049. void
  2050. GPIOPinTypeUART(uint32_t ui32Port, uint8_t ui8Pins)
  2051. {
  2052. //
  2053. // Check the arguments.
  2054. //
  2055. ASSERT(_GPIOBaseValid(ui32Port));
  2056. //
  2057. // Make the pin(s) be peripheral controlled.
  2058. //
  2059. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
  2060. //
  2061. // Set the pad(s) for standard push-pull operation.
  2062. //
  2063. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
  2064. }
  2065. //*****************************************************************************
  2066. //
  2067. //! Configures pin(s) for use by the USB peripheral.
  2068. //!
  2069. //! \param ui32Port is the base address of the GPIO port.
  2070. //! \param ui8Pins is the bit-packed representation of the pin(s).
  2071. //!
  2072. //! USB analog pins must be properly configured for the USB peripheral to
  2073. //! function correctly. This function provides the proper configuration for
  2074. //! any USB analog pin(s).
  2075. //!
  2076. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  2077. //! set identifies the pin to be accessed, and where bit 0 of the byte
  2078. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  2079. //!
  2080. //! \note This function cannot be used to turn any pin into a USB pin; it only
  2081. //! configures a USB pin for proper operation. Note that a GPIOPinConfigure()
  2082. //! function call is also required to properly configure a pin for the USB
  2083. //! function.
  2084. //!
  2085. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  2086. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  2087. //! locked against inadvertent reconfiguration. These pins must be unlocked
  2088. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  2089. //! registers before this function can be called. Please see the ``gpio_jtag''
  2090. //! example application for the mechanism required and consult your part
  2091. //! datasheet for information on affected pins.
  2092. //!
  2093. //! \return None.
  2094. //
  2095. //*****************************************************************************
  2096. void
  2097. GPIOPinTypeUSBAnalog(uint32_t ui32Port, uint8_t ui8Pins)
  2098. {
  2099. //
  2100. // Check the arguments.
  2101. //
  2102. ASSERT(_GPIOBaseValid(ui32Port));
  2103. //
  2104. // Make the pin(s) be inputs.
  2105. //
  2106. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_IN);
  2107. //
  2108. // Set the pad(s) for analog operation.
  2109. //
  2110. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA,
  2111. GPIO_PIN_TYPE_ANALOG);
  2112. }
  2113. //*****************************************************************************
  2114. //
  2115. //! Configures pin(s) for use by the USB peripheral.
  2116. //!
  2117. //! \param ui32Port is the base address of the GPIO port.
  2118. //! \param ui8Pins is the bit-packed representation of the pin(s).
  2119. //!
  2120. //! USB digital pins must be properly configured for the USB peripheral to
  2121. //! function correctly. This function provides a typical configuration for
  2122. //! the digital USB pin(s); other configurations may work as well depending
  2123. //! upon the board setup (for example, using the on-chip pull-ups).
  2124. //!
  2125. //! This function should only be used with EPEN and PFAULT pins as all other
  2126. //! USB pins are analog in nature or are not used in devices without OTG
  2127. //! functionality.
  2128. //!
  2129. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  2130. //! set identifies the pin to be accessed, and where bit 0 of the byte
  2131. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  2132. //!
  2133. //! \note This function cannot be used to turn any pin into a USB pin; it only
  2134. //! configures a USB pin for proper operation. Note that a GPIOPinConfigure()
  2135. //! function call is also required to properly configure a pin for the USB
  2136. //! function.
  2137. //!
  2138. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  2139. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  2140. //! locked against inadvertent reconfiguration. These pins must be unlocked
  2141. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  2142. //! registers before this function can be called. Please see the ``gpio_jtag''
  2143. //! example application for the mechanism required and consult your part
  2144. //! datasheet for information on affected pins.
  2145. //!
  2146. //! \return None.
  2147. //
  2148. //*****************************************************************************
  2149. void
  2150. GPIOPinTypeUSBDigital(uint32_t ui32Port, uint8_t ui8Pins)
  2151. {
  2152. //
  2153. // Check the arguments.
  2154. //
  2155. ASSERT(_GPIOBaseValid(ui32Port));
  2156. //
  2157. // Make the pin(s) be peripheral controlled.
  2158. //
  2159. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_HW);
  2160. //
  2161. // Set the pad(s) for standard push-pull operation.
  2162. //
  2163. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
  2164. }
  2165. //*****************************************************************************
  2166. //
  2167. //! Configures pin(s) for use as a hibernate wake-on-high source.
  2168. //!
  2169. //! \param ui32Port is the base address of the GPIO port.
  2170. //! \param ui8Pins is the bit-packed representation of the pin(s).
  2171. //!
  2172. //! The GPIO pins must be properly configured in order to function correctly as
  2173. //! hibernate wake-high inputs. This function provides the proper
  2174. //! configuration for those pin(s).
  2175. //!
  2176. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  2177. //! set identifies the pin to be accessed, and where bit 0 of the byte
  2178. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  2179. //!
  2180. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  2181. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  2182. //! locked against inadvertent reconfiguration. These pins must be unlocked
  2183. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  2184. //! registers before this function can be called. Please see the ``gpio_jtag''
  2185. //! example application for the mechanism required and consult your part
  2186. //! datasheet for information on affected pins.
  2187. //!
  2188. //! \return None.
  2189. //
  2190. //*****************************************************************************
  2191. void
  2192. GPIOPinTypeWakeHigh(uint32_t ui32Port, uint8_t ui8Pins)
  2193. {
  2194. //
  2195. // Check the arguments.
  2196. //
  2197. ASSERT(_GPIOBaseValid(ui32Port));
  2198. //
  2199. // Make the pin(s) inputs.
  2200. //
  2201. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_IN);
  2202. //
  2203. // Set the pad(s) for wake-high operation.
  2204. //
  2205. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA,
  2206. GPIO_PIN_TYPE_WAKE_HIGH);
  2207. }
  2208. //*****************************************************************************
  2209. //
  2210. //! Configures pin(s) for use as a hibernate wake-on-low source.
  2211. //!
  2212. //! \param ui32Port is the base address of the GPIO port.
  2213. //! \param ui8Pins is the bit-packed representation of the pin(s).
  2214. //!
  2215. //! The GPIO pins must be properly configured in order to function correctly as
  2216. //! hibernate wake-low inputs. This function provides the proper
  2217. //! configuration for those pin(s).
  2218. //!
  2219. //! The pin(s) are specified using a bit-packed byte, where each bit that is
  2220. //! set identifies the pin to be accessed, and where bit 0 of the byte
  2221. //! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
  2222. //!
  2223. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  2224. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  2225. //! locked against inadvertent reconfiguration. These pins must be unlocked
  2226. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  2227. //! registers before this function can be called. Please see the ``gpio_jtag''
  2228. //! example application for the mechanism required and consult your part
  2229. //! datasheet for information on affected pins.
  2230. //!
  2231. //! \return None.
  2232. //
  2233. //*****************************************************************************
  2234. void
  2235. GPIOPinTypeWakeLow(uint32_t ui32Port, uint8_t ui8Pins)
  2236. {
  2237. //
  2238. // Check the arguments.
  2239. //
  2240. ASSERT(_GPIOBaseValid(ui32Port));
  2241. //
  2242. // Make the pin(s) inputs.
  2243. //
  2244. GPIODirModeSet(ui32Port, ui8Pins, GPIO_DIR_MODE_IN);
  2245. //
  2246. // Set the pad(s) for wake-high operation.
  2247. //
  2248. GPIOPadConfigSet(ui32Port, ui8Pins, GPIO_STRENGTH_2MA,
  2249. GPIO_PIN_TYPE_WAKE_LOW);
  2250. }
  2251. //*****************************************************************************
  2252. //
  2253. //! Retrieves the wake pins status.
  2254. //!
  2255. //! \param ui32Port is the base address of the GPIO port.
  2256. //!
  2257. //! This function returns the GPIO wake pin status values. The returned
  2258. //! bitfield shows low or high pin state via a value of 0 or 1.
  2259. //!
  2260. //! \note This function is not available on all devices, consult the data sheet
  2261. //! to ensure that the device you are using supports GPIO wake pins.
  2262. //!
  2263. //! \note A subset of GPIO pins on Tiva devices, notably those used by the
  2264. //! JTAG/SWD interface and any pin capable of acting as an NMI input, are
  2265. //! locked against inadvertent reconfiguration. These pins must be unlocked
  2266. //! using direct register writes to the relevant GPIO_O_LOCK and GPIO_O_CR
  2267. //! registers before this function can be called. Please see the ``gpio_jtag''
  2268. //! example application for the mechanism required and consult your part
  2269. //! datasheet for information on affected pins.
  2270. //!
  2271. //! \return Returns the wake pin status.
  2272. //
  2273. //*****************************************************************************
  2274. uint32_t
  2275. GPIOPinWakeStatus(uint32_t ui32Port)
  2276. {
  2277. return(HWREG(ui32Port + GPIO_O_WAKESTAT));
  2278. }
  2279. //*****************************************************************************
  2280. //
  2281. //! Configures the alternate function of a GPIO pin.
  2282. //!
  2283. //! \param ui32PinConfig is the pin configuration value, specified as only one
  2284. //! of the \b GPIO_P??_??? values.
  2285. //!
  2286. //! This function configures the pin mux that selects the peripheral function
  2287. //! associated with a particular GPIO pin. Only one peripheral function at a
  2288. //! time can be associated with a GPIO pin, and each peripheral function should
  2289. //! only be associated with a single GPIO pin at a time (despite the fact that
  2290. //! many of them can be associated with more than one GPIO pin). To fully
  2291. //! configure a pin, a GPIOPinType*() function should also be called.
  2292. //!
  2293. //! The available mappings are supplied on a per-device basis in
  2294. //! <tt>pin_map.h</tt>. The \b PART_<partno> defines controls which set of
  2295. //! defines are included so that they match the device that is being used.
  2296. //! For example, \b PART_TM4C129XNCZAD must be defined in order to get the
  2297. //! correct pin mappings for the TM4C129XNCZAD device.
  2298. //!
  2299. //! \note If the same signal is assigned to two different GPIO port
  2300. //! pins, the signal is assigned to the port with the lowest letter and the
  2301. //! assignment to the higher letter port is ignored.
  2302. //!
  2303. //! \return None.
  2304. //
  2305. //*****************************************************************************
  2306. void
  2307. GPIOPinConfigure(uint32_t ui32PinConfig)
  2308. {
  2309. uint32_t ui32Base, ui32Shift;
  2310. //
  2311. // Check the argument.
  2312. //
  2313. ASSERT(((ui32PinConfig >> 16) & 0xff) < 18);
  2314. ASSERT(((ui32PinConfig >> 8) & 0xe3) == 0);
  2315. //
  2316. // Extract the base address index from the input value.
  2317. //
  2318. ui32Base = (ui32PinConfig >> 16) & 0xff;
  2319. //
  2320. // Get the base address of the GPIO module, selecting either the APB or the
  2321. // AHB aperture as appropriate.
  2322. //
  2323. if(HWREG(SYSCTL_GPIOHBCTL) & (1 << ui32Base))
  2324. {
  2325. ui32Base = g_pui32GPIOBaseAddrs[(ui32Base << 1) + 1];
  2326. }
  2327. else
  2328. {
  2329. ui32Base = g_pui32GPIOBaseAddrs[ui32Base << 1];
  2330. }
  2331. //
  2332. // Extract the shift from the input value.
  2333. //
  2334. ui32Shift = (ui32PinConfig >> 8) & 0xff;
  2335. //
  2336. // Write the requested pin muxing value for this GPIO pin.
  2337. //
  2338. HWREG(ui32Base + GPIO_O_PCTL) = ((HWREG(ui32Base + GPIO_O_PCTL) &
  2339. ~(0xf << ui32Shift)) |
  2340. ((ui32PinConfig & 0xf) << ui32Shift));
  2341. }
  2342. //*****************************************************************************
  2343. //
  2344. //! Enables a GPIO pin as a trigger to start a DMA transaction.
  2345. //!
  2346. //! \param ui32Port is the base address of the GPIO port.
  2347. //! \param ui8Pins is the bit-packed representation of the pin(s).
  2348. //!
  2349. //! This function enables a GPIO pin to be used as a trigger to start a uDMA
  2350. //! transaction. Any GPIO pin can be configured to be an external trigger for
  2351. //! the uDMA. The GPIO pin still generates interrupts if the interrupt is
  2352. //! enabled for the selected pin.
  2353. //!
  2354. //! \return None.
  2355. //
  2356. //*****************************************************************************
  2357. void
  2358. GPIODMATriggerEnable(uint32_t ui32Port, uint8_t ui8Pins)
  2359. {
  2360. //
  2361. // Check the arguments.
  2362. //
  2363. ASSERT(_GPIOBaseValid(ui32Port));
  2364. //
  2365. // Set the pin as a DMA trigger.
  2366. //
  2367. HWREG(ui32Port + GPIO_O_DMACTL) |= ui8Pins;
  2368. }
  2369. //*****************************************************************************
  2370. //
  2371. //! Disables a GPIO pin as a trigger to start a DMA transaction.
  2372. //!
  2373. //! \param ui32Port is the base address of the GPIO port.
  2374. //! \param ui8Pins is the bit-packed representation of the pin(s).
  2375. //!
  2376. //! This function disables a GPIO pin from being used as a trigger to start a
  2377. //! uDMA transaction. This function can be used to disable this feature if it
  2378. //! was enabled via a call to GPIODMATriggerEnable().
  2379. //!
  2380. //! \return None.
  2381. //
  2382. //*****************************************************************************
  2383. void
  2384. GPIODMATriggerDisable(uint32_t ui32Port, uint8_t ui8Pins)
  2385. {
  2386. //
  2387. // Check the arguments.
  2388. //
  2389. ASSERT(_GPIOBaseValid(ui32Port));
  2390. //
  2391. // Set the pin as a DMA trigger.
  2392. //
  2393. HWREG(ui32Port + GPIO_O_DMACTL) &= (~ui8Pins);
  2394. }
  2395. //*****************************************************************************
  2396. //
  2397. //! Enables a GPIO pin as a trigger to start an ADC capture.
  2398. //!
  2399. //! \param ui32Port is the base address of the GPIO port.
  2400. //! \param ui8Pins is the bit-packed representation of the pin(s).
  2401. //!
  2402. //! This function enables a GPIO pin to be used as a trigger to start an ADC
  2403. //! sequence. Any GPIO pin can be configured to be an external trigger for an
  2404. //! ADC sequence. The GPIO pin still generates interrupts if the interrupt is
  2405. //! enabled for the selected pin. To enable the use of a GPIO pin to trigger
  2406. //! the ADC module, the ADCSequenceConfigure() function must be called with the
  2407. //! \b ADC_TRIGGER_EXTERNAL parameter.
  2408. //!
  2409. //! \return None.
  2410. //
  2411. //*****************************************************************************
  2412. void
  2413. GPIOADCTriggerEnable(uint32_t ui32Port, uint8_t ui8Pins)
  2414. {
  2415. //
  2416. // Check the arguments.
  2417. //
  2418. ASSERT(_GPIOBaseValid(ui32Port));
  2419. //
  2420. // Set the pin as a DMA trigger.
  2421. //
  2422. HWREG(ui32Port + GPIO_O_ADCCTL) |= ui8Pins;
  2423. }
  2424. //*****************************************************************************
  2425. //
  2426. //! Disable a GPIO pin as a trigger to start an ADC capture.
  2427. //!
  2428. //! \param ui32Port is the base address of the GPIO port.
  2429. //! \param ui8Pins is the bit-packed representation of the pin(s).
  2430. //!
  2431. //! This function disables a GPIO pin to be used as a trigger to start an ADC
  2432. //! sequence. This function can be used to disable this feature if it was
  2433. //! enabled via a call to GPIOADCTriggerEnable().
  2434. //!
  2435. //! \return None.
  2436. //
  2437. //*****************************************************************************
  2438. void
  2439. GPIOADCTriggerDisable(uint32_t ui32Port, uint8_t ui8Pins)
  2440. {
  2441. //
  2442. // Check the arguments.
  2443. //
  2444. ASSERT(_GPIOBaseValid(ui32Port));
  2445. //
  2446. // Set the pin as a DMA trigger.
  2447. //
  2448. HWREG(ui32Port + GPIO_O_ADCCTL) &= (~ui8Pins);
  2449. }
  2450. //*****************************************************************************
  2451. //
  2452. // Close the Doxygen group.
  2453. //! @}
  2454. //
  2455. //*****************************************************************************