interrupt.c 5.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226
  1. /*
  2. * File : interrupt.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006 - 2011, RT-Thread Development Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2010-10-15 Bernard first version
  13. * 2010-10-15 lgnq modified for LS1B
  14. * 2013-03-29 aozima Modify the interrupt interface implementations.
  15. * 2015-07-06 chinesebear modified for loongson 1c
  16. */
  17. #include <rtthread.h>
  18. #include <rthw.h>
  19. #include "ls1c.h"
  20. #include "ls1c_public.h"
  21. #define MAX_INTR (LS1C_NR_IRQS)
  22. extern rt_uint32_t rt_interrupt_nest;
  23. rt_uint32_t rt_interrupt_from_thread;
  24. rt_uint32_t rt_interrupt_to_thread;
  25. rt_uint32_t rt_thread_switch_interrupt_flag;
  26. static struct rt_irq_desc irq_handle_table[MAX_INTR];
  27. void rt_interrupt_dispatch(void *ptreg);
  28. void rt_hw_timer_handler();
  29. static struct ls1c_intc_regs volatile *ls1c_hw0_icregs
  30. = (struct ls1c_intc_regs volatile *)(LS1C_INTREG_BASE);
  31. /**
  32. * @addtogroup Loongson LS1B
  33. */
  34. /*@{*/
  35. static void rt_hw_interrupt_handler(int vector, void *param)
  36. {
  37. rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
  38. }
  39. /**
  40. * This function will initialize hardware interrupt
  41. */
  42. void rt_hw_interrupt_init(void)
  43. {
  44. rt_int32_t idx;
  45. rt_int32_t i;
  46. rt_uint32_t c0_status = 0;
  47. // 设置协处理器0的状态寄存器SR的IM7-2,允许中断
  48. c0_status = read_c0_status();
  49. c0_status |= 0xFC00;
  50. write_c0_status(c0_status);
  51. // 龙芯1c的中断分为五组
  52. for (i=0; i<5; i++)
  53. {
  54. /* disable */
  55. (ls1c_hw0_icregs+i)->int_en = 0x0;
  56. /* pci active low */
  57. (ls1c_hw0_icregs+i)->int_pol = -1; //must be done here 20110802 lgnq
  58. /* make all interrupts level triggered */
  59. (ls1c_hw0_icregs+i)->int_edge = 0x00000000;
  60. /* mask all interrupts */
  61. (ls1c_hw0_icregs+i)->int_clr = 0xffffffff;
  62. }
  63. rt_memset(irq_handle_table, 0x00, sizeof(irq_handle_table));
  64. for (idx = 0; idx < MAX_INTR; idx ++)
  65. {
  66. irq_handle_table[idx].handler = rt_hw_interrupt_handler;
  67. }
  68. /* init interrupt nest, and context in thread sp */
  69. rt_interrupt_nest = 0;
  70. rt_interrupt_from_thread = 0;
  71. rt_interrupt_to_thread = 0;
  72. rt_thread_switch_interrupt_flag = 0;
  73. }
  74. /**
  75. * This function will mask a interrupt.
  76. * @param vector the interrupt number
  77. */
  78. void rt_hw_interrupt_mask(int vector)
  79. {
  80. /* mask interrupt */
  81. (ls1c_hw0_icregs+(vector>>5))->int_en &= ~(1 << (vector&0x1f));
  82. }
  83. /**
  84. * This function will un-mask a interrupt.
  85. * @param vector the interrupt number
  86. */
  87. void rt_hw_interrupt_umask(int vector)
  88. {
  89. (ls1c_hw0_icregs+(vector>>5))->int_en |= (1 << (vector&0x1f));
  90. }
  91. /**
  92. * This function will install a interrupt service routine to a interrupt.
  93. * @param vector the interrupt number
  94. * @param new_handler the interrupt service routine to be installed
  95. * @param old_handler the old interrupt service routine
  96. */
  97. rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
  98. void *param, char *name)
  99. {
  100. rt_isr_handler_t old_handler = RT_NULL;
  101. if (vector >= 0 && vector < MAX_INTR)
  102. {
  103. old_handler = irq_handle_table[vector].handler;
  104. #ifdef RT_USING_INTERRUPT_INFO
  105. rt_strncpy(irq_handle_table[vector].name, name, RT_NAME_MAX);
  106. #endif /* RT_USING_INTERRUPT_INFO */
  107. irq_handle_table[vector].handler = handler;
  108. irq_handle_table[vector].param = param;
  109. }
  110. return old_handler;
  111. }
  112. /**
  113. * 执行中断处理函数
  114. * @IRQn 中断号
  115. */
  116. void ls1c_do_IRQ(int IRQn)
  117. {
  118. rt_isr_handler_t irq_func;
  119. void *param;
  120. // 找到中断处理函数
  121. irq_func = irq_handle_table[IRQn].handler;
  122. param = irq_handle_table[IRQn].param;
  123. // 执行中断处理函数
  124. irq_func(IRQn, param);
  125. #ifdef RT_USING_INTERRUPT_INFO
  126. irq_handle_table[IRQn].counter++;
  127. #endif
  128. return ;
  129. }
  130. void ls1c_irq_dispatch(int n)
  131. {
  132. rt_uint32_t intstatus, irq;
  133. /* Receive interrupt signal, compute the irq */
  134. intstatus = (ls1c_hw0_icregs+n)->int_isr & (ls1c_hw0_icregs+n)->int_en;
  135. if (0 == intstatus)
  136. return ;
  137. // 执行中断处理函数
  138. irq = ls1c_ffs(intstatus) - 1;
  139. ls1c_do_IRQ((n<<5) + irq);
  140. /* ack interrupt */
  141. (ls1c_hw0_icregs+n)->int_clr |= (1 << irq);
  142. return ;
  143. }
  144. void rt_interrupt_dispatch(void *ptreg)
  145. {
  146. int irq;
  147. void *param;
  148. rt_isr_handler_t irq_func;
  149. static rt_uint32_t status = 0;
  150. rt_uint32_t c0_status;
  151. rt_uint32_t c0_cause;
  152. volatile rt_uint32_t cause_im;
  153. volatile rt_uint32_t status_im;
  154. rt_uint32_t pending_im;
  155. /* check os timer */
  156. c0_status = read_c0_status();
  157. c0_cause = read_c0_cause();
  158. cause_im = c0_cause & ST0_IM;
  159. status_im = c0_status & ST0_IM;
  160. pending_im = cause_im & status_im;
  161. if (pending_im & CAUSEF_IP7)
  162. {
  163. rt_hw_timer_handler();
  164. }
  165. else if (pending_im & CAUSEF_IP2)
  166. {
  167. ls1c_irq_dispatch(0);
  168. }
  169. else if (pending_im & CAUSEF_IP3)
  170. {
  171. ls1c_irq_dispatch(1);
  172. }
  173. else if (pending_im & CAUSEF_IP4)
  174. {
  175. ls1c_irq_dispatch(2);
  176. }
  177. else if (pending_im & CAUSEF_IP5)
  178. {
  179. ls1c_irq_dispatch(3);
  180. }
  181. else if (pending_im & CAUSEF_IP6)
  182. {
  183. ls1c_irq_dispatch(4);
  184. }
  185. }
  186. /*@}*/