i2c-bit-ops.c 8.0 KB

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  1. /*
  2. * File : i2c-bit-ops.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006, RT-Thread Development Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2012-04-25 weety first version
  13. */
  14. #include <i2c.h>
  15. #include <i2c-bit-ops.h>
  16. #ifdef RT_I2C_BIT_DEBUG
  17. #define bit_dbg(fmt, ...) rt_kprintf(fmt, ##__VA_ARGS__)
  18. #else
  19. #define bit_dbg(fmt, ...)
  20. #endif
  21. #define SET_SDA(ops, val) ops->set_sda(ops->data, val)
  22. #define SET_SCL(ops, val) ops->set_scl(ops->data, val)
  23. #define GET_SDA(ops) ops->get_sda(ops->data)
  24. #define GET_SCL(ops) ops->get_scl(ops->data)
  25. rt_inline void i2c_delay(struct rt_i2c_bit_ops *ops)
  26. {
  27. ops->udelay((ops->delay_us + 1) >> 1);
  28. }
  29. rt_inline void i2c_delay2(struct rt_i2c_bit_ops *ops)
  30. {
  31. ops->udelay(ops->delay_us);
  32. }
  33. #define SDA_L(ops) SET_SDA(ops, 0)
  34. #define SDA_H(ops) SET_SDA(ops, 1)
  35. #define SCL_L(ops) SET_SCL(ops, 0)
  36. /*
  37. * release scl line, and wait scl line to high.
  38. */
  39. static rt_err_t SCL_H(struct rt_i2c_bit_ops *ops)
  40. {
  41. rt_tick_t start;
  42. SET_SCL(ops, 1);
  43. if (!ops->get_scl)
  44. goto done;
  45. start = rt_tick_get();
  46. while (!GET_SCL(ops))
  47. {
  48. if ((rt_tick_get() - start) > ops->timeout)
  49. return -RT_ETIMEOUT;
  50. rt_thread_delay((ops->timeout + 1) >> 1);
  51. }
  52. #ifdef RT_I2C_BIT_DEBUG
  53. if (rt_tick_get() != start)
  54. {
  55. bit_dbg("wait %ld tick for SCL line to go high\n",
  56. rt_tick_get() - start);
  57. }
  58. #endif
  59. done:
  60. i2c_delay(ops);
  61. return RT_EOK;
  62. }
  63. static void i2c_start(struct rt_i2c_bit_ops *ops)
  64. {
  65. #ifdef RT_I2C_BIT_DEBUG
  66. if (ops->get_scl && !GET_SCL(ops))
  67. {
  68. bit_dbg("I2C bus error, SCL line low\n");
  69. }
  70. if (ops->get_sda && !GET_SDA(ops))
  71. {
  72. bit_dbg("I2C bus error, SDA line low\n");
  73. }
  74. #endif
  75. SDA_L(ops);
  76. i2c_delay(ops);
  77. SCL_L(ops);
  78. }
  79. static void i2c_restart(struct rt_i2c_bit_ops *ops)
  80. {
  81. SDA_H(ops);
  82. SCL_H(ops);
  83. i2c_delay(ops);
  84. SDA_L(ops);
  85. i2c_delay(ops);
  86. SCL_L(ops);
  87. }
  88. static void i2c_stop(struct rt_i2c_bit_ops *ops)
  89. {
  90. SDA_L(ops);
  91. i2c_delay(ops);
  92. SCL_H(ops);
  93. i2c_delay(ops);
  94. SDA_H(ops);
  95. i2c_delay2(ops);
  96. }
  97. rt_inline rt_bool_t i2c_waitack(struct rt_i2c_bit_ops *ops)
  98. {
  99. rt_bool_t ack;
  100. SDA_H(ops);
  101. i2c_delay(ops);
  102. if (SCL_H(ops) < 0)
  103. {
  104. bit_dbg("wait ack timeout\n");
  105. return -RT_ETIMEOUT;
  106. }
  107. ack = !GET_SDA(ops); /* ack : sda pin is pulled low */
  108. bit_dbg("%s\n", ack ? "ACK" : "NACK");
  109. SCL_L(ops);
  110. return ack;
  111. }
  112. static rt_int32_t i2c_writeb(struct rt_i2c_bus *bus, rt_uint8_t data)
  113. {
  114. rt_int32_t i;
  115. rt_uint8_t bit;
  116. struct rt_i2c_bit_ops *ops = bus->priv;
  117. for (i = 7; i >= 0; i--)
  118. {
  119. SCL_L(ops);
  120. bit = (data >> i) & 1;
  121. SET_SDA(ops, bit);
  122. i2c_delay(ops);
  123. if (SCL_H(ops) < 0)
  124. {
  125. bit_dbg("i2c_writeb: 0x%02x, "
  126. "wait scl pin high timeout at bit #%d\n",
  127. data, i);
  128. return -RT_ETIMEOUT;
  129. }
  130. }
  131. SCL_L(ops);
  132. i2c_delay(ops);
  133. return i2c_waitack(ops);
  134. }
  135. static rt_int32_t i2c_readb(struct rt_i2c_bus *bus)
  136. {
  137. rt_uint8_t i;
  138. rt_uint8_t data = 0;
  139. struct rt_i2c_bit_ops *ops = bus->priv;
  140. SDA_H(ops);
  141. i2c_delay(ops);
  142. for (i = 0; i < 8; i++)
  143. {
  144. data <<= 1;
  145. if (SCL_H(ops) < 0)
  146. {
  147. bit_dbg("i2c_readb: wait scl pin high "
  148. "timeout at bit #%d\n", 7 - i);
  149. return -RT_ETIMEOUT;
  150. }
  151. if (GET_SDA(ops))
  152. data |= 1;
  153. SCL_L(ops);
  154. i2c_delay2(ops);
  155. }
  156. return data;
  157. }
  158. static rt_size_t i2c_send_bytes(struct rt_i2c_bus *bus, struct rt_i2c_msg *msg)
  159. {
  160. rt_int32_t ret;
  161. rt_size_t bytes = 0;
  162. const rt_uint8_t *ptr = msg->buf;
  163. rt_int32_t count = msg->len;
  164. rt_uint16_t ignore_nack = msg->flags & RT_I2C_IGNORE_NACK;
  165. while (count > 0)
  166. {
  167. ret = i2c_writeb(bus, *ptr);
  168. if ((ret > 0) || (ignore_nack && (ret == 0)))
  169. {
  170. count--;
  171. ptr++;
  172. bytes++;
  173. }
  174. else if (ret == 0)
  175. {
  176. rt_kprintf("send bytes: NACK.\n");
  177. return -RT_ERROR;
  178. }
  179. else
  180. {
  181. rt_kprintf("send bytes: error %d\n", ret);
  182. return ret;
  183. }
  184. }
  185. return bytes;
  186. }
  187. static rt_err_t i2c_send_ack_or_nack(struct rt_i2c_bus *bus, int ack)
  188. {
  189. struct rt_i2c_bit_ops *ops = bus->priv;
  190. if (ack)
  191. SET_SDA(ops, 0);
  192. i2c_delay(ops);
  193. if (SCL_H(ops) < 0)
  194. {
  195. rt_kprintf("ACK or NACK timeout\n");
  196. return -RT_ETIMEOUT;
  197. }
  198. SCL_L(ops);
  199. return RT_EOK;
  200. }
  201. static rt_size_t i2c_recv_bytes(struct rt_i2c_bus *bus, struct rt_i2c_msg *msg)
  202. {
  203. rt_int32_t val;
  204. rt_int32_t bytes = 0; /* actual bytes */
  205. rt_uint8_t *ptr = msg->buf;
  206. rt_int32_t count = msg->len;
  207. const rt_uint32_t flags = msg->flags;
  208. while (count > 0)
  209. {
  210. val = i2c_readb(bus);
  211. if (val >= 0)
  212. {
  213. *ptr = val;
  214. bytes++;
  215. }
  216. else
  217. {
  218. break;
  219. }
  220. ptr++;
  221. count--;
  222. bit_dbg("recieve bytes: 0x%02x, %s\n",
  223. val, (flags & RT_I2C_NO_READ_ACK) ?
  224. "(No ACK/NACK)" : (count ? "ACK" : "NACK"));
  225. if (!(flags & RT_I2C_NO_READ_ACK))
  226. {
  227. val = i2c_send_ack_or_nack(bus, count);
  228. if (val < 0)
  229. return val;
  230. }
  231. }
  232. return bytes;
  233. }
  234. static rt_int32_t i2c_send_address(struct rt_i2c_bus *bus,
  235. rt_uint8_t addr, rt_int32_t retries)
  236. {
  237. struct rt_i2c_bit_ops *ops = bus->priv;
  238. rt_int32_t i;
  239. rt_err_t ret = 0;
  240. for (i = 0; i <= retries; i++)
  241. {
  242. ret = i2c_writeb(bus, addr);
  243. if (ret == 1 || i == retries)
  244. break;
  245. bit_dbg("send stop condition\n");
  246. i2c_stop(ops);
  247. i2c_delay2(ops);
  248. bit_dbg("send start condition\n");
  249. i2c_start(ops);
  250. }
  251. return ret;
  252. }
  253. static rt_err_t i2c_bit_send_address(struct rt_i2c_bus *bus, struct rt_i2c_msg *msg)
  254. {
  255. rt_uint16_t flags = msg->flags;
  256. rt_uint16_t ignore_nack = msg->flags & RT_I2C_IGNORE_NACK;
  257. struct rt_i2c_bit_ops *ops = bus->priv;
  258. rt_uint8_t addr1, addr2;
  259. rt_int32_t retries;
  260. rt_err_t ret;
  261. retries = ignore_nack ? 0 : bus->retries;
  262. if (flags & RT_I2C_ADDR_10BIT)
  263. {
  264. addr1 = 0xf0 | ((msg->addr >> 7) & 0x06);
  265. addr2 = msg->addr & 0xff;
  266. bit_dbg("addr1: %d, addr2: %d\n", addr1, addr2);
  267. ret = i2c_send_address(bus, addr1, retries);
  268. if ((ret != 1) && !ignore_nack)
  269. {
  270. rt_kprintf("NACK: sending first addr\n");
  271. return -RT_EIO;
  272. }
  273. ret = i2c_writeb(bus, addr2);
  274. if ((ret != 1) && !ignore_nack)
  275. {
  276. rt_kprintf("NACK: sending second addr\n");
  277. return -RT_EIO;
  278. }
  279. if (flags & RT_I2C_RD)
  280. {
  281. bit_dbg("send repeated start condition\n");
  282. i2c_restart(ops);
  283. addr1 |= 0x01;
  284. ret = i2c_send_address(bus, addr1, retries);
  285. if ((ret != 1) && !ignore_nack)
  286. {
  287. rt_kprintf("NACK: sending repeated addr\n");
  288. return -RT_EIO;
  289. }
  290. }
  291. }
  292. else
  293. { /* 7-bit addr */
  294. addr1 = msg->addr << 1;
  295. if (flags & RT_I2C_RD)
  296. addr1 |= 1;
  297. ret = i2c_send_address(bus, addr1, retries);
  298. if ((ret != 1) && !ignore_nack)
  299. return -RT_EIO;
  300. }
  301. return RT_EOK;
  302. }
  303. static rt_size_t i2c_bit_xfer(struct rt_i2c_bus *bus,
  304. struct rt_i2c_msg msgs[], rt_uint32_t num)
  305. {
  306. struct rt_i2c_msg *msg;
  307. struct rt_i2c_bit_ops *ops = bus->priv;
  308. rt_int32_t i, ret;
  309. rt_uint16_t ignore_nack;
  310. bit_dbg("send start condition\n");
  311. i2c_start(ops);
  312. for (i = 0; i < num; i++)
  313. {
  314. msg = &msgs[i];
  315. ignore_nack = msg->flags & RT_I2C_IGNORE_NACK;
  316. if (!(msg->flags & RT_I2C_NO_START))
  317. {
  318. if (i)
  319. {
  320. i2c_restart(ops);
  321. }
  322. ret = i2c_bit_send_address(bus, msg);
  323. if ((ret != RT_EOK) && !ignore_nack)
  324. {
  325. bit_dbg("receive NACK from device addr 0x%02x msg #%d\n",
  326. msgs[i].addr, i);
  327. goto out;
  328. }
  329. }
  330. if (msg->flags & RT_I2C_RD)
  331. {
  332. ret = i2c_recv_bytes(bus, msg);
  333. if (ret >= 1)
  334. bit_dbg("read %d byte%s\n",
  335. ret, ret == 1 ? "" : "s");
  336. if (ret < msg->len)
  337. {
  338. if (ret >= 0)
  339. ret = -RT_EIO;
  340. goto out;
  341. }
  342. }
  343. else
  344. {
  345. ret = i2c_send_bytes(bus, msg);
  346. if (ret >= 1)
  347. bit_dbg("write %d byte%s\n",
  348. ret, ret == 1 ? "" : "s");
  349. if (ret < msg->len)
  350. {
  351. if (ret >= 0)
  352. ret = -RT_ERROR;
  353. goto out;
  354. }
  355. }
  356. }
  357. ret = i;
  358. out:
  359. bit_dbg("send stop condition\n");
  360. i2c_stop(ops);
  361. return ret;
  362. }
  363. static const struct rt_i2c_bus_ops i2c_bit_bus_ops = {
  364. i2c_bit_xfer,
  365. RT_NULL,
  366. RT_NULL
  367. };
  368. rt_err_t rt_i2c_bit_add_bus(struct rt_i2c_bus *bus)
  369. {
  370. rt_err_t err;
  371. struct rt_i2c_bit_ops *bit_ops = bus->priv;
  372. RT_ASSERT(bit_ops != RT_NULL);
  373. bus->ops = &i2c_bit_bus_ops;
  374. return rt_i2c_bus_register(bus);
  375. }