ssi.h 3.2 KB

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  1. /*
  2. * This file is part of FH8620 BSP for RT-Thread distribution.
  3. *
  4. * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
  5. * All rights reserved
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along
  18. * with this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  20. *
  21. * Visit http://www.fullhan.com to get contact with Fullhan.
  22. *
  23. * Change Logs:
  24. * Date Author Notes
  25. */
  26. #ifndef SSI_H_
  27. #define SSI_H_
  28. #include "libraries/inc/fh_driverlib.h"
  29. #include <drivers/spi.h>
  30. #include <rtdevice.h>
  31. #include "fh_dma.h"
  32. #define SPI_PRIV(drv) ( (struct fh_spi_obj)(drv->priv) )
  33. #define FH_SPI_SLAVE_MAX_NO 2
  34. struct spi_controller;
  35. //platform use below
  36. struct spi_slave_platform_data{
  37. rt_uint32_t cs_pin;
  38. #define ACTIVE_LOW 1
  39. #define ACTIVE_HIGH 2
  40. rt_uint32_t actice_level;
  41. };
  42. struct spi_control_platform_data{
  43. rt_uint32_t id;
  44. rt_uint32_t irq;
  45. rt_uint32_t base;
  46. rt_uint32_t max_hz;
  47. rt_uint32_t slave_no;
  48. rt_uint32_t clk_in;
  49. //handshake no...
  50. rt_uint32_t rx_hs_no;
  51. rt_uint32_t tx_hs_no;
  52. char *dma_name;
  53. //isr will be the default...
  54. #define USE_ISR_TRANSFER 0
  55. #define USE_DMA_TRANSFER 1
  56. rt_uint32_t transfer_mode;
  57. struct spi_controller *control;
  58. struct spi_slave_platform_data plat_slave[FH_SPI_SLAVE_MAX_NO];
  59. };
  60. struct spi_controller;
  61. //driver use below.......
  62. struct spi_slave_info
  63. {
  64. struct rt_spi_device spi_device;
  65. struct spi_controller *control;
  66. struct spi_slave_platform_data plat_slave;
  67. rt_uint32_t id;
  68. //spi control will use to find all the slave info..
  69. struct spi_slave_info *next;
  70. };
  71. struct spi_dma
  72. {
  73. char *dma_name;
  74. #define DMA_BIND_OK 0
  75. #define DMA_BIND_ERROR 1
  76. rt_uint32_t dma_flag;
  77. //bind to the dma dev..
  78. rt_uint32_t rx_hs;
  79. rt_uint32_t tx_hs;
  80. rt_uint8_t *rx_dummy_buff;
  81. rt_uint8_t *tx_dummy_buff;
  82. struct rt_dma_device *dma_dev;
  83. struct dma_transfer tx_trans;
  84. struct dma_transfer rx_trans;
  85. struct spi_controller *control;
  86. };
  87. struct spi_controller
  88. {
  89. rt_uint32_t id;
  90. rt_uint32_t irq;
  91. rt_uint32_t base;
  92. rt_uint32_t max_hz;
  93. rt_uint32_t slave_no;
  94. rt_uint32_t clk_in;
  95. //bind to the platform data....
  96. struct spi_control_platform_data *plat_data;
  97. //rt_uint32_t dma_xfer_flag;
  98. #define XFER_USE_ISR 0
  99. #define XFER_USE_DMA 1
  100. rt_uint32_t xfer_mode;
  101. struct spi_dma dma;
  102. rt_uint32_t dma_complete_times;
  103. struct rt_spi_bus spi_bus;
  104. struct spi_slave_info *spi_slave;
  105. struct rt_spi_message* current_message;
  106. struct rt_completion transfer_completion;
  107. struct rt_semaphore xfer_lock;
  108. struct fh_spi_obj obj;
  109. rt_uint32_t received_len;
  110. rt_uint32_t transfered_len;
  111. void* priv;
  112. };
  113. void rt_hw_spi_init(void);
  114. #endif /* SPI_H_ */