stm32f0xx_it.c 5.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160
  1. /* USER CODE BEGIN Header */
  2. /**
  3. ******************************************************************************
  4. * @file stm32f0xx_it.c
  5. * @brief Interrupt Service Routines.
  6. ******************************************************************************
  7. *
  8. * COPYRIGHT(c) 2018 STMicroelectronics
  9. *
  10. * Redistribution and use in source and binary forms, with or without modification,
  11. * are permitted provided that the following conditions are met:
  12. * 1. Redistributions of source code must retain the above copyright notice,
  13. * this list of conditions and the following disclaimer.
  14. * 2. Redistributions in binary form must reproduce the above copyright notice,
  15. * this list of conditions and the following disclaimer in the documentation
  16. * and/or other materials provided with the distribution.
  17. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  18. * may be used to endorse or promote products derived from this software
  19. * without specific prior written permission.
  20. *
  21. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  22. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  23. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  24. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  25. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  26. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  27. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  28. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  29. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31. *
  32. ******************************************************************************
  33. */
  34. /* USER CODE END Header */
  35. /* Includes ------------------------------------------------------------------*/
  36. #include "main.h"
  37. #include "stm32f0xx_it.h"
  38. /* Private includes ----------------------------------------------------------*/
  39. /* USER CODE BEGIN Includes */
  40. /* USER CODE END Includes */
  41. /* Private typedef -----------------------------------------------------------*/
  42. /* USER CODE BEGIN TD */
  43. /* USER CODE END TD */
  44. /* Private define ------------------------------------------------------------*/
  45. /* USER CODE BEGIN PD */
  46. /* USER CODE END PD */
  47. /* Private macro -------------------------------------------------------------*/
  48. /* USER CODE BEGIN PM */
  49. /* USER CODE END PM */
  50. /* Private variables ---------------------------------------------------------*/
  51. /* USER CODE BEGIN PV */
  52. /* USER CODE END PV */
  53. /* Private function prototypes -----------------------------------------------*/
  54. /* USER CODE BEGIN PFP */
  55. /* USER CODE END PFP */
  56. /* Private user code ---------------------------------------------------------*/
  57. /* USER CODE BEGIN 0 */
  58. /* USER CODE END 0 */
  59. /* External variables --------------------------------------------------------*/
  60. /* USER CODE BEGIN EV */
  61. /* USER CODE END EV */
  62. /******************************************************************************/
  63. /* Cortex-M0 Processor Interruption and Exception Handlers */
  64. /******************************************************************************/
  65. /**
  66. * @brief This function handles Non maskable interrupt.
  67. */
  68. void NMI_Handler(void)
  69. {
  70. /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
  71. /* USER CODE END NonMaskableInt_IRQn 0 */
  72. /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
  73. /* USER CODE END NonMaskableInt_IRQn 1 */
  74. }
  75. /**
  76. * @brief This function handles Hard fault interrupt.
  77. */
  78. void HardFault_Handler(void)
  79. {
  80. /* USER CODE BEGIN HardFault_IRQn 0 */
  81. /* USER CODE END HardFault_IRQn 0 */
  82. while (1)
  83. {
  84. /* USER CODE BEGIN W1_HardFault_IRQn 0 */
  85. /* USER CODE END W1_HardFault_IRQn 0 */
  86. }
  87. }
  88. /**
  89. * @brief This function handles System service call via SWI instruction.
  90. */
  91. void SVC_Handler(void)
  92. {
  93. /* USER CODE BEGIN SVC_IRQn 0 */
  94. /* USER CODE END SVC_IRQn 0 */
  95. /* USER CODE BEGIN SVC_IRQn 1 */
  96. /* USER CODE END SVC_IRQn 1 */
  97. }
  98. /**
  99. * @brief This function handles Pendable request for system service.
  100. */
  101. void PendSV_Handler(void)
  102. {
  103. /* USER CODE BEGIN PendSV_IRQn 0 */
  104. /* USER CODE END PendSV_IRQn 0 */
  105. /* USER CODE BEGIN PendSV_IRQn 1 */
  106. /* USER CODE END PendSV_IRQn 1 */
  107. }
  108. /**
  109. * @brief This function handles System tick timer.
  110. */
  111. void SysTick_Handler(void)
  112. {
  113. /* USER CODE BEGIN SysTick_IRQn 0 */
  114. /* USER CODE END SysTick_IRQn 0 */
  115. HAL_IncTick();
  116. /* USER CODE BEGIN SysTick_IRQn 1 */
  117. /* USER CODE END SysTick_IRQn 1 */
  118. }
  119. /******************************************************************************/
  120. /* STM32F0xx Peripheral Interrupt Handlers */
  121. /* Add here the Interrupt Handlers for the used peripherals. */
  122. /* For the available peripheral interrupt handler names, */
  123. /* please refer to the startup file (startup_stm32f0xx.s). */
  124. /******************************************************************************/
  125. /* USER CODE BEGIN 1 */
  126. /* USER CODE END 1 */
  127. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/