drv_soft_spi.c 5.5 KB

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  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-6-14 solar first version
  9. */
  10. #include <board.h>
  11. #include <string.h>
  12. #include "drv_soft_spi.h"
  13. #include "drv_config.h"
  14. #if defined(RT_USING_SPI) && defined(RT_USING_SPI_BITOPS) && defined(RT_USING_PIN)
  15. //#define DRV_DEBUG
  16. #define LOG_TAG "drv.soft_spi"
  17. #include <drv_log.h>
  18. static struct stm32_soft_spi_config soft_spi_config[] =
  19. {
  20. #ifdef BSP_USING_SOFT_SPI1
  21. SOFT_SPI1_BUS_CONFIG,
  22. #endif
  23. #ifdef BSP_USING_SOFT_SPI2
  24. SOFT_SPI2_BUS_CONFIG,
  25. #endif
  26. };
  27. /**
  28. * Attach the spi device to soft SPI bus, this function must be used after initialization.
  29. */
  30. rt_err_t rt_hw_softspi_device_attach(const char *bus_name, const char *device_name, rt_base_t cs_pin)
  31. {
  32. rt_err_t result;
  33. struct rt_spi_device *spi_device;
  34. /* attach the device to soft spi bus*/
  35. spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
  36. RT_ASSERT(spi_device != RT_NULL);
  37. result = rt_spi_bus_attach_device_cspin(spi_device, device_name, bus_name, cs_pin, RT_NULL);
  38. return result;
  39. }
  40. static void stm32_spi_gpio_init(struct stm32_soft_spi *spi)
  41. {
  42. struct stm32_soft_spi_config *cfg = (struct stm32_soft_spi_config *)spi->cfg;
  43. rt_pin_mode(cfg->sck, PIN_MODE_OUTPUT);
  44. rt_pin_mode(cfg->miso, PIN_MODE_INPUT);
  45. rt_pin_mode(cfg->mosi, PIN_MODE_OUTPUT);
  46. rt_pin_write(cfg->miso, PIN_HIGH);
  47. rt_pin_write(cfg->sck, PIN_HIGH);
  48. rt_pin_write(cfg->mosi, PIN_HIGH);
  49. }
  50. void stm32_tog_sclk(void *data)
  51. {
  52. struct stm32_soft_spi_config* cfg = (struct stm32_soft_spi_config*)data;
  53. if(rt_pin_read(cfg->sck) == PIN_HIGH)
  54. {
  55. rt_pin_write(cfg->sck, PIN_LOW);
  56. }
  57. else
  58. {
  59. rt_pin_write(cfg->sck, PIN_HIGH);
  60. }
  61. }
  62. void stm32_set_sclk(void *data, rt_int32_t state)
  63. {
  64. struct stm32_soft_spi_config* cfg = (struct stm32_soft_spi_config*)data;
  65. if (state)
  66. {
  67. rt_pin_write(cfg->sck, PIN_HIGH);
  68. }
  69. else
  70. {
  71. rt_pin_write(cfg->sck, PIN_LOW);
  72. }
  73. }
  74. void stm32_set_mosi(void *data, rt_int32_t state)
  75. {
  76. struct stm32_soft_spi_config* cfg = (struct stm32_soft_spi_config*)data;
  77. if (state)
  78. {
  79. rt_pin_write(cfg->mosi, PIN_HIGH);
  80. }
  81. else
  82. {
  83. rt_pin_write(cfg->mosi, PIN_LOW);
  84. }
  85. }
  86. void stm32_set_miso(void *data, rt_int32_t state)
  87. {
  88. struct stm32_soft_spi_config* cfg = (struct stm32_soft_spi_config*)data;
  89. if (state)
  90. {
  91. rt_pin_write(cfg->miso, PIN_HIGH);
  92. }
  93. else
  94. {
  95. rt_pin_write(cfg->miso, PIN_LOW);
  96. }
  97. }
  98. rt_int32_t stm32_get_sclk(void *data)
  99. {
  100. struct stm32_soft_spi_config* cfg = (struct stm32_soft_spi_config*)data;
  101. return rt_pin_read(cfg->sck);
  102. }
  103. rt_int32_t stm32_get_mosi(void *data)
  104. {
  105. struct stm32_soft_spi_config* cfg = (struct stm32_soft_spi_config*)data;
  106. return rt_pin_read(cfg->mosi);
  107. }
  108. rt_int32_t stm32_get_miso(void *data)
  109. {
  110. struct stm32_soft_spi_config* cfg = (struct stm32_soft_spi_config*)data;
  111. return rt_pin_read(cfg->miso);
  112. }
  113. void stm32_dir_mosi(void *data, rt_int32_t state)
  114. {
  115. struct stm32_soft_spi_config* cfg = (struct stm32_soft_spi_config*)data;
  116. if (state)
  117. {
  118. rt_pin_mode(cfg->mosi, PIN_MODE_INPUT);
  119. }
  120. else
  121. {
  122. rt_pin_mode(cfg->mosi, PIN_MODE_OUTPUT);
  123. }
  124. }
  125. void stm32_dir_miso(void *data, rt_int32_t state)
  126. {
  127. struct stm32_soft_spi_config* cfg = (struct stm32_soft_spi_config*)data;
  128. if (state)
  129. {
  130. rt_pin_mode(cfg->miso, PIN_MODE_INPUT);
  131. }
  132. else
  133. {
  134. rt_pin_mode(cfg->miso, PIN_MODE_OUTPUT);
  135. }
  136. }
  137. static void stm32_udelay(rt_uint32_t us)
  138. {
  139. rt_uint32_t ticks;
  140. rt_uint32_t told, tnow, tcnt = 0;
  141. rt_uint32_t reload = SysTick->LOAD;
  142. ticks = us * reload / (1000000UL / RT_TICK_PER_SECOND);
  143. told = SysTick->VAL;
  144. while (1)
  145. {
  146. tnow = SysTick->VAL;
  147. if (tnow != told)
  148. {
  149. if (tnow < told)
  150. {
  151. tcnt += told - tnow;
  152. }
  153. else
  154. {
  155. tcnt += reload - tnow + told;
  156. }
  157. told = tnow;
  158. if (tcnt >= ticks)
  159. {
  160. break;
  161. }
  162. }
  163. }
  164. }
  165. static struct rt_spi_bit_ops stm32_soft_spi_ops =
  166. {
  167. .data = RT_NULL,
  168. .tog_sclk = stm32_tog_sclk,
  169. .set_sclk = stm32_set_sclk,
  170. .set_mosi = stm32_set_mosi,
  171. .set_miso = stm32_set_miso,
  172. .get_sclk = stm32_get_sclk,
  173. .get_mosi = stm32_get_mosi,
  174. .get_miso = stm32_get_miso,
  175. .dir_mosi = stm32_dir_mosi,
  176. .dir_miso = stm32_dir_miso,
  177. .udelay = stm32_udelay,
  178. .delay_us = 1,
  179. };
  180. static struct stm32_soft_spi spi_obj[sizeof(soft_spi_config) / sizeof(soft_spi_config[0])];
  181. /* Soft SPI initialization function */
  182. int rt_hw_softspi_init(void)
  183. {
  184. rt_size_t obj_num = sizeof(spi_obj) / sizeof(struct stm32_soft_spi);
  185. rt_err_t result;
  186. for (int i = 0; i < obj_num; i++)
  187. {
  188. memcpy(&spi_obj[i].ops, &stm32_soft_spi_ops, sizeof(struct rt_spi_bit_ops));
  189. spi_obj[i].ops.data = (void *)&soft_spi_config[i];
  190. spi_obj[i].spi.ops = &stm32_soft_spi_ops;
  191. spi_obj[i].cfg = (void *)&soft_spi_config[i];
  192. stm32_spi_gpio_init(&spi_obj[i]);
  193. result = rt_spi_bit_add_bus(&spi_obj[i].spi, soft_spi_config[i].bus_name, &spi_obj[i].ops);
  194. RT_ASSERT(result == RT_EOK);
  195. }
  196. return RT_EOK;
  197. }
  198. INIT_BOARD_EXPORT(rt_hw_softspi_init);
  199. #endif /* defined(RT_USING_SPI) && defined(RT_USING_SPI_BITOPS) && defined(RT_USING_PIN) */