drv_i2s.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635
  1. /**************************************************************************//**
  2. *
  3. * @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
  4. *
  5. * SPDX-License-Identifier: Apache-2.0
  6. *
  7. * Change Logs:
  8. * Date Author Notes
  9. * 2022-3-15 Wayne First version
  10. *
  11. ******************************************************************************/
  12. #include <rtconfig.h>
  13. #if defined(BSP_USING_I2S)
  14. #include <rtdevice.h>
  15. #include <drv_pdma.h>
  16. #include <drv_i2s.h>
  17. /* Private define ---------------------------------------------------------------*/
  18. #define DBG_ENABLE
  19. #define DBG_LEVEL DBG_LOG
  20. #define DBG_SECTION_NAME "i2s"
  21. #define DBG_COLOR
  22. #include <rtdbg.h>
  23. enum
  24. {
  25. I2S_START = -1,
  26. #if defined(BSP_USING_I2S0)
  27. I2S0_IDX,
  28. #endif
  29. #if defined(BSP_USING_I2S1)
  30. I2S1_IDX,
  31. #endif
  32. I2S_CNT
  33. };
  34. /* Private functions ------------------------------------------------------------*/
  35. static rt_err_t nu_i2s_getcaps(struct rt_audio_device *audio, struct rt_audio_caps *caps);
  36. static rt_err_t nu_i2s_configure(struct rt_audio_device *audio, struct rt_audio_caps *caps);
  37. static rt_err_t nu_i2s_init(struct rt_audio_device *audio);
  38. static rt_err_t nu_i2s_start(struct rt_audio_device *audio, int stream);
  39. static rt_err_t nu_i2s_stop(struct rt_audio_device *audio, int stream);
  40. static void nu_i2s_buffer_info(struct rt_audio_device *audio, struct rt_audio_buf_info *info);
  41. /* Public functions -------------------------------------------------------------*/
  42. rt_err_t nu_i2s_acodec_register(nu_acodec_ops_t);
  43. /* Private variables ------------------------------------------------------------*/
  44. static struct nu_i2s nu_i2s_arr[] =
  45. {
  46. #if defined(BSP_USING_I2S0)
  47. {
  48. .name = "sound0",
  49. .i2s_base = I2S0,
  50. .i2s_rst = I2S0_RST,
  51. .i2s_dais = {
  52. [NU_I2S_DAI_PLAYBACK] = {
  53. .pdma_perp = PDMA_I2S0_TX,
  54. },
  55. [NU_I2S_DAI_CAPTURE] = {
  56. .pdma_perp = PDMA_I2S0_RX,
  57. }
  58. }
  59. },
  60. #endif
  61. #if defined(BSP_USING_I2S1)
  62. {
  63. .name = "sound1",
  64. .i2s_base = I2S1,
  65. .i2s_rst = I2S1_RST,
  66. .i2s_dais = {
  67. [NU_I2S_DAI_PLAYBACK] = {
  68. .pdma_perp = PDMA_I2S1_TX,
  69. },
  70. [NU_I2S_DAI_CAPTURE] = {
  71. .pdma_perp = PDMA_I2S1_RX,
  72. }
  73. }
  74. },
  75. #endif
  76. };
  77. static void nu_pdma_i2s_rx_cb(void *pvUserData, uint32_t u32EventFilter)
  78. {
  79. nu_i2s_t psNuI2s = (nu_i2s_t)pvUserData;
  80. nu_i2s_dai_t psNuI2sDai;
  81. RT_ASSERT(psNuI2s != RT_NULL);
  82. psNuI2sDai = &psNuI2s->i2s_dais[NU_I2S_DAI_CAPTURE];
  83. if (u32EventFilter & NU_PDMA_EVENT_TRANSFER_DONE)
  84. {
  85. // Report a buffer ready.
  86. rt_uint8_t *pbuf_old = &psNuI2sDai->fifo[psNuI2sDai->fifo_block_idx * NU_I2S_DMA_BUF_BLOCK_SIZE] ;
  87. psNuI2sDai->fifo_block_idx = (psNuI2sDai->fifo_block_idx + 1) % NU_I2S_DMA_BUF_BLOCK_NUMBER;
  88. /* Report upper layer. */
  89. rt_audio_rx_done(&psNuI2s->audio, pbuf_old, NU_I2S_DMA_BUF_BLOCK_SIZE);
  90. }
  91. }
  92. static void nu_pdma_i2s_tx_cb(void *pvUserData, uint32_t u32EventFilter)
  93. {
  94. nu_i2s_t psNuI2s = (nu_i2s_t)pvUserData;
  95. nu_i2s_dai_t psNuI2sDai;
  96. RT_ASSERT(psNuI2s != RT_NULL);
  97. psNuI2sDai = &psNuI2s->i2s_dais[NU_I2S_DAI_PLAYBACK];
  98. if (u32EventFilter & NU_PDMA_EVENT_TRANSFER_DONE)
  99. {
  100. rt_audio_tx_complete(&psNuI2s->audio);
  101. psNuI2sDai->fifo_block_idx = (psNuI2sDai->fifo_block_idx + 1) % NU_I2S_DMA_BUF_BLOCK_NUMBER;
  102. }
  103. }
  104. static rt_err_t nu_i2s_pdma_sc_config(nu_i2s_t psNuI2s, E_NU_I2S_DAI dai)
  105. {
  106. rt_err_t result = RT_EOK;
  107. I2S_T *i2s_base;
  108. nu_i2s_dai_t psNuI2sDai;
  109. int i;
  110. uint32_t u32Src, u32Dst;
  111. nu_pdma_cb_handler_t pfm_pdma_cb;
  112. struct nu_pdma_chn_cb sChnCB;
  113. RT_ASSERT(psNuI2s != RT_NULL);
  114. /* Get base address of i2s register */
  115. i2s_base = psNuI2s->i2s_base;
  116. psNuI2sDai = &psNuI2s->i2s_dais[dai];
  117. switch ((int)dai)
  118. {
  119. case NU_I2S_DAI_PLAYBACK:
  120. pfm_pdma_cb = nu_pdma_i2s_tx_cb;
  121. u32Src = (uint32_t)&psNuI2sDai->fifo[0];
  122. u32Dst = (uint32_t)&i2s_base->TXFIFO;
  123. break;
  124. case NU_I2S_DAI_CAPTURE:
  125. pfm_pdma_cb = nu_pdma_i2s_rx_cb;
  126. u32Src = (uint32_t)&i2s_base->RXFIFO;
  127. u32Dst = (uint32_t)&psNuI2sDai->fifo[0];
  128. break;
  129. default:
  130. return -RT_EINVAL;
  131. }
  132. /* Register ISR callback function */
  133. sChnCB.m_eCBType = eCBType_Event;
  134. sChnCB.m_pfnCBHandler = pfm_pdma_cb;
  135. sChnCB.m_pvUserData = (void *)psNuI2s;
  136. nu_pdma_filtering_set(psNuI2sDai->pdma_chanid, NU_PDMA_EVENT_TRANSFER_DONE);
  137. result = nu_pdma_callback_register(psNuI2sDai->pdma_chanid, &sChnCB);
  138. RT_ASSERT(result == RT_EOK);
  139. for (i = 0; i < NU_I2S_DMA_BUF_BLOCK_NUMBER; i++)
  140. {
  141. /* Setup dma descriptor entry */
  142. result = nu_pdma_desc_setup(psNuI2sDai->pdma_chanid, // Channel ID
  143. psNuI2sDai->pdma_descs[i], // this descriptor
  144. 32, // 32-bits
  145. (dai == NU_I2S_DAI_PLAYBACK) ? u32Src + (i * NU_I2S_DMA_BUF_BLOCK_SIZE) : u32Src, //Memory or RXFIFO
  146. (dai == NU_I2S_DAI_PLAYBACK) ? u32Dst : u32Dst + (i * NU_I2S_DMA_BUF_BLOCK_SIZE), //TXFIFO or Memory
  147. (int32_t)NU_I2S_DMA_BUF_BLOCK_SIZE / 4, // Transfer count
  148. psNuI2sDai->pdma_descs[(i + 1) % NU_I2S_DMA_BUF_BLOCK_NUMBER], // Next descriptor
  149. 0); // Interrupt assert when every SG-table done.
  150. RT_ASSERT(result == RT_EOK);
  151. }
  152. /* Assign head descriptor */
  153. result = nu_pdma_sg_transfer(psNuI2sDai->pdma_chanid, psNuI2sDai->pdma_descs[0], 0);
  154. RT_ASSERT(result == RT_EOK);
  155. return result;
  156. }
  157. static rt_bool_t nu_i2s_capacity_check(struct rt_audio_configure *pconfig)
  158. {
  159. switch (pconfig->samplebits)
  160. {
  161. case 8:
  162. case 16:
  163. /* case 24: PDMA constrain */
  164. case 32:
  165. break;
  166. default:
  167. goto exit_nu_i2s_capacity_check;
  168. }
  169. switch (pconfig->channels)
  170. {
  171. case 1:
  172. case 2:
  173. break;
  174. default:
  175. goto exit_nu_i2s_capacity_check;
  176. }
  177. return RT_TRUE;
  178. exit_nu_i2s_capacity_check:
  179. return RT_FALSE;
  180. }
  181. static rt_err_t nu_i2s_dai_setup(nu_i2s_t psNuI2s, struct rt_audio_configure *pconfig)
  182. {
  183. rt_err_t result = RT_EOK;
  184. nu_acodec_ops_t pNuACodecOps = RT_NULL;
  185. RT_ASSERT(psNuI2s->AcodecOps != RT_NULL);
  186. pNuACodecOps = psNuI2s->AcodecOps;
  187. rt_uint32_t real_samplerate;
  188. /* Open I2S */
  189. if (nu_i2s_capacity_check(pconfig) == RT_TRUE)
  190. {
  191. /* Reset audio codec */
  192. if (pNuACodecOps->nu_acodec_reset)
  193. result = pNuACodecOps->nu_acodec_reset();
  194. if (result != RT_EOK)
  195. goto exit_nu_i2s_dai_setup;
  196. /* Setup audio codec */
  197. if (pNuACodecOps->nu_acodec_init)
  198. result = pNuACodecOps->nu_acodec_init();
  199. if (!pNuACodecOps->nu_acodec_init || result != RT_EOK)
  200. goto exit_nu_i2s_dai_setup;
  201. /* Setup acodec samplerate/samplebit/channel */
  202. if (pNuACodecOps->nu_acodec_dsp_control)
  203. result = pNuACodecOps->nu_acodec_dsp_control(pconfig);
  204. if (!pNuACodecOps->nu_acodec_dsp_control || result != RT_EOK)
  205. goto exit_nu_i2s_dai_setup;
  206. real_samplerate = I2S_Open(psNuI2s->i2s_base,
  207. (psNuI2s->AcodecOps->role == NU_ACODEC_ROLE_MASTER) ? I2S_MODE_SLAVE : I2S_MODE_MASTER,
  208. pconfig->samplerate,
  209. (((pconfig->samplebits / 8) - 1) << I2S_CTL0_DATWIDTH_Pos),
  210. (pconfig->channels == 1) ? I2S_ENABLE_MONO : I2S_DISABLE_MONO,
  211. I2S_FORMAT_I2S);
  212. LOG_I("Open I2S.");
  213. /* Open I2S0 interface and set to slave mode, stereo channel, I2S format */
  214. if (pconfig->samplerate != real_samplerate)
  215. {
  216. LOG_W("Real sample rate: %d Hz != preferred sample rate: %d Hz\n", real_samplerate, pconfig->samplerate);
  217. }
  218. /* Set MCLK and enable MCLK */
  219. /* The target MCLK is related to audio codec setting. */
  220. I2S_EnableMCLK(psNuI2s->i2s_base, 12000000);
  221. /* Set unmute */
  222. if (pNuACodecOps->nu_acodec_mixer_control)
  223. pNuACodecOps->nu_acodec_mixer_control(AUDIO_MIXER_MUTE, RT_FALSE);
  224. }
  225. else
  226. result = -RT_EINVAL;
  227. exit_nu_i2s_dai_setup:
  228. return result;
  229. }
  230. static rt_err_t nu_i2s_getcaps(struct rt_audio_device *audio, struct rt_audio_caps *caps)
  231. {
  232. rt_err_t result = RT_EOK;
  233. nu_i2s_t psNuI2s;
  234. nu_acodec_ops_t pNuACodecOps = RT_NULL;
  235. RT_ASSERT(audio != RT_NULL);
  236. RT_ASSERT(caps != RT_NULL);
  237. psNuI2s = (nu_i2s_t)audio;
  238. RT_ASSERT(psNuI2s->AcodecOps != RT_NULL);
  239. pNuACodecOps = psNuI2s->AcodecOps;
  240. switch (caps->main_type)
  241. {
  242. case AUDIO_TYPE_QUERY:
  243. switch (caps->sub_type)
  244. {
  245. case AUDIO_TYPE_QUERY:
  246. caps->udata.mask = AUDIO_TYPE_INPUT | AUDIO_TYPE_OUTPUT | AUDIO_TYPE_MIXER;
  247. break;
  248. default:
  249. result = -RT_ERROR;
  250. break;
  251. } // switch (caps->sub_type)
  252. break;
  253. case AUDIO_TYPE_MIXER:
  254. if (pNuACodecOps->nu_acodec_mixer_query)
  255. {
  256. switch (caps->sub_type)
  257. {
  258. case AUDIO_MIXER_QUERY:
  259. return pNuACodecOps->nu_acodec_mixer_query(AUDIO_MIXER_QUERY, &caps->udata.mask);
  260. default:
  261. return pNuACodecOps->nu_acodec_mixer_query(caps->sub_type, (rt_uint32_t *)&caps->udata.value);
  262. } // switch (caps->sub_type)
  263. } // if (pNuACodecOps->nu_acodec_mixer_query)
  264. result = -RT_ERROR;
  265. break;
  266. case AUDIO_TYPE_INPUT:
  267. case AUDIO_TYPE_OUTPUT:
  268. switch (caps->sub_type)
  269. {
  270. case AUDIO_DSP_PARAM:
  271. caps->udata.config.channels = psNuI2s->config.channels;
  272. caps->udata.config.samplebits = psNuI2s->config.samplebits;
  273. caps->udata.config.samplerate = psNuI2s->config.samplerate;
  274. break;
  275. case AUDIO_DSP_SAMPLERATE:
  276. caps->udata.config.samplerate = psNuI2s->config.samplerate;
  277. break;
  278. case AUDIO_DSP_CHANNELS:
  279. caps->udata.config.channels = psNuI2s->config.channels;
  280. break;
  281. case AUDIO_DSP_SAMPLEBITS:
  282. caps->udata.config.samplebits = psNuI2s->config.samplebits;
  283. break;
  284. default:
  285. result = -RT_ERROR;
  286. break;
  287. } // switch (caps->sub_type)
  288. break;
  289. default:
  290. result = -RT_ERROR;
  291. break;
  292. } // switch (caps->main_type)
  293. return result;
  294. }
  295. static rt_err_t nu_i2s_configure(struct rt_audio_device *audio, struct rt_audio_caps *caps)
  296. {
  297. rt_err_t result = RT_EOK;
  298. nu_i2s_t psNuI2s;
  299. nu_acodec_ops_t pNuACodecOps = RT_NULL;
  300. int stream = -1;
  301. RT_ASSERT(audio != RT_NULL);
  302. RT_ASSERT(caps != RT_NULL);
  303. psNuI2s = (nu_i2s_t)audio;
  304. RT_ASSERT(psNuI2s->AcodecOps != RT_NULL);
  305. pNuACodecOps = psNuI2s->AcodecOps;
  306. switch (caps->main_type)
  307. {
  308. case AUDIO_TYPE_MIXER:
  309. if (psNuI2s->AcodecOps->nu_acodec_mixer_control)
  310. psNuI2s->AcodecOps->nu_acodec_mixer_control(caps->sub_type, caps->udata.value);
  311. break;
  312. case AUDIO_TYPE_INPUT:
  313. stream = AUDIO_STREAM_RECORD;
  314. case AUDIO_TYPE_OUTPUT:
  315. {
  316. rt_bool_t bNeedReset = RT_FALSE;
  317. if (stream < 0)
  318. stream = AUDIO_STREAM_REPLAY;
  319. switch (caps->sub_type)
  320. {
  321. case AUDIO_DSP_PARAM:
  322. if (rt_memcmp(&psNuI2s->config, &caps->udata.config, sizeof(struct rt_audio_configure)) != 0)
  323. {
  324. rt_memcpy(&psNuI2s->config, &caps->udata.config, sizeof(struct rt_audio_configure));
  325. bNeedReset = RT_TRUE;
  326. }
  327. break;
  328. case AUDIO_DSP_SAMPLEBITS:
  329. if (psNuI2s->config.samplerate != caps->udata.config.samplebits)
  330. {
  331. psNuI2s->config.samplerate = caps->udata.config.samplebits;
  332. bNeedReset = RT_TRUE;
  333. }
  334. break;
  335. case AUDIO_DSP_CHANNELS:
  336. if (psNuI2s->config.channels != caps->udata.config.channels)
  337. {
  338. pNuACodecOps->config.channels = caps->udata.config.channels;
  339. bNeedReset = RT_TRUE;
  340. }
  341. break;
  342. case AUDIO_DSP_SAMPLERATE:
  343. if (psNuI2s->config.samplerate != caps->udata.config.samplerate)
  344. {
  345. psNuI2s->config.samplerate = caps->udata.config.samplerate;
  346. bNeedReset = RT_TRUE;
  347. }
  348. break;
  349. default:
  350. result = -RT_ERROR;
  351. break;
  352. } // switch (caps->sub_type)
  353. if (bNeedReset)
  354. {
  355. return nu_i2s_start(audio, stream);
  356. }
  357. }
  358. break;
  359. default:
  360. result = -RT_ERROR;
  361. break;
  362. } // switch (caps->main_type)
  363. return result;
  364. }
  365. static rt_err_t nu_i2s_init(struct rt_audio_device *audio)
  366. {
  367. rt_err_t result = RT_EOK;
  368. nu_i2s_t psNuI2s;
  369. RT_ASSERT(audio != RT_NULL);
  370. psNuI2s = (nu_i2s_t)audio;
  371. /* Reset this module */
  372. SYS_ResetModule(psNuI2s->i2s_rst);
  373. return -(result);
  374. }
  375. static rt_err_t nu_i2s_start(struct rt_audio_device *audio, int stream)
  376. {
  377. nu_i2s_t psNuI2s;
  378. RT_ASSERT(audio != RT_NULL);
  379. psNuI2s = (nu_i2s_t)audio;
  380. /* Restart all: I2S and codec. */
  381. nu_i2s_stop(audio, stream);
  382. if (nu_i2s_dai_setup(psNuI2s, &psNuI2s->config) != RT_EOK)
  383. return -RT_ERROR;
  384. switch (stream)
  385. {
  386. case AUDIO_STREAM_REPLAY:
  387. {
  388. nu_i2s_pdma_sc_config(psNuI2s, NU_I2S_DAI_PLAYBACK);
  389. /* Start TX DMA */
  390. I2S_ENABLE_TXDMA(psNuI2s->i2s_base);
  391. /* Enable I2S Tx function */
  392. I2S_ENABLE_TX(psNuI2s->i2s_base);
  393. LOG_I("Start replay.");
  394. }
  395. break;
  396. case AUDIO_STREAM_RECORD:
  397. {
  398. nu_i2s_pdma_sc_config(psNuI2s, NU_I2S_DAI_CAPTURE);
  399. /* Start RX DMA */
  400. I2S_ENABLE_RXDMA(psNuI2s->i2s_base);
  401. /* Enable I2S Rx function */
  402. I2S_ENABLE_RX(psNuI2s->i2s_base);
  403. LOG_I("Start record.");
  404. }
  405. break;
  406. default:
  407. return -RT_ERROR;
  408. }
  409. return RT_EOK;
  410. }
  411. static rt_err_t nu_i2s_stop(struct rt_audio_device *audio, int stream)
  412. {
  413. nu_i2s_t psNuI2s;
  414. nu_i2s_dai_t psNuI2sDai = RT_NULL;
  415. RT_ASSERT(audio != RT_NULL);
  416. psNuI2s = (nu_i2s_t)audio;
  417. switch (stream)
  418. {
  419. case AUDIO_STREAM_REPLAY:
  420. psNuI2sDai = &psNuI2s->i2s_dais[NU_I2S_DAI_PLAYBACK];
  421. // Disable TX
  422. I2S_DISABLE_TXDMA(psNuI2s->i2s_base);
  423. I2S_DISABLE_TX(psNuI2s->i2s_base);
  424. LOG_I("Stop replay.");
  425. break;
  426. case AUDIO_STREAM_RECORD:
  427. psNuI2sDai = &psNuI2s->i2s_dais[NU_I2S_DAI_CAPTURE];
  428. // Disable RX
  429. I2S_DISABLE_RXDMA(psNuI2s->i2s_base);
  430. I2S_DISABLE_RX(psNuI2s->i2s_base);
  431. LOG_I("Stop record.");
  432. break;
  433. default:
  434. return -RT_EINVAL;
  435. }
  436. /* Stop DMA transfer. */
  437. nu_pdma_channel_terminate(psNuI2sDai->pdma_chanid);
  438. /* Close I2S */
  439. if (!(psNuI2s->i2s_base->CTL0 & (I2S_CTL0_TXEN_Msk | I2S_CTL0_RXEN_Msk)))
  440. {
  441. I2S_DisableMCLK(psNuI2s->i2s_base);
  442. I2S_Close(psNuI2s->i2s_base);
  443. LOG_I("Close I2S.");
  444. }
  445. /* Silence */
  446. rt_memset((void *)psNuI2sDai->fifo, 0, NU_I2S_DMA_FIFO_SIZE);
  447. psNuI2sDai->fifo_block_idx = 0;
  448. return RT_EOK;
  449. }
  450. static void nu_i2s_buffer_info(struct rt_audio_device *audio, struct rt_audio_buf_info *info)
  451. {
  452. nu_i2s_t psNuI2s;
  453. RT_ASSERT(audio != RT_NULL);
  454. RT_ASSERT(info != RT_NULL);
  455. psNuI2s = (nu_i2s_t)audio;
  456. info->buffer = (rt_uint8_t *)psNuI2s->i2s_dais[NU_I2S_DAI_PLAYBACK].fifo ;
  457. info->total_size = NU_I2S_DMA_FIFO_SIZE;
  458. info->block_size = NU_I2S_DMA_BUF_BLOCK_SIZE;
  459. info->block_count = NU_I2S_DMA_BUF_BLOCK_NUMBER;
  460. //rt_kprintf("info->buffer=%08x\n", (uint32_t)info->buffer);
  461. //rt_kprintf("info->total_size=%d\n", (uint32_t)info->total_size);
  462. //rt_kprintf("info->block_size=%d\n", (uint32_t)info->block_size);
  463. //rt_kprintf("info->block_count=%d\n", (uint32_t)info->block_count);
  464. return;
  465. }
  466. static struct rt_audio_ops nu_i2s_audio_ops =
  467. {
  468. .getcaps = nu_i2s_getcaps,
  469. .configure = nu_i2s_configure,
  470. .init = nu_i2s_init,
  471. .start = nu_i2s_start,
  472. .stop = nu_i2s_stop,
  473. .transmit = RT_NULL,
  474. .buffer_info = nu_i2s_buffer_info
  475. };
  476. static rt_err_t nu_hw_i2s_pdma_allocate(nu_i2s_dai_t psNuI2sDai)
  477. {
  478. /* Allocate I2S nu_dma channel */
  479. if ((psNuI2sDai->pdma_chanid = nu_pdma_channel_allocate(psNuI2sDai->pdma_perp)) < 0)
  480. {
  481. goto nu_hw_i2s_pdma_allocate;
  482. }
  483. return RT_EOK;
  484. nu_hw_i2s_pdma_allocate:
  485. return -(RT_ERROR);
  486. }
  487. int rt_hw_i2s_init(void)
  488. {
  489. int i, j;
  490. nu_i2s_dai_t psNuI2sDai;
  491. for (j = (I2S_START + 1); j < I2S_CNT; j++)
  492. {
  493. for (i = 0; i < NU_I2S_DAI_CNT; i++)
  494. {
  495. uint8_t *pu8ptr = rt_malloc(NU_I2S_DMA_FIFO_SIZE);
  496. psNuI2sDai = &nu_i2s_arr[j].i2s_dais[i];
  497. psNuI2sDai->fifo = pu8ptr;
  498. rt_memset(pu8ptr, 0, NU_I2S_DMA_FIFO_SIZE);
  499. RT_ASSERT(psNuI2sDai->fifo != RT_NULL);
  500. rt_kprintf("psNuI2sDai->fifo=%08x\n", (uint32_t)psNuI2sDai->fifo);
  501. psNuI2sDai->pdma_chanid = -1;
  502. psNuI2sDai->fifo_block_idx = 0;
  503. RT_ASSERT(nu_hw_i2s_pdma_allocate(psNuI2sDai) == RT_EOK);
  504. RT_ASSERT(nu_pdma_sgtbls_allocate(&psNuI2sDai->pdma_descs[0], NU_I2S_DMA_BUF_BLOCK_NUMBER) == RT_EOK);
  505. }
  506. /* Register ops of audio device */
  507. nu_i2s_arr[j].audio.ops = &nu_i2s_audio_ops;
  508. /* Register device, RW: it is with replay and record functions. */
  509. rt_audio_register(&nu_i2s_arr[j].audio, nu_i2s_arr[j].name, RT_DEVICE_FLAG_RDWR, &nu_i2s_arr[j]);
  510. }
  511. return RT_EOK;
  512. }
  513. INIT_DEVICE_EXPORT(rt_hw_i2s_init);
  514. #endif //#if defined(BSP_USING_I2S)