driver_init.c 4.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185
  1. /*
  2. * Code generated from Atmel Start.
  3. *
  4. * This file will be overwritten when reconfiguring your Atmel Start project.
  5. * Please copy examples or other code you want to keep to a separate file
  6. * to avoid losing it when reconfiguring.
  7. */
  8. #include "driver_init.h"
  9. #include <peripheral_clk_config.h>
  10. #include <utils.h>
  11. #include <hal_init.h>
  12. #include <hpl_adc_base.h>
  13. /*! The buffer size for USART */
  14. #define TARGET_IO_BUFFER_SIZE 16
  15. struct usart_async_descriptor TARGET_IO;
  16. struct can_async_descriptor CAN_0;
  17. static uint8_t TARGET_IO_buffer[TARGET_IO_BUFFER_SIZE];
  18. struct adc_sync_descriptor ADC_0;
  19. struct flash_descriptor FLASH_0;
  20. struct i2c_m_sync_desc I2C_0;
  21. void ADC_0_PORT_init(void)
  22. {
  23. // Disable digital pin circuitry
  24. gpio_set_pin_direction(PA10, GPIO_DIRECTION_OFF);
  25. gpio_set_pin_function(PA10, PINMUX_PA10B_ADC0_AIN10);
  26. }
  27. void ADC_0_CLOCK_init(void)
  28. {
  29. hri_mclk_set_APBCMASK_ADC0_bit(MCLK);
  30. hri_gclk_write_PCHCTRL_reg(GCLK, ADC0_GCLK_ID, CONF_GCLK_ADC0_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
  31. }
  32. void ADC_0_init(void)
  33. {
  34. ADC_0_CLOCK_init();
  35. ADC_0_PORT_init();
  36. adc_sync_init(&ADC_0, ADC0, _adc_get_adc_sync());
  37. }
  38. void FLASH_0_CLOCK_init(void)
  39. {
  40. hri_mclk_set_AHBMASK_NVMCTRL_bit(MCLK);
  41. }
  42. void FLASH_0_init(void)
  43. {
  44. FLASH_0_CLOCK_init();
  45. flash_init(&FLASH_0, NVMCTRL);
  46. }
  47. void I2C_0_PORT_init(void)
  48. {
  49. gpio_set_pin_pull_mode(PA08,
  50. // <y> Pull configuration
  51. // <id> pad_pull_config
  52. // <GPIO_PULL_OFF"> Off
  53. // <GPIO_PULL_UP"> Pull-up
  54. // <GPIO_PULL_DOWN"> Pull-down
  55. GPIO_PULL_OFF);
  56. gpio_set_pin_function(PA08, PINMUX_PA08C_SERCOM0_PAD0);
  57. gpio_set_pin_pull_mode(PA09,
  58. // <y> Pull configuration
  59. // <id> pad_pull_config
  60. // <GPIO_PULL_OFF"> Off
  61. // <GPIO_PULL_UP"> Pull-up
  62. // <GPIO_PULL_DOWN"> Pull-down
  63. GPIO_PULL_OFF);
  64. gpio_set_pin_function(PA09, PINMUX_PA09C_SERCOM0_PAD1);
  65. }
  66. void I2C_0_CLOCK_init(void)
  67. {
  68. hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM0_GCLK_ID_CORE, CONF_GCLK_SERCOM0_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
  69. hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM0_GCLK_ID_SLOW, CONF_GCLK_SERCOM0_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
  70. hri_mclk_set_APBCMASK_SERCOM0_bit(MCLK);
  71. }
  72. void I2C_0_init(void)
  73. {
  74. I2C_0_CLOCK_init();
  75. i2c_m_sync_init(&I2C_0, SERCOM0);
  76. I2C_0_PORT_init();
  77. }
  78. /**
  79. * \brief USART Clock initialization function
  80. *
  81. * Enables register interface and peripheral clock
  82. */
  83. void TARGET_IO_CLOCK_init()
  84. {
  85. hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM4_GCLK_ID_CORE, CONF_GCLK_SERCOM4_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
  86. hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM4_GCLK_ID_SLOW, CONF_GCLK_SERCOM4_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
  87. hri_mclk_set_APBCMASK_SERCOM4_bit(MCLK);
  88. }
  89. /**
  90. * \brief USART pinmux initialization function
  91. *
  92. * Set each required pin to USART functionality
  93. */
  94. void TARGET_IO_PORT_init()
  95. {
  96. gpio_set_pin_function(PB10, PINMUX_PB10D_SERCOM4_PAD2);
  97. gpio_set_pin_function(PB11, PINMUX_PB11D_SERCOM4_PAD3);
  98. }
  99. /**
  100. * \brief USART initialization function
  101. *
  102. * Enables USART peripheral, clocks and initializes USART driver
  103. */
  104. void TARGET_IO_init(void)
  105. {
  106. TARGET_IO_CLOCK_init();
  107. usart_async_init(&TARGET_IO, SERCOM4, TARGET_IO_buffer, TARGET_IO_BUFFER_SIZE, (void *)NULL);
  108. TARGET_IO_PORT_init();
  109. }
  110. void CAN_0_PORT_init(void)
  111. {
  112. gpio_set_pin_function(PA25, PINMUX_PA25G_CAN0_RX);
  113. gpio_set_pin_function(PA24, PINMUX_PA24G_CAN0_TX);
  114. }
  115. /**
  116. * \brief CAN initialization function
  117. *
  118. * Enables CAN peripheral, clocks and initializes CAN driver
  119. */
  120. void CAN_0_init(void)
  121. {
  122. hri_mclk_set_AHBMASK_CAN0_bit(MCLK);
  123. hri_gclk_write_PCHCTRL_reg(GCLK, CAN0_GCLK_ID, CONF_GCLK_CAN0_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
  124. can_async_init(&CAN_0, CAN0);
  125. CAN_0_PORT_init();
  126. }
  127. void system_init(void)
  128. {
  129. init_mcu();
  130. // GPIO on PA15
  131. gpio_set_pin_level(LED0,
  132. // <y> Initial level
  133. // <id> pad_initial_level
  134. // <false"> Low
  135. // <true"> High
  136. false);
  137. // Set pin direction to output
  138. gpio_set_pin_direction(LED0, GPIO_DIRECTION_OUT);
  139. gpio_set_pin_function(LED0, GPIO_PIN_FUNCTION_OFF);
  140. ADC_0_init();
  141. FLASH_0_init();
  142. I2C_0_init();
  143. TARGET_IO_init();
  144. CAN_0_init();
  145. }