drv_uart.c 7.3 KB

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  1. /*
  2. * File : drv_uart.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2008 - 2016, RT-Thread Development Team
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. *
  20. * Change Logs:
  21. * Date Author Notes
  22. * 2015-11-19 Urey the first version
  23. */
  24. #include <rthw.h>
  25. #include <rtthread.h>
  26. #include <rtdevice.h>
  27. #include "board.h"
  28. #include "drv_uart.h"
  29. struct jz_uart_s
  30. {
  31. rt_uint32_t hw_base;
  32. rt_uint32_t irqno;
  33. char name[RT_NAME_MAX];
  34. };
  35. static rt_err_t uart_configure (struct rt_serial_device *serial, struct serial_configure *cfg);
  36. static rt_err_t uart_control (struct rt_serial_device *serial, int cmd, void *arg);
  37. static int uart_putc (struct rt_serial_device *serial, char c);
  38. static int uart_getc (struct rt_serial_device *serial);
  39. static rt_size_t uart_dma_transmit (struct rt_serial_device *serial, const rt_uint8_t *buf, rt_size_t size, int direction);
  40. static void uart_irq_handler (int irqno, void *param);
  41. const struct rt_uart_ops _uart_ops =
  42. {
  43. uart_configure,
  44. uart_control,
  45. uart_putc,
  46. uart_getc,
  47. uart_dma_transmit
  48. };
  49. /*
  50. * UART Initiation
  51. */
  52. void rt_hw_uart_init(void)
  53. {
  54. struct rt_serial_device *serial;
  55. struct jz_uart_s *uart;
  56. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  57. #ifdef RT_USING_UART1
  58. {
  59. static struct rt_serial_device serial1;
  60. static struct jz_uart_s uart1;
  61. serial = &serial1;
  62. uart = &uart1;
  63. serial->ops = &_uart_ops;
  64. serial->config = config;
  65. serial->config.baud_rate = 115200;
  66. uart->hw_base = UART0_BASE;
  67. uart->irqno = IRQ_UART0;
  68. rt_hw_serial_register(serial,
  69. "uart1",
  70. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  71. uart);
  72. }
  73. #endif
  74. #ifdef RT_USING_UART2
  75. {
  76. static struct rt_serial_device serial2;
  77. static struct jz_uart_s uart2;
  78. serial = &serial2;
  79. uart = &uart2;
  80. serial->ops = &_uart_ops;
  81. serial->config = config;
  82. serial->config.baud_rate = 115200;
  83. uart->hw_base = UART2_BASE;
  84. uart->irqno = IRQ_UART2;
  85. rt_hw_serial_register(serial,
  86. "uart2",
  87. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  88. uart);
  89. }
  90. #endif
  91. #ifdef RT_USING_UART3
  92. {
  93. static struct rt_serial_device serial3;
  94. static struct jz_uart_s uart3;
  95. serial = &serial3;
  96. uart = &uart3;
  97. serial->ops = &_uart_ops;
  98. serial->config = config;
  99. serial->config.baud_rate = 115200;
  100. uart->hw_base = UART3_BASE;
  101. uart->irqno = IRQ_UART3;
  102. rt_hw_serial_register(serial,
  103. "uart3",
  104. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  105. uart);
  106. }
  107. #endif
  108. }
  109. /*
  110. * UART interface
  111. */
  112. static rt_err_t uart_configure (struct rt_serial_device *serial, struct serial_configure *cfg)
  113. {
  114. rt_uint32_t baud_div;
  115. struct jz_uart_s * uart;
  116. RT_ASSERT(serial != RT_NULL);
  117. serial->config = *cfg;
  118. uart = serial->parent.user_data;
  119. RT_ASSERT(uart != RT_NULL);
  120. /* Init UART Hardware */
  121. UART_IER(uart->hw_base) = 0; /* clear interrupt */
  122. UART_FCR(uart->hw_base) = ~UARTFCR_UUE; /* disable UART unite */
  123. /* Enable UART clock */
  124. /* Set both receiver and transmitter in UART mode (not SIR) */
  125. UART_SIRCR(uart->hw_base) = ~(SIRCR_RSIRE | SIRCR_TSIRE);
  126. /* Set databits, stopbits and parity. (8-bit data, 1 stopbit, no parity) */
  127. UART_LCR(uart->hw_base) = UARTLCR_WLEN_8;
  128. /* set baudrate */
  129. #if defined(RT_USING_JZ4750) || defined(RT_USING_JZ4755) || defined(RT_USING_JZ4760)
  130. if(REG_CPM_CPCCR & (1UL << 30))
  131. {
  132. /* CPCCR.ECS = 1: clock source is EXCLK/2 */
  133. baud_div = BOARD_EXTAL_CLK / 2 / 16 / cfg->baud_rate;
  134. }
  135. else
  136. #endif
  137. {
  138. /* CPCCR.ECS = 0: clock source is EXCLK */
  139. baud_div = BOARD_EXTAL_CLK / 16 / cfg->baud_rate;
  140. }
  141. UART_LCR(uart->hw_base) |= UARTLCR_DLAB;
  142. UART_DLHR(uart->hw_base) = (baud_div >> 8) & 0xff;
  143. UART_DLLR(uart->hw_base) = baud_div & 0xff;
  144. UART_LCR(uart->hw_base) &= ~UARTLCR_DLAB;
  145. /* Enable UART unit, enable and clear FIFO */
  146. UART_FCR(uart->hw_base) = UARTFCR_UUE | UARTFCR_FE | UARTFCR_TFLS | UARTFCR_RFLS;
  147. return (RT_EOK);
  148. }
  149. static rt_err_t uart_control (struct rt_serial_device *serial, int cmd, void *arg)
  150. {
  151. struct jz_uart_s * uart;
  152. uart = serial->parent.user_data;
  153. RT_ASSERT(uart != RT_NULL);
  154. switch (cmd)
  155. {
  156. case RT_DEVICE_CTRL_CLR_INT:
  157. /* Disable the UART Interrupt */
  158. UART_IER(uart->hw_base) &= ~(UARTIER_RIE | UARTIER_RTIE);
  159. rt_hw_interrupt_mask(uart->irqno);
  160. break;
  161. case RT_DEVICE_CTRL_SET_INT:
  162. /* install interrupt */
  163. rt_hw_interrupt_install(uart->irqno, uart_irq_handler,
  164. serial, uart->name);
  165. rt_hw_interrupt_umask(uart->irqno);
  166. /* Enable the UART Interrupt */
  167. UART_IER(uart->hw_base) |= (UARTIER_RIE | UARTIER_RTIE);
  168. break;
  169. }
  170. return (RT_EOK);
  171. }
  172. static int uart_putc (struct rt_serial_device *serial, char c)
  173. {
  174. struct jz_uart_s* uart;
  175. uart = serial->parent.user_data;
  176. /* FIFO status, contain valid data */
  177. while (!((UART_LSR(uart->hw_base) & (UARTLSR_TDRQ | UARTLSR_TEMT)) == 0x60));
  178. /* write data */
  179. UART_TDR(uart->hw_base) = c;
  180. return (1);
  181. }
  182. static int uart_getc (struct rt_serial_device *serial)
  183. {
  184. struct jz_uart_s* uart = serial->parent.user_data;
  185. /* Receive Data Available */
  186. if (UART_LSR(uart->hw_base) & UARTLSR_DR)
  187. {
  188. return UART_RDR(uart->hw_base);
  189. }
  190. return (-1);
  191. }
  192. static rt_size_t uart_dma_transmit (struct rt_serial_device *serial, const rt_uint8_t *buf, rt_size_t size, int direction)
  193. {
  194. return (0);
  195. }
  196. /* UART ISR */
  197. static void uart_irq_handler(int irqno, void *param)
  198. {
  199. rt_ubase_t isr;
  200. struct rt_serial_device *serial = (struct rt_serial_device*)param;
  201. struct jz_uart_s* uart = serial->parent.user_data;
  202. /* read interrupt status and clear it */
  203. isr = UART_ISR(uart->hw_base);
  204. if (isr & UARTISR_IID_RDI) /* Receive Data Available */
  205. {
  206. rt_hw_serial_isr(serial,RT_SERIAL_EVENT_RX_IND);
  207. }
  208. if(isr & UARTISR_IID_THRI)
  209. {
  210. rt_hw_serial_isr(serial,RT_SERIAL_EVENT_TX_DONE);
  211. }
  212. }