drv_wdt.c 3.4 KB

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  1. /*
  2. * Copyright (c) 2006-2019, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2019-07-29 zdzn first version
  9. */
  10. #include "drv_wdt.h"
  11. #ifdef BSP_USING_WDT
  12. #define PM_RSTC 0x1c
  13. #define PM_RSTS 0x20
  14. #define PM_WDOG 0x24
  15. #define PM_PASSWORD 0x5a000000
  16. #define PM_WDOG_TIME_SET 0x000fffff
  17. #define PM_RSTC_WRCFG_CLR 0xffffffcf
  18. #define PM_RSTS_HADWRH_SET 0x00000040
  19. #define PM_RSTC_WRCFG_SET 0x00000030
  20. #define PM_RSTC_WRCFG_FULL_RESET 0x00000020
  21. #define PM_RSTC_RESET 0x00000102
  22. #define PM_RSTS_PARTITION_CLR 0xfffffaaa
  23. #define SECS_TO_WDOG_TICKS(x) ((x) << 16)
  24. #define WDOG_TICKS_TO_SECS(x) ((x) >> 16)
  25. static struct raspi_wdt_driver bcm_wdt =
  26. {
  27. .base = PER_BASE,
  28. };
  29. void raspi_watchdog_init(rt_uint32_t time_init)
  30. {
  31. bcm_wdt.timeout = time_init;
  32. }
  33. void raspi_watchdog_start()
  34. {
  35. volatile rt_uint32_t cur;
  36. bcm283x_peri_write(bcm_wdt.base + PM_WDOG, PM_PASSWORD
  37. | (SECS_TO_WDOG_TICKS(bcm_wdt.timeout) & PM_WDOG_TIME_SET));
  38. bcm283x_peri_write(bcm_wdt.base + PM_WDOG, PM_PASSWORD
  39. | (SECS_TO_WDOG_TICKS(bcm_wdt.timeout) & PM_WDOG_TIME_SET));
  40. cur = bcm283x_peri_read(bcm_wdt.base + PM_RSTC);
  41. bcm283x_peri_write(bcm_wdt.base + PM_RSTC, PM_PASSWORD
  42. | (cur & PM_RSTC_WRCFG_CLR) | PM_RSTC_WRCFG_FULL_RESET);
  43. }
  44. void raspi_watchdog_stop()
  45. {
  46. bcm283x_peri_write(bcm_wdt.base + PM_RSTC, PM_PASSWORD | PM_RSTC_RESET);
  47. }
  48. void raspi_watchdog_clr()
  49. {
  50. bcm_wdt.timeout = 0;
  51. }
  52. void raspi_watchdog_set_timeout( rt_uint32_t timeout_us)
  53. {
  54. bcm_wdt.timeout = timeout_us;
  55. }
  56. rt_uint64_t raspi_watchdog_get_timeout()
  57. {
  58. return bcm_wdt.timeout;
  59. }
  60. rt_uint64_t raspi_watchdog_get_timeleft()
  61. {
  62. rt_uint32_t ret = bcm283x_peri_read(bcm_wdt.base + PM_WDOG);
  63. return WDOG_TICKS_TO_SECS(ret & PM_WDOG_TIME_SET);
  64. }
  65. static rt_err_t raspi_wdg_init(rt_watchdog_t *wdt)
  66. {
  67. /*init for 10S*/
  68. raspi_watchdog_init(1000000);
  69. raspi_watchdog_start();
  70. raspi_watchdog_stop();
  71. return RT_EOK;
  72. }
  73. static rt_err_t raspi_wdg_control(rt_watchdog_t *wdt, int cmd, void *arg)
  74. {
  75. rt_uint64_t timeout_us = 0;
  76. switch (cmd)
  77. {
  78. case RT_DEVICE_CTRL_WDT_SET_TIMEOUT:
  79. timeout_us = *((rt_uint32_t *)arg) * 1000000;
  80. if (timeout_us >= 0xFFFFFFFF)
  81. timeout_us = 0xFFFFFFFF;
  82. raspi_watchdog_set_timeout((rt_uint32_t)timeout_us);
  83. break;
  84. case RT_DEVICE_CTRL_WDT_GET_TIMEOUT:
  85. timeout_us = raspi_watchdog_get_timeout();
  86. *((rt_uint32_t *)arg) = timeout_us / 1000000;
  87. break;
  88. case RT_DEVICE_CTRL_WDT_GET_TIMELEFT:
  89. timeout_us = raspi_watchdog_get_timeleft();
  90. *((rt_uint32_t *)arg) = timeout_us / 1000000;
  91. break;
  92. case RT_DEVICE_CTRL_WDT_KEEPALIVE:
  93. raspi_watchdog_clr();
  94. break;
  95. case RT_DEVICE_CTRL_WDT_START:
  96. raspi_watchdog_start();
  97. break;
  98. case RT_DEVICE_CTRL_WDT_STOP:
  99. raspi_watchdog_stop();
  100. break;
  101. default:
  102. return RT_EIO;
  103. }
  104. return RT_EOK;
  105. }
  106. static const struct rt_watchdog_ops raspi_wdg_pos =
  107. {
  108. raspi_wdg_init,
  109. raspi_wdg_control,
  110. };
  111. static rt_watchdog_t raspi_wdg;
  112. int rt_hw_wdt_init(void)
  113. {
  114. raspi_wdg.ops = &raspi_wdg_pos;
  115. rt_hw_watchdog_register(&raspi_wdg, "wdg", 0, RT_NULL);
  116. return RT_EOK;
  117. }
  118. INIT_DEVICE_EXPORT(rt_hw_wdt_init);
  119. #endif /*BSP_USING_WDT */