HAL_iwdg.c 4.3 KB

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  1. /**
  2. ******************************************************************************
  3. * @file HAL_iwdg.c
  4. * @author IC Applications Department
  5. * @version V0.8
  6. * @date 2019_08_02
  7. * @brief This file provides all the IWDG firmware functions.
  8. ******************************************************************************
  9. * @copy
  10. *
  11. * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  12. * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  13. * TIME. AS A RESULT, HOLOCENE SHALL NOT BE HELD LIABLE FOR ANY
  14. * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  15. * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  16. * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  17. *
  18. * <h2><center>&copy; COPYRIGHT 2016 HOLOCENE</center></h2>
  19. */
  20. /* Includes ------------------------------------------------------------------*/
  21. #include "HAL_iwdg.h"
  22. //IWDG_BASE 未定义
  23. #ifdef 0
  24. /** @addtogroup StdPeriph_Driver
  25. * @{
  26. */
  27. /** @defgroup IWDG
  28. * @brief IWDG driver modules
  29. * @{
  30. */
  31. /** @defgroup IWDG_Private_TypesDefinitions
  32. * @{
  33. */
  34. /**
  35. * @}
  36. */
  37. /** @defgroup IWDG_Private_Defines
  38. * @{
  39. */
  40. /* ---------------------- IWDG registers bit mask ----------------------------*/
  41. /* KR register bit mask */
  42. #define KR_KEY_Reload ((uint16_t)0xAAAA)
  43. #define KR_KEY_Enable ((uint16_t)0xCCCC)
  44. /**
  45. * @}
  46. */
  47. /** @defgroup IWDG_Private_Macros
  48. * @{
  49. */
  50. /**
  51. * @}
  52. */
  53. /** @defgroup IWDG_Private_Variables
  54. * @{
  55. */
  56. /**
  57. * @}
  58. */
  59. /** @defgroup IWDG_Private_FunctionPrototypes
  60. * @{
  61. */
  62. /**
  63. * @}
  64. */
  65. /** @defgroup IWDG_Private_Functions
  66. * @{
  67. */
  68. /**
  69. * @brief Enables or disables write access to IWDG_PR and IWDG_RLR
  70. * registers.
  71. * @param IWDG_WriteAccess: new state of write access to IWDG_PR and
  72. * IWDG_RLR registers.
  73. * This parameter can be one of the following values:
  74. * @arg IWDG_WriteAccess_Enable: Enable write access to
  75. * IWDG_PR and IWDG_RLR registers
  76. * @arg IWDG_WriteAccess_Disable: Disable write access to
  77. * IWDG_PR and IWDG_RLR registers
  78. * @retval : None
  79. */
  80. void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
  81. {
  82. /* Check the parameters */
  83. assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
  84. IWDG->KR = IWDG_WriteAccess;
  85. }
  86. /**
  87. * @brief Sets IWDG Prescaler value.
  88. * @param IWDG_Prescaler: specifies the IWDG Prescaler value.
  89. * This parameter can be one of the following values:
  90. * @arg IWDG_Prescaler_4: IWDG prescaler set to 4
  91. * @arg IWDG_Prescaler_8: IWDG prescaler set to 8
  92. * @arg IWDG_Prescaler_16: IWDG prescaler set to 16
  93. * @arg IWDG_Prescaler_32: IWDG prescaler set to 32
  94. * @arg IWDG_Prescaler_64: IWDG prescaler set to 64
  95. * @arg IWDG_Prescaler_128: IWDG prescaler set to 128
  96. * @arg IWDG_Prescaler_256: IWDG prescaler set to 256
  97. * @retval : None
  98. */
  99. void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
  100. {
  101. /* Check the parameters */
  102. assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
  103. IWDG->PR = IWDG_Prescaler;
  104. }
  105. /**
  106. * @brief Sets IWDG Reload value.
  107. * @param Reload: specifies the IWDG Reload value.
  108. * This parameter must be a number between 0 and 0x0FFF.
  109. * @retval : None
  110. */
  111. void IWDG_SetReload(uint16_t Reload)
  112. {
  113. /* Check the parameters */
  114. assert_param(IS_IWDG_RELOAD(Reload));
  115. IWDG->RLR = Reload;
  116. }
  117. /**
  118. * @brief Reloads IWDG counter with value defined in the reload register
  119. * (write access to IWDG_PR and IWDG_RLR registers disabled).
  120. * @param None
  121. * @retval : None
  122. */
  123. void IWDG_ReloadCounter(void)
  124. {
  125. IWDG->KR = KR_KEY_Reload;
  126. }
  127. /**
  128. * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers
  129. * disabled).
  130. * @param None
  131. * @retval : None
  132. */
  133. void IWDG_Enable(void)
  134. {
  135. IWDG->KR = KR_KEY_Enable;
  136. }
  137. /**
  138. * @brief Checks whether the specified IWDG flag is set or not.
  139. * @param IWDG_FLAG: specifies the flag to check.
  140. * This parameter can be one of the following values:
  141. * @arg IWDG_FLAG_PVU: Prescaler Value Update on going
  142. * @arg IWDG_FLAG_RVU: Reload Value Update on going
  143. * @retval : The new state of IWDG_FLAG (SET or RESET).
  144. */
  145. FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
  146. {
  147. FlagStatus bitstatus = RESET;
  148. /* Check the parameters */
  149. assert_param(IS_IWDG_FLAG(IWDG_FLAG));
  150. if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)
  151. {
  152. bitstatus = SET;
  153. }
  154. else
  155. {
  156. bitstatus = RESET;
  157. }
  158. /* Return the flag status */
  159. return bitstatus;
  160. }
  161. /**
  162. * @}
  163. */
  164. /**
  165. * @}
  166. */
  167. /**
  168. * @}
  169. */
  170. #endif // 0
  171. /*-------------------------(C) COPYRIGHT 2016 HOLOCENE ----------------------*/