drv_gpio.c 6.0 KB

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  1. /* SPDX-License-Identifier: Apache-2.0 */
  2. /* Copyright (c) 2006-2018, RT-Thread Development Team
  3. * Copyright (c) 2020, duhuanpeng<548708880@qq.com>
  4. *
  5. * Change Logs:
  6. * Date Author Notes
  7. * 2015-01-20 Bernard the first version
  8. * 2017-10-20 ZYH add mode open drain and input pull down
  9. * 2020-06-01 Du Huanpeng GPIO driver based on <components/drivers/include/drivers/pin.h>
  10. */
  11. #include <rtthread.h>
  12. #include <drivers/pin.h>
  13. #include <ls2k1000.h>
  14. #include "drv_gpio.h"
  15. #ifdef RT_USING_PIN
  16. #define GPIO_IRQ_NUM (64)
  17. static struct gpio_irq_def _g_gpio_irq_tbl[GPIO_IRQ_NUM];
  18. static void loongson_pin_mode(struct rt_device *device, rt_base_t pin, rt_base_t mode)
  19. {
  20. struct loongson_gpio *gpio;
  21. rt_uint64_t m;
  22. gpio = (void *)device->user_data;
  23. m = (rt_uint64_t)1 << pin;
  24. switch (mode) {
  25. case PIN_MODE_OUTPUT:
  26. gpio->GPIO0_OEN &= ~m;
  27. break;
  28. case PIN_MODE_INPUT:
  29. gpio->GPIO0_OEN |= m;
  30. break;
  31. case PIN_MODE_INPUT_PULLUP:
  32. gpio->GPIO0_OEN |= m;
  33. break;
  34. case PIN_MODE_INPUT_PULLDOWN:
  35. gpio->GPIO0_OEN |= m;
  36. break;
  37. case PIN_MODE_OUTPUT_OD:
  38. gpio->GPIO0_OEN &= ~m;
  39. break;
  40. default:
  41. /* error */
  42. rt_kprintf("error\n");
  43. }
  44. }
  45. static void loongson_pin_write(struct rt_device *device, rt_base_t pin, rt_base_t value)
  46. {
  47. struct loongson_gpio *gpio;
  48. rt_uint64_t m;
  49. if (pin < 0 || pin >= 60) {
  50. rt_kprintf("error\n");
  51. return;
  52. }
  53. gpio = (void *)device->user_data;
  54. m = (rt_uint64_t)1 << pin;
  55. if (value)
  56. gpio->GPIO0_O |= m;
  57. else
  58. gpio->GPIO0_O &= ~m;
  59. }
  60. static int loongson_pin_read(struct rt_device *device, rt_base_t pin)
  61. {
  62. struct loongson_gpio *gpio;
  63. int rc;
  64. gpio = (void *)device->user_data;
  65. rt_uint64_t m;
  66. m = gpio->GPIO0_I;
  67. m &= (rt_uint64_t)1 << pin;
  68. rc = !!m;
  69. return rc;
  70. }
  71. /* TODO: add GPIO interrupt */
  72. static rt_err_t loongson_pin_attach_irq(struct rt_device *device, rt_int32_t pin, rt_uint32_t mode, void (*hdr)(void *args), void *args)
  73. {
  74. rt_uint8_t index;
  75. rt_uint64_t m;
  76. struct loongson_gpio *gpio;
  77. gpio = (void *)device->user_data;
  78. if(pin < 4)
  79. {
  80. index = pin;
  81. }
  82. else if(pin < 32)
  83. {
  84. index = 5;
  85. }
  86. else
  87. {
  88. index = 6;
  89. }
  90. _g_gpio_irq_tbl[index].irq_cb[pin] = hdr;
  91. _g_gpio_irq_tbl[index].irq_arg[pin] = args;
  92. _g_gpio_irq_tbl[index].irq_type[pin] = mode;
  93. liointc_set_irq_mode(index, mode);
  94. m = (rt_uint64_t)1 << pin;
  95. gpio->GPIO0_INTEN |= m;
  96. return RT_EOK;
  97. }
  98. static rt_err_t loongson_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
  99. {
  100. struct loongson_gpio *gpio;
  101. gpio = (void *)device->user_data;
  102. rt_uint8_t index;
  103. if(pin < 4)
  104. {
  105. index = pin;
  106. }
  107. else if(pin < 32)
  108. {
  109. index = 5;
  110. }
  111. else
  112. {
  113. index = 6;
  114. }
  115. _g_gpio_irq_tbl[index].irq_cb[pin] = RT_NULL;
  116. _g_gpio_irq_tbl[index].irq_arg[pin] = RT_NULL;
  117. _g_gpio_irq_tbl[index].irq_type[pin] = RT_NULL;
  118. _g_gpio_irq_tbl[index].state[pin] = RT_NULL;
  119. return RT_EOK;
  120. }
  121. static rt_err_t loongson_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled)
  122. {
  123. struct loongson_gpio *gpio;
  124. gpio = (void *)device->user_data;
  125. rt_uint8_t index;
  126. if(pin < 4)
  127. {
  128. index = pin;
  129. }
  130. else if(pin < 32)
  131. {
  132. index = 5;
  133. }
  134. else
  135. {
  136. index = 6;
  137. }
  138. if (enabled)
  139. _g_gpio_irq_tbl[index].state[pin] = 1;
  140. else
  141. _g_gpio_irq_tbl[index].state[pin] = 0;
  142. return RT_EOK;
  143. }
  144. static void gpio_irq_handler(int irq, void *param)
  145. {
  146. struct gpio_irq_def *irq_def = (struct gpio_irq_def *)param;
  147. rt_uint32_t pin;
  148. rt_uint32_t value;
  149. rt_uint32_t tmpvalue;
  150. if(irq == LS2K_GPIO0_INT_IRQ)
  151. {
  152. pin = 0;
  153. }
  154. else if(irq == LS2K_GPIO1_INT_IRQ)
  155. {
  156. pin = 1;
  157. }
  158. else if(irq == LS2K_GPIO2_INT_IRQ)
  159. {
  160. pin = 2;
  161. }
  162. else if(irq == LS2K_GPIO3_INT_IRQ)
  163. {
  164. pin = 3;
  165. }
  166. else if(irq == LS2K_GPIO_INTLO_IRQ)
  167. {
  168. pin = 4;
  169. }
  170. else
  171. {
  172. pin = 32;
  173. }
  174. while (value)
  175. {
  176. if ((value & 0x1) && (irq_def->irq_cb[pin] != RT_NULL))
  177. {
  178. if(irq_def->state[pin])
  179. {
  180. irq_def->irq_cb[pin](irq_def->irq_arg[pin]);
  181. }
  182. }
  183. pin++;
  184. value = value >> 1;
  185. }
  186. }
  187. static struct rt_pin_ops loongson_pin_ops = {
  188. .pin_mode = loongson_pin_mode,
  189. .pin_write = loongson_pin_write,
  190. .pin_read = loongson_pin_read,
  191. /* TODO: add GPIO interrupt */
  192. .pin_attach_irq = loongson_pin_attach_irq,
  193. .pin_detach_irq = loongson_pin_detach_irq,
  194. .pin_irq_enable = loongson_pin_irq_enable,
  195. };
  196. int loongson_pin_init(void)
  197. {
  198. int rc;
  199. static struct loongson_gpio *loongson_gpio_priv;
  200. loongson_gpio_priv = (void *)GPIO_BASE;
  201. rc = rt_device_pin_register("pin", &loongson_pin_ops, loongson_gpio_priv);
  202. //gpio0
  203. rt_hw_interrupt_install(LS2K_GPIO0_INT_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[0], "gpio0_irq");
  204. rt_hw_interrupt_umask(LS2K_GPIO0_INT_IRQ);
  205. //gpio1
  206. rt_hw_interrupt_install(LS2K_GPIO1_INT_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[1], "gpio1_irq");
  207. rt_hw_interrupt_umask(LS2K_GPIO1_INT_IRQ);
  208. //gpio2
  209. rt_hw_interrupt_install(LS2K_GPIO2_INT_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[2], "gpio2_irq");
  210. rt_hw_interrupt_umask(LS2K_GPIO2_INT_IRQ);
  211. //gpio3
  212. rt_hw_interrupt_install(LS2K_GPIO3_INT_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[3], "gpio3_irq");
  213. rt_hw_interrupt_umask(LS2K_GPIO3_INT_IRQ);
  214. //gpio4~gpio31
  215. rt_hw_interrupt_install(LS2K_GPIO_INTLO_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[4], "gpio4_irq");
  216. rt_hw_interrupt_umask(LS2K_GPIO_INTLO_IRQ);
  217. //gpio32~gpio63
  218. rt_hw_interrupt_install(LS2K_GPIO_INTHI_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[5], "gpio5_irq");
  219. rt_hw_interrupt_umask(LS2K_GPIO_INTHI_IRQ);
  220. return rc;
  221. }
  222. INIT_BOARD_EXPORT(loongson_pin_init);
  223. #endif /*RT_USING_PIN */