sdd.c 82 KB

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  1. /*****************************************************************************
  2. *
  3. * Copyright Andes Technology Corporation 2007-2008
  4. * All Rights Reserved.
  5. *
  6. * Revision History:
  7. *
  8. * Aug.21.2007 Created.
  9. ****************************************************************************/
  10. /*****************************************************************************
  11. *
  12. * FILE NAME VERSION
  13. *
  14. * sdd.c
  15. *
  16. * DESCRIPTION
  17. *
  18. * SD driver implementation. (Nucleus I/O Driver Architecture)
  19. *
  20. * SDC CONTROL LOGIC
  21. *
  22. * -------------------------------------------------------------------------
  23. * SDC controls <-> SDC Registers <-> SD In-Card Controller
  24. * -------------------------------------------------------------------------
  25. * SD commands <-> SDC CMD/RSP reg <-> SD Command/Data Line
  26. * -------------------------------------------------------------------------
  27. * SD data <-> SDC Data Window <-> SD Memory
  28. * -------------------------------------------------------------------------
  29. *
  30. * DATA STRUCTURES
  31. *
  32. * None
  33. *
  34. * DEPENDENCIES
  35. *
  36. * sdd.h SD driver common header file
  37. *
  38. ****************************************************************************/
  39. #include "sdd.h"
  40. #include "sdd_sd.h"
  41. #include "../../library/ndsvfs/sys_arch.h"
  42. #include "../../library/ndsvfs/include/ndsbdev.h"
  43. #include "bsp_hal.h"
  44. static uint32_t sdd_hisr_stack[SDD_HISR_STACK_SIZE];
  45. /* driver context */
  46. static SDD_DATA sdd __attribute__ ((aligned(4))) = { 0};
  47. #if (SDD_VFS_SUPPORT)
  48. // sdc block device context
  49. static NDS_BDEV sdd_bdev __attribute__((aligned(4))) = {0};
  50. #endif // SDD_VFS_SUPPORT
  51. /*****************************************************************************
  52. * FUNCTION
  53. *
  54. * _sdd_alloc_dma_channel
  55. *
  56. * DESCRIPTION
  57. *
  58. *
  59. * This function allocate a dma channel for use of sd data transfer.
  60. *
  61. * NOTE
  62. *
  63. *
  64. * INPUTS
  65. *
  66. * None
  67. *
  68. * OUTPUTS
  69. *
  70. * None
  71. *
  72. ****************************************************************************/
  73. static inline uint32_t _sdd_alloc_dma_channel(void)
  74. {
  75. uint32_t status = HAL_SUCCESS;
  76. /*
  77. * This is function is for code path simplification so it will not
  78. * check validity of sdd struct again.
  79. */
  80. /* Try APB DMA first ... */
  81. /* (in) DMAD_DMAC_AHB_CORE, DMAD_DMAC_APB_CORE */
  82. sdd.dma_ch.controller = DMAD_DMAC_APB_CORE;
  83. /* (in) Burst mode (0: no burst 1-, 1: burst 4- data cycles per dma cycle) */
  84. sdd.dma_ch.apbch_req.burst_mode = 0;
  85. /* (in) APBBR_DATAWIDTH_4(word), APBBR_DATAWIDTH_2(half-word), APBBR_DATAWIDTH_1(byte) */
  86. sdd.dma_ch.apbch_req.data_width = APBBR_DATAWIDTH_4;
  87. /* (in) APBBR_ADDRINC_xxx */
  88. sdd.dma_ch.apbch_req.src_addr_ctrl = APBBR_ADDRINC_FIXED;
  89. /* (in) APBBR_REQN_xxx (also used to help determine bus selection) */
  90. sdd.dma_ch.apbch_req.src_index = _dmad_get_reqn(sdd.dma_ch.controller, APB_SDC);
  91. /* (in) APBBR_ADDRINC_xxx */
  92. sdd.dma_ch.apbch_req.dst_addr_ctrl = APBBR_ADDRINC_I4X;
  93. /* (in) APBBR_REQN_xxx (also used to help determine bus selection) */
  94. sdd.dma_ch.apbch_req.dst_index = APBBR_REQN_NONE;
  95. status = _dmad_channel_alloc(&sdd.dma_ch, HAL_TRUE);
  96. if (status != HAL_SUCCESS) {
  97. if (status != HAL_ERR_UNAVAILABLE)
  98. return status;
  99. /* Try AHB DMAC again for lucky ... */
  100. /* (in) DMAD_DMAC_AHB_CORE, DMAD_DMAC_APB_CORE */
  101. sdd.dma_ch.controller = DMAD_DMAC_AHB_CORE;
  102. /* (in) non-zero if src and dst have different clock domain */
  103. sdd.dma_ch.ahbch_req.sync = 1;
  104. /* (in) DMAC_CSR_CHPRI_0 (lowest) ~ DMAC_CSR_CHPRI_3 (highest) */
  105. sdd.dma_ch.ahbch_req.priority = DMAC_CSR_CHPRI_0;
  106. /* (in) non-zero to enable hardware handshake mode */
  107. sdd.dma_ch.ahbch_req.hw_handshake = 1;
  108. /* (in) DMAC_CSR_SIZE_1 ~ DMAC_CSR_SIZE_256 */
  109. sdd.dma_ch.ahbch_req.burst_size = DMAC_CSR_SIZE_1;
  110. /* (in) DMAC_CSR_WIDTH_8, DMAC_CSR_WIDTH_16, or DMAC_CSR_WIDTH_32 */
  111. sdd.dma_ch.ahbch_req.src_width = DMAC_CSR_WIDTH_32;
  112. /* (in) DMAC_CSR_AD_INC, DMAC_CSR_AD_DEC, or DMAC_CSR_AD_FIX */
  113. sdd.dma_ch.ahbch_req.src_addr_ctrl = DMAC_CSR_AD_FIX;
  114. /* (in) DMAC_REQN_xxx (also used to help determine channel number) */
  115. sdd.dma_ch.ahbch_req.src_index = DMAC_REQN_SDC;
  116. sdd.dma_ch.ahbch_req.src_reqn = _dmad_get_reqn(sdd.dma_ch.controller, AHB_SDC);
  117. /* (in) DMAC_CSR_WIDTH_8, DMAC_CSR_WIDTH_16, or DMAC_CSR_WIDTH_32 */
  118. sdd.dma_ch.ahbch_req.dst_width = DMAC_CSR_WIDTH_32;
  119. /* (in) DMAC_CSR_AD_INC, DMAC_CSR_AD_DEC, or DMAC_CSR_AD_FIX */
  120. sdd.dma_ch.ahbch_req.dst_addr_ctrl = DMAC_CSR_AD_INC;
  121. /* (in) DMAC_REQN_xxx (also used to help determine channel number) */
  122. sdd.dma_ch.ahbch_req.dst_index = DMAC_REQN_NONE;
  123. sdd.dma_ch.ahbch_req.dst_reqn = AHB_REQN_NONE;
  124. status = _dmad_channel_alloc(&sdd.dma_ch, HAL_TRUE);
  125. }
  126. SDD_TRACE(("sdd dma channel(%d) controller(%d)\r\n",
  127. sdd.dma_ch.channel, sdd.dma_ch.controller));
  128. return status;
  129. }
  130. static inline void _sdd_free_dma_channel(void)
  131. {
  132. _dmad_channel_free(&sdd.dma_ch);
  133. }
  134. /*****************************************************************************
  135. * FUNCTION
  136. *
  137. * _sdd_cd_reset
  138. *
  139. * DESCRIPTION
  140. *
  141. * This function performs card-detection initialization and card remove
  142. * clean-up tasks.
  143. *
  144. * NOTE
  145. *
  146. *
  147. * INPUTS
  148. *
  149. * insert : non-zero to perform card-inserting tasks, zero for removing.
  150. *
  151. * OUTPUTS
  152. *
  153. * uint32_t : Returns HAL_SUCCESS if successful initialization,
  154. * else positive value is SSPD-specific error code,
  155. * else negative value is NU system error code.
  156. *
  157. ****************************************************************************/
  158. static uint32_t _sdd_cd_reset(uint8_t insert)
  159. {
  160. uint32_t status = HAL_SUCCESS; /* Return status code */
  161. SD_R32 sd_rsp32; /* SD card command response 32-bit */
  162. SD_R128 sd_rsp128; /* SD card command response 128-bit */
  163. char *tmp_str;
  164. uint32_t tmp_val;
  165. SDD_TRACE(("_sdd_cd_reset\r\n"));
  166. /* ------------ */
  167. /* Reset host SDC */
  168. SETB32(SDC_CMD, SDC_SDC_RST_BIT);
  169. while (GETB32(SDC_CMD, SDC_SDC_RST_BIT) != 0) ;
  170. /* Perform card removal tasks */
  171. if (insert != HAL_TRUE) {
  172. /* Stop pending DMA ? */
  173. /* Turn off SD bus power */
  174. CLRB32(SDC_PWR_CTL, SDC_SD_POWER_ON_BIT);
  175. /* Turn off SD bus clock */
  176. SETB32(SDC_CLK_CTL, SDC_CLK_DIS_BIT);
  177. /* Setup removed flag */
  178. sdd.card_desc.rca = 0;
  179. #if (SDD_VFS_SUPPORT)
  180. // notify file system layer, if any ...
  181. if (sdd_bdev.propagate_event != HAL_NULL)
  182. sdd_bdev.propagate_event(&sdd_bdev, NDSBDEV_DEVICE_UNPLUG, HAL_NULL);
  183. #endif // SDD_VFS_SUPPORT
  184. return HAL_SUCCESS;
  185. }
  186. /* ------------ */
  187. /* Turn on SD card power using default voltage level */
  188. SETB32(SDC_PWR_CTL, SDC_SD_POWER_ON_BIT);
  189. _nds_kwait(0x1000);
  190. /* ------------ */
  191. /* Turn on SD bus clock, apply max freq-division value (smallest frequency) */
  192. OUT32(SDC_CLK_CTL, (SDC_CLK_ON << SDC_CLK_DIS_BIT) |
  193. (SDC_CLK_SD << SDC_CLK_SD_BIT) | SDC_CLK_DIV_MASK);
  194. _nds_kwait(0x1000);
  195. SDD_TRACE(("power-on & clock-on!\r\n"));
  196. /* Perform card initialization & identification process */
  197. /* Idle State -> Ready State */
  198. /* - CMD0 */
  199. SDD_TRACE(("CMD0\r\n"));
  200. status = _sd_cmd0();
  201. if (status != HAL_SUCCESS)
  202. goto _err_exit;
  203. /* - CMD8 */
  204. SDD_TRACE(("CMD8\r\n"));
  205. status = _sd_cmd8(SD_CMD8_MAKE_ARG(SD_VHS_2_7V_3_6V, SD_CMD8_DEFAULT_PTN), &sd_rsp32);
  206. if (status != HAL_SUCCESS) {
  207. if ((status != SDD_RSP_TIMEOUT) && (status != SDD_CMD_TIMEOUT))
  208. goto _err_exit;
  209. sdd.card_desc.version = SDD_SPEC_1XX;
  210. }
  211. else {
  212. /* version 2.0 or later card */
  213. /* validates CMD8 response */
  214. if ((SD_R7_GET_PTN(sd_rsp32) != 0xaa) || (SD_R7_GET_VHS(sd_rsp32) == 0x00)) {
  215. /* unusable card */
  216. status = SDD_INVALID_MEDIA;
  217. goto _err_exit;
  218. }
  219. sdd.card_desc.version = SDD_SPEC_200;
  220. }
  221. /* - ACMD41 */
  222. SDD_TRACE(("ACMD41\r\n"));
  223. {
  224. uint32_t retry = 0;
  225. uint32_t timeout = 1;
  226. uint32_t sd_hcs = SD_HCS_SD; /* SD(0) or SDHC(1) for ACMD41 */
  227. /*
  228. * HCS should be 0 if CMD8 does not response.
  229. * HCS is 1 if host supports SDHC (AG101 does not support SDHC).
  230. */
  231. if (sdd.card_desc.version == SDD_SPEC_200)
  232. {
  233. sd_hcs = SD_HCS_SDHC;
  234. }
  235. /* issue ACMD41 to get OCR */
  236. while (retry++ < SD_ACMD41_MAX_RETRY_COUNT) {
  237. /* cases: */
  238. /* - v2.0 or latter SD memory card - voltage mismatch */
  239. /* - v1.x SD memory card */
  240. /* - not SD memory card */
  241. SDD_TRACE(("cmd55\r\n"));
  242. /* notify card we're going to send an ACMD, RCA is 0x00 in card's idle state */
  243. status = _sd_cmd55(0x00, &sd_rsp32);
  244. if (status != HAL_SUCCESS)
  245. goto _err_exit;
  246. if (SD_CSR_GET_APP_CMD(sd_rsp32) == 0) {
  247. /* error if card was not expecting ACMD */
  248. status = SDD_NOT_SUPPORT_ACMD;
  249. goto _err_exit;
  250. }
  251. SDD_TRACE(("acmd41\r\n"));
  252. status = _sd_acmd41(SD_ACMD41_MAKE_ARG(sd_hcs), &sd_rsp32);
  253. if (status != HAL_SUCCESS) {
  254. /* no response - not a SD memory card */
  255. goto _err_exit;
  256. }
  257. /* Continue if the OCR power state is not ready yet */
  258. if (SD_OCR_GET_BUSY(sd_rsp32) == 1) {
  259. /* card power up status is ready */
  260. sdd.card_desc.card_ccs =
  261. ((SD_OCR_GET_CCS(sd_rsp32) == SD_CCS_SDHC) ? SDD_CCS_SDHC : SDD_CCS_SD);
  262. sdd.card_desc.vdd_window = SD_OCR_GET_VDD(sd_rsp32);
  263. timeout = 0;
  264. break;
  265. }
  266. }
  267. if (timeout) {
  268. /*
  269. * unusable card
  270. * - no compatible voltage range (go to inactive state)
  271. * - timeout (no resposne or timeout)
  272. */
  273. SDD_TRACE(("timeout!\r\n"));
  274. status = SDD_INVALID_MEDIA;
  275. goto _err_exit;
  276. }
  277. }
  278. /* Ready State -> Identification State */
  279. /* - CMD2 */
  280. SDD_TRACE(("CMD2\r\n"));
  281. status = _sd_cmd2(&sd_rsp128);
  282. if (status != HAL_SUCCESS)
  283. goto _err_exit;
  284. sdd.card_desc.mfg_id = SD_CID_GET_MID(sd_rsp128); /* ID */
  285. tmp_str = (char *)SD_CID_GET_OID_PTR(sd_rsp128); /* string */
  286. sdd.card_desc.oem_id[0] = tmp_str[0];
  287. sdd.card_desc.oem_id[1] = tmp_str[1];
  288. sdd.card_desc.oem_id[2] = 0x00;
  289. tmp_str = (char *)SD_CID_GET_PNM_PTR(sd_rsp128); /* string */
  290. sdd.card_desc.prod_name[0] = tmp_str[0];
  291. sdd.card_desc.prod_name[1] = tmp_str[1];
  292. sdd.card_desc.prod_name[2] = tmp_str[2];
  293. sdd.card_desc.prod_name[3] = tmp_str[3];
  294. sdd.card_desc.prod_name[4] = tmp_str[4];
  295. sdd.card_desc.prod_name[5] = 0x00;
  296. tmp_val = (uint32_t) SD_CID_GET_PRV(sd_rsp128); /* BCD */
  297. sdd.card_desc.prod_rev[0] = (char)((tmp_val >> 4) + 0x30);
  298. sdd.card_desc.prod_rev[1] = (char)'.';
  299. sdd.card_desc.prod_rev[2] = (char)((tmp_val & 0x0f) + 0x30);
  300. sdd.card_desc.prod_rev[3] = 0x00;
  301. sdd.card_desc.prod_sn = (uint32_t) SD_CID_GET_PSN(sd_rsp128); /* 32-bit word value */
  302. tmp_val = (uint32_t) SD_CID_GET_MDT(sd_rsp128); /* 12-bit value */
  303. sdd.card_desc.mfg_year = (uint16_t) (tmp_val >> 4) + 2000;
  304. sdd.card_desc.mfg_month = (uint16_t) (tmp_val & 0x0f);
  305. SDD_TRACE(("oem_id : 0x%081x\r\n", sdd.card_desc.oem_id));
  306. SDD_TRACE(("prod_name : %s\r\n", sdd.card_desc.prod_name));
  307. SDD_TRACE(("prod_rev : 0x%081x\r\n",sdd.card_desc.prod_rev));
  308. SDD_TRACE(("prod_sn : 0x%08lx\r\n", sdd.card_desc.prod_sn));
  309. SDD_TRACE(("mfg_year : %d\r\n", sdd.card_desc.mfg_year));
  310. SDD_TRACE(("mfg_month : %d\r\n", sdd.card_desc.mfg_month));
  311. /* Identification -> Standby State */
  312. /* - CMD3 */
  313. SDD_TRACE(("CMD3\r\n"));
  314. status = _sd_cmd3(&sd_rsp32);
  315. if (status != HAL_SUCCESS)
  316. goto _err_exit;
  317. if (SD_R6_GET_CSR_ERR(sd_rsp32)) {
  318. status = SDD_CMD_ERROR;
  319. goto _err_exit;
  320. }
  321. sdd.card_desc.rca = SD_R6_GET_RCA(sd_rsp32);
  322. SDD_TRACE(("New RCA: 0x%08lx\r\n", sdd.card_desc.rca));
  323. /*
  324. * Get CSD register (Standby -> Standby)
  325. * (Majorly we need the data access timing and SD bus clock)
  326. */
  327. /* - CMD9 */
  328. SDD_TRACE(("Get CSD (CMD9)\r\n"));
  329. status = _sd_cmd9(sdd.card_desc.rca, &sd_rsp128);
  330. if (status != HAL_SUCCESS)
  331. goto _err_exit;
  332. tmp_val = SD_CSD_GET_CSD_STRUCTURE(sd_rsp128);
  333. SDD_TRACE(("CSD r0: 0x%08lx\r\n", sd_rsp128.r[0]));
  334. SDD_TRACE(("CSD r1: 0x%08lx\r\n", sd_rsp128.r[1]));
  335. SDD_TRACE(("CSD r2: 0x%08lx\r\n", sd_rsp128.r[2]));
  336. SDD_TRACE(("CSD r3: 0x%08lx\r\n", sd_rsp128.r[3]));
  337. {
  338. static uint32_t taac_tu2ns[] = {
  339. /*
  340. * Note: Due to minimum is 1, taac did not divided by 10 initially.
  341. * Values derived from this taac has to be divided by 10.
  342. */
  343. 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
  344. };
  345. static uint32_t ts_tu2bps[] = {
  346. /*
  347. * Note: Reserved index (4~7) will map to 0,
  348. * others are divided by 10 to avoid floating point operation.
  349. */
  350. 1000, 100000, 1000000, 10000000, 0, 0, 0, 0
  351. };
  352. static uint32_t taac_ts_tv2flt[] = {
  353. /*
  354. * Note: Reserved index (0) will map to 0,
  355. * other value are multiplied with 10 to avoid floating point operation.
  356. */
  357. 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60,
  358. 70, 80
  359. };
  360. if (tmp_val == 0x00) {
  361. /* Standard SD */
  362. float sdc_clk_ns; /* SDC to card bus clock */
  363. float sdc_read_to_ns, sdc_write_to_ns; /* read/write timeout (ns) */
  364. SDD_TRACE(("CSD v1.0\r\n"));
  365. SDD_TRACE(("taac : 0x%08lx\r\n", SD_CSD_GET_TAAC(sd_rsp128)));
  366. SDD_TRACE(("nsac : 0x%08lx\r\n", SD_CSD_GET_NSAC(sd_rsp128)));
  367. /* CSD structure version */
  368. sdd.card_desc.csd_ver = 0x01;
  369. /* obtain card maximum transfer speed (bps) */
  370. tmp_val = SD_CSD_GET_TRAN_SPEED(sd_rsp128);
  371. sdd.card_desc.max_dataline_rate =
  372. (taac_ts_tv2flt[SD_TRAN_SPEED_TV(tmp_val)] *
  373. ts_tu2bps[SD_TRAN_SPEED_TU(tmp_val)]);
  374. SDD_TRACE(("line_speed : 0x%08lx (bps)\r\n", sdd.card_desc.max_dataline_rate));
  375. /* AG101 SDC transfer speed limits */
  376. // if (sdd.card_desc.max_dataline_rate > 25000000)
  377. // sdd.card_desc.max_dataline_rate = 25000000;
  378. /*
  379. * assume we would like to reach the maximum transfer speed,
  380. * backward derive SDC_CLK_DIC ...
  381. */
  382. sdd.card_desc.sdc_clk_div =
  383. MB_PCLK / (sdd.card_desc.max_dataline_rate << 1);
  384. if (sdd.card_desc.sdc_clk_div > 0)
  385. sdd.card_desc.sdc_clk_div -= 1;
  386. /* obtain real SDC clock frequency */
  387. sdd.card_desc.sdc_clk_freq =
  388. MB_PCLK / ((sdd.card_desc.sdc_clk_div + 1) << 1);
  389. /*
  390. * obtain card read access time 1 (TAAC, ns)
  391. * note that this is 10x value, use of taac has to be divide by 10.
  392. */
  393. tmp_val = SD_CSD_GET_TAAC(sd_rsp128);
  394. sdd.card_desc.async_access_time =
  395. taac_ts_tv2flt[SD_TAAC_TV(tmp_val)] *
  396. taac_tu2ns[SD_TAAC_TU(tmp_val)];
  397. /* obtain card read access time 2 (NSAC * 100, clocks) */
  398. sdd.card_desc.read_access_clks = SD_CSD_GET_NSAC(sd_rsp128) * 100; /* (NSAC * 100) Hz */
  399. /* obtain programming time multiplication factor */
  400. sdd.card_desc.prog_factor = (1 << SD_CSD_GET_R2W_FACTOR(sd_rsp128));
  401. /* obtain total read (TAAC + NSAC) & write (R2W * read) access timeout (x100) */
  402. sdc_clk_ns = 1000000000.0f / (float)sdd.card_desc.sdc_clk_freq; /* SDC clock period (ns) */
  403. sdc_read_to_ns =
  404. (float)sdd.card_desc.read_access_clks * sdc_clk_ns * 100.0f +
  405. (float)sdd.card_desc.async_access_time * 10.0f;
  406. sdc_write_to_ns = (float)sdd.card_desc.prog_factor * sdc_read_to_ns;
  407. /* obtain read and write timeout value */
  408. /* read_timeout = min(100ms, 100 x read_access_time_ms) */
  409. if (sdc_read_to_ns > 100000000.0f)
  410. sdc_read_to_ns = 100000000.0f;
  411. sdd.card_desc.read_timeout_clks = (uint32_t) (sdc_read_to_ns / sdc_clk_ns);
  412. /* write_timeout = min(100ms, 100 x write_access_time_ms) */
  413. if (sdc_write_to_ns > 100000000.0f)
  414. sdc_write_to_ns = 100000000.0f;
  415. sdd.card_desc.write_timeout_clks = (uint32_t) (sdc_write_to_ns / sdc_clk_ns);
  416. /* command class support list */
  417. sdd.card_desc.cmd_class = SD_CSD_GET_CCC(sd_rsp128);
  418. /* read parameters */
  419. /* should be 512, 1024, or 2048 */
  420. sdd.card_desc.max_read_block_len = (uint16_t) (1 << SD_CSD_GET_READ_BL_LEN(sd_rsp128));
  421. /* should be 1 for SD memory card */
  422. sdd.card_desc.partial_block_read = (uint8_t) SD_CSD_GET_READ_BL_PARTIAL(sd_rsp128);
  423. sdd.card_desc.read_block_misalign = (uint8_t) SD_CSD_GET_READ_BLK_MISALIGN(sd_rsp128); /* 0 or 1 */
  424. /* write parameters */
  425. sdd.card_desc.max_write_block_len = (uint16_t) (1 << SD_CSD_GET_WRITE_BL_LEN(sd_rsp128)); /* should be same as read-block size in SD memory card */
  426. sdd.card_desc.partial_block_write = (uint8_t) SD_CSD_GET_WRITE_BL_PARTIAL(sd_rsp128); /* 0 or 1 */
  427. sdd.card_desc.write_block_misalign = (uint8_t) SD_CSD_GET_WRITE_BLK_MISALIGN(sd_rsp128); /* 0 or 1 */
  428. /* erase parameters */
  429. sdd.card_desc.erase_single_block = (uint8_t) SD_CSD_GET_ERASE_BLK_EN(sd_rsp128); /* 0 or 1 */
  430. sdd.card_desc.erase_sector_size = (uint8_t) SD_CSD_GET_SECTOR_SIZE(sd_rsp128); /* 0~127 means 1~128 number of write block size */
  431. sdd.card_desc.file_format = (uint8_t) SD_CSD_GET_FILE_FORMAT(sd_rsp128);
  432. /* write protect parameters */
  433. sdd.card_desc.wp_group_size = (uint8_t) SD_CSD_GET_WP_GRP_SIZE(sd_rsp128); /* 0~127 means 1~128 number of erase sector size */
  434. sdd.card_desc.wp_group_enable = (uint8_t) SD_CSD_GET_WP_GRP_ENABLE(sd_rsp128); /* 0 or 1 */
  435. sdd.card_desc.wp_permanent = (uint8_t) SD_CSD_GET_PERM_WRITE_PROTECT(sd_rsp128); /* 0 or 1 */
  436. sdd.card_desc.wp_temp = (uint8_t) SD_CSD_GET_TMP_WRITE_PROTECT(sd_rsp128); /* 0 or 1 */
  437. /* other parameters */
  438. sdd.card_desc.copy = (uint8_t) SD_CSD_GET_COPY(sd_rsp128); /* 0 or 1 */
  439. sdd.card_desc.dsr_imp = (uint8_t) SD_CSD_GET_DSR_IMP(sd_rsp128); /* 0 or 1 */
  440. /* card capacity parameters */
  441. sdd.card_desc.c_size = (uint32_t) SD_CSD1_GET_C_SIZE(sd_rsp128); /* 12-bit value */
  442. sdd.card_desc.c_size_mult = (uint32_t) SD_CSD1_GET_C_SIZE_MULT(sd_rsp128); /* 3-bit value */
  443. /* calculate card capacity of user data (unit of 512-bytes) */
  444. sdd.card_desc.card_capacity =
  445. ((sdd.card_desc.c_size +
  446. 1) * (1 << (sdd.card_desc.c_size_mult + 2))) >> 9;
  447. sdd.card_desc.card_capacity *=
  448. sdd.card_desc.max_read_block_len;
  449. }
  450. else if (tmp_val == 0x01) {
  451. /* SDHC (or Standard SD with CSD 2.0?) */
  452. /*static uint32_t soc_pclk = 50000000; // (assume PCLK 50M) todo: fix it! */
  453. float sdc_clk_ns;
  454. SDD_TRACE(("CSD v2.0\r\n"));
  455. SDD_TRACE(("taac(r/o) : 0x%08lx\r\n",
  456. SD_CSD_GET_TAAC(sd_rsp128)));
  457. SDD_TRACE(("nsac(r/o) : 0x%08lx\r\n",
  458. SD_CSD_GET_NSAC(sd_rsp128)));
  459. /* CSD structure version */
  460. sdd.card_desc.csd_ver = 0x02;
  461. /* obtain card maximum transfer speed (bps) */
  462. tmp_val = SD_CSD_GET_TRAN_SPEED(sd_rsp128); /* same as 1.0 */
  463. sdd.card_desc.max_dataline_rate =
  464. (taac_ts_tv2flt[SD_TRAN_SPEED_TV(tmp_val)] *
  465. ts_tu2bps[SD_TRAN_SPEED_TU(tmp_val)]);
  466. SDD_TRACE(("line_speed : 0x%08lx (bps)\r\n",
  467. sdd.card_desc.max_dataline_rate));
  468. /* AG101 SDC transfer speed limits */
  469. // if (sdd.card_desc.max_dataline_rate > 25000000)
  470. // sdd.card_desc.max_dataline_rate = 25000000;
  471. /*
  472. * assume we would like to reach the maximum transfer speed,
  473. * backward derive SDC_CLK_DIC ...
  474. */
  475. sdd.card_desc.sdc_clk_div =
  476. MB_PCLK / (sdd.card_desc.max_dataline_rate << 1);
  477. if (sdd.card_desc.sdc_clk_div > 0)
  478. sdd.card_desc.sdc_clk_div -= 1;
  479. /* obtain real SDC clock frequency */
  480. sdd.card_desc.sdc_clk_freq =
  481. MB_PCLK / ((sdd.card_desc.sdc_clk_div + 1) << 1);
  482. /* obtain card read access time 1 (TAAC, ns) */
  483. /* note that this is 10x value, use of taac has to be divide by 10. */
  484. // tmp_val = SD_CSD_GET_TAAC(sd_rsp128);
  485. // sdd.card_desc.async_access_time =
  486. // taac_ts_tv2flt[SD_TAAC_TV(tmp_val)] * taac_tu2ns[SD_TAAC_TU(tmp_val)];
  487. /* obtain card read access time 2 (NSAC * 100, clocks) */
  488. // sdd.card_desc.read_access_clks = SD_CSD_GET_NSAC(sd_rsp128) * 100; // (NSAC * 100) Hz */
  489. /* obtain programming time multiplication factor */
  490. sdd.card_desc.prog_factor = (1 << SD_CSD_GET_R2W_FACTOR(sd_rsp128)); /* should be 4 */
  491. /* obtain total read (TAAC + NSAC) & write (R2W * read) access timeout (x100) */
  492. sdc_clk_ns = 1000000000.0f / (float)sdd.card_desc.sdc_clk_freq; /* SDC clock period (ns) */
  493. /* obtain read and write timeout value */
  494. sdd.card_desc.read_timeout_clks = (uint32_t) (100000000.0f / sdc_clk_ns); /* 100ms according to spec 2.0 */
  495. sdd.card_desc.write_timeout_clks = (uint32_t) (250000000.0f / sdc_clk_ns); /* 250ms according to spec 2.0 */
  496. /* command class support list */
  497. sdd.card_desc.cmd_class = SD_CSD_GET_CCC(sd_rsp128); /* same as 1.0 */
  498. /* read parameters */
  499. sdd.card_desc.max_read_block_len = (uint16_t) (1 << SD_CSD_GET_READ_BL_LEN(sd_rsp128)); /* should be 512 bytes */
  500. sdd.card_desc.partial_block_read = (uint8_t) SD_CSD_GET_READ_BL_PARTIAL(sd_rsp128); /* should be 0 */
  501. sdd.card_desc.read_block_misalign = (uint8_t) SD_CSD_GET_READ_BLK_MISALIGN(sd_rsp128); /* should be 0 */
  502. /* write parameters */
  503. sdd.card_desc.max_write_block_len = (uint16_t) (1 << SD_CSD_GET_WRITE_BL_LEN(sd_rsp128)); /* should be 512 bytes */
  504. sdd.card_desc.partial_block_write = (uint8_t) SD_CSD_GET_WRITE_BL_PARTIAL(sd_rsp128); /* should be 0 */
  505. sdd.card_desc.write_block_misalign = (uint8_t) SD_CSD_GET_WRITE_BLK_MISALIGN(sd_rsp128); /* should be 0 */
  506. /* erase parameters */
  507. sdd.card_desc.erase_single_block = (uint8_t) SD_CSD_GET_ERASE_BLK_EN(sd_rsp128); /* should be 1 */
  508. sdd.card_desc.erase_sector_size = (uint8_t) SD_CSD_GET_SECTOR_SIZE(sd_rsp128); /* should be 64 KBytes (not relate to erase) */
  509. sdd.card_desc.file_format = (uint8_t) SD_CSD_GET_FILE_FORMAT(sd_rsp128); /* should be 0 */
  510. /* write protect parameters */
  511. sdd.card_desc.wp_group_size = (uint8_t) SD_CSD_GET_WP_GRP_SIZE(sd_rsp128); /* should be 0 */
  512. sdd.card_desc.wp_group_enable = (uint8_t) SD_CSD_GET_WP_GRP_ENABLE(sd_rsp128); /* should be 0 */
  513. sdd.card_desc.wp_permanent = (uint8_t) SD_CSD_GET_PERM_WRITE_PROTECT(sd_rsp128); /* same as 1.0 */
  514. sdd.card_desc.wp_temp = (uint8_t) SD_CSD_GET_TMP_WRITE_PROTECT(sd_rsp128); /* same as 1.0 */
  515. /* other parameters */
  516. sdd.card_desc.copy = (uint8_t) SD_CSD_GET_COPY(sd_rsp128); /* same as 1.0 */
  517. sdd.card_desc.dsr_imp = (uint8_t) SD_CSD_GET_DSR_IMP(sd_rsp128); /* same as 1.0 */
  518. /* card capacity parameters */
  519. sdd.card_desc.c_size =
  520. (uint32_t) SD_CSD2_GET_C_SIZE(sd_rsp128);
  521. /* calculate card capacity of user data (unit of 512-bytes) */
  522. sdd.card_desc.card_capacity = sdd.card_desc.c_size + 1; /* (c_size + 1) * 512 / 512 (KBytes) */
  523. sdd.card_desc.card_capacity *=
  524. sdd.card_desc.max_read_block_len;
  525. }
  526. else {
  527. SDD_TRACE(("Unknown CSD version!\r\n"));
  528. sdd.card_desc.csd_ver = 0x00;
  529. status = SDD_INVALID_MEDIA;
  530. goto _err_exit;
  531. }
  532. }
  533. SDD_TRACE(("card_capacity: 0x%08lx (KB)\r\n", sdd.card_desc.card_capacity));
  534. SDD_TRACE(("clk_div: 0x%08lx\r\n", sdd.card_desc.sdc_clk_div));
  535. SDD_TRACE(("clk_freq: %d Hz\r\n", sdd.card_desc.sdc_clk_freq));
  536. SDD_TRACE(("read_timeout_clks: 0x%08lx\r\n", sdd.card_desc.read_timeout_clks));
  537. SDD_TRACE(("write_timeout_clks: 0x%08lx\r\n", sdd.card_desc.write_timeout_clks));
  538. /* ------------ */
  539. /* Now we know how to setup SD bus clock for maximum data transfer rate ... */
  540. OUT32(SDC_CLK_CTL, (SDC_CLK_ON << SDC_CLK_DIS_BIT) | (SDC_CLK_SD << SDC_CLK_SD_BIT) |
  541. ((sdd.card_desc.sdc_clk_div << SDC_CLK_DIV_SHIFT) & SDC_CLK_DIV_MASK));
  542. _nds_kwait(0x1000);
  543. /* ------------ */
  544. /*
  545. * Get SCR register (Standby -> Transfer -> Standby)
  546. * (Majorly we need the data bus width)
  547. */
  548. SDD_TRACE(("Get SCR\r\n"));
  549. status = _sd_select_card(sdd.card_desc.rca); /* standby -> transfer */
  550. if (status != HAL_SUCCESS)
  551. goto _err_exit;
  552. /*
  553. * send SD command to setup read-block-size
  554. * (SD memory card read block size could smaller than 512)
  555. */
  556. SDD_TRACE(("cmd16\r\n"));
  557. status = _sd_cmd16(8, &sd_rsp32); /* read 64 bits data */
  558. if (status != HAL_SUCCESS)
  559. goto _err_exit;
  560. /* set SDC data timeout register */
  561. // OUT32(SDC_DATA_TIMER, 0xffffffff); /* use sdd.card_desc.read_timeout_clks ? */
  562. OUT32(SDC_DATA_TIMER, sdd.card_desc.read_timeout_clks);
  563. /* set SDC data length register */
  564. OUT32(SDC_DATA_LEN, 8); /* read 64 bits data */
  565. /* set SDC data control register */
  566. OUT32(SDC_DATA_CR, SDC_DATA_EN_MASK | ((3 << SDC_BLK_SIZE_SHIFT) & SDC_BLK_SIZE_MASK)); /* 2^3 = 8 bytes */
  567. /* send SD command to readback SCR register */
  568. SDD_TRACE(("cmd55\r\n"));
  569. status = _sd_cmd55(sdd.card_desc.rca, &sd_rsp32);
  570. if (status != HAL_SUCCESS)
  571. goto _err_exit;
  572. SDD_TRACE(("acmd51\r\n"));
  573. status = _sd_acmd51(&sd_rsp32);
  574. if (status != HAL_SUCCESS)
  575. goto _err_exit;
  576. /* pio-mode read-back */
  577. tmp_val = 0;
  578. while (tmp_val++ < SD_READ_MAX_RETRY_COUNT) {
  579. uint32_t sdc_status = IN32(SDC_STATUS);
  580. if (sdc_status & (SDC_SR_CARD_DETECT_MASK | SDC_SR_DATA_TIMEOUT_MASK | SDC_SR_DATA_CRC_FAIL_MASK)) {
  581. status = SDD_READ_DATA_ERROR;
  582. goto _err_exit;
  583. }
  584. if (sdc_status & (SDC_SR_FIFO_ORUN_MASK | SDC_SR_DATA_END_MASK))
  585. break;
  586. }
  587. /* ACMD51/ACMD13 data are MSB first (big-endian) */
  588. sd_rsp128.r[3] = IN32(SDC_DATA_WIN); /* [63:32] BE */
  589. sd_rsp128.r[2] = IN32(SDC_DATA_WIN); /* [31:00] BE */
  590. /* reorder byte endian inside the 32-bit word */
  591. sd_rsp128.b[0] = sd_rsp128.b[11];
  592. sd_rsp128.b[1] = sd_rsp128.b[10];
  593. sd_rsp128.b[2] = sd_rsp128.b[9];
  594. sd_rsp128.b[3] = sd_rsp128.b[8];
  595. sd_rsp128.b[4] = sd_rsp128.b[15];
  596. sd_rsp128.b[5] = sd_rsp128.b[14];
  597. sd_rsp128.b[6] = sd_rsp128.b[13];
  598. sd_rsp128.b[7] = sd_rsp128.b[12];
  599. sdd.card_desc.scr_ver = (uint8_t) SD_SCR_GET_SCR_STRUCTURE(sd_rsp128);
  600. sdd.card_desc.spec_ver = (uint8_t) SD_SCR_GET_SD_SPEC(sd_rsp128);
  601. sdd.card_desc.erase_val = (uint8_t) SD_SCR_GET_DATA_STAT_AFTER_ERASE(sd_rsp128);
  602. sdd.card_desc.security_ver = (uint8_t) SD_SCR_GET_SD_SECURITY(sd_rsp128);
  603. sdd.card_desc.bus_width = (uint8_t) SD_SCR_GET_SD_BUS_WIDTHS(sd_rsp128);
  604. SDD_TRACE(("lw : 0x%08lx\r\n", sd_rsp128.r[2]));
  605. SDD_TRACE(("hw : 0x%08lx\r\n", sd_rsp128.r[3]));
  606. SDD_TRACE(("SCR_ver : 0x%08lx\r\n", sdd.card_desc.scr_ver));
  607. SDD_TRACE(("spec_ver : 0x%08lx\r\n", sdd.card_desc.spec_ver));
  608. SDD_TRACE(("erase_val: 0x%08lx\r\n", sdd.card_desc.erase_val));
  609. SDD_TRACE(("secu_ver : 0x%08lx\r\n", sdd.card_desc.security_ver));
  610. SDD_TRACE(("bus_width: 0x%08lx\r\n", sdd.card_desc.bus_width));
  611. if ((IN32(SDC_BUS_WIDTH) & SDC_WIDE_BUS_SUPPORT_MASK) &&
  612. (sdd.card_desc.bus_width & 0x04)) {
  613. SDD_TRACE(("SDC configured to wide bus!\r\n"));
  614. SDD_TRACE(("cmd55\r\n"));
  615. status = _sd_cmd55(sdd.card_desc.rca, &sd_rsp32);
  616. if (status != HAL_SUCCESS)
  617. goto _err_exit;
  618. SDD_TRACE(("acmd6\r\n"));
  619. status = _sd_acmd6(SD_ACMD6_MAKE_ARG(SD_BUS_WIDTH_ARG_4BIT), &sd_rsp32);
  620. if (status != HAL_SUCCESS)
  621. goto _err_exit;
  622. SDD_TRACE(("sdc_bus_width\r\n"));
  623. OUT32(SDC_BUS_WIDTH, SDC_WIDE_BUS_SUPPORT_MASK | SDC_WIDE_BUS_MASK);
  624. }
  625. else {
  626. SDD_TRACE(("SDC configured to single bus!\r\n"));
  627. SDD_TRACE(("cmd55\r\n"));
  628. status = _sd_cmd55(sdd.card_desc.rca, &sd_rsp32);
  629. if (status != HAL_SUCCESS)
  630. goto _err_exit;
  631. SDD_TRACE(("acmd6\r\n"));
  632. status = _sd_acmd6(SD_ACMD6_MAKE_ARG(SD_BUS_WIDTH_ARG_1BIT), &sd_rsp32);
  633. if (status != HAL_SUCCESS)
  634. goto _err_exit;
  635. OUT32(SDC_BUS_WIDTH, SDC_WIDE_BUS_SUPPORT_MASK | SDC_SINGLE_BUS_MASK);
  636. }
  637. /* transfer -> standby */
  638. // status = _sd_deselect_card(sdd.card_desc.rca);
  639. // if (status != HAL_SUCCESS)
  640. // goto _err_exit;
  641. /*
  642. * Turn on SD card power using voltage level obtained from card OCR
  643. * todo: use default? flib doesn't setup voltage value?
  644. */
  645. // SETB32(SDC_PWR_CTL, SDC_SD_POWER_ON_BIT);
  646. // _nds_kwait(0x1000);
  647. return HAL_SUCCESS;
  648. _err_exit:
  649. SDD_TRACE(("_err_exit!\r\n"));
  650. /* Turn off SD bus power */
  651. CLRB32(SDC_PWR_CTL, SDC_SD_POWER_ON_BIT);
  652. /* Turn off SD bus clock */
  653. SETB32(SDC_CLK_CTL, SDC_CLK_DIS_BIT);
  654. /* Setup removed flag */
  655. sdd.card_desc.rca = 0;
  656. #if (SDD_VFS_SUPPORT)
  657. // notify file system layer, if any ...
  658. if (sdd_bdev.propagate_event != HAL_NULL)
  659. sdd_bdev.propagate_event(&sdd_bdev, NDSBDEV_DEVICE_UNPLUG, HAL_NULL);
  660. #endif // SDD_VFS_SUPPORT
  661. return status;
  662. }
  663. #if 0
  664. /*****************************************************************************
  665. * FUNCTION
  666. *
  667. * _sdd_read_sector_pio
  668. *
  669. * DESCRIPTION
  670. *
  671. * This function performs a sector of data PIO transfer from the SD memory
  672. * card.
  673. *
  674. * NOTE
  675. *
  676. *
  677. * INPUTS
  678. *
  679. * sector :
  680. * sector_cnt :
  681. * io_buff :
  682. *
  683. * OUTPUTS
  684. *
  685. * uint32_t : Returns HAL_SUCCESS if successful initialization,
  686. * else positive value is SSPD-specific error code,
  687. * else negative value is NU system error code.
  688. *
  689. ****************************************************************************/
  690. uint32_t _sdd_read_sector_pio(uint32_t sector, uint8_t * io_buff)
  691. {
  692. uint32_t status = SDD_INVALID_FUNCTION;
  693. uint32_t sdc_status;
  694. SD_R32 sd_rsp32;
  695. uint32_t retry = 0;
  696. uint32_t word_cnt;
  697. uint32_t fifo_depth;
  698. SDD_TRACE(("\r\n_sdd_read_sector_pio\r\n"));
  699. if (sector > (sdd.card_desc.card_capacity << 1)) {
  700. SDD_TRACE(("Invalid sector address!\r\n"));
  701. return SDD_INVLAID_ADDRESS;
  702. }
  703. /* todo: sector size */
  704. /* standby -> transfer */
  705. SDD_TRACE(("- select_card\r\n"));
  706. status = _sd_select_card(sdd.card_desc.rca);
  707. if (status != HAL_SUCCESS)
  708. goto _err_exit;
  709. /* send SD command to setup read-block-size */
  710. /* todo: assume sector size is 512 bytes */
  711. SDD_TRACE(("- cmd16\r\n"));
  712. status = _sd_cmd16(SDD_SECTOR_SIZE, &sd_rsp32);
  713. if (status != HAL_SUCCESS)
  714. goto _err_exit;
  715. /* set SDC data timeout register */
  716. OUT32(SDC_DATA_TIMER, sdd.card_desc.read_timeout_clks);
  717. /* set SDC data length register */
  718. OUT32(SDC_DATA_LEN, SDD_SECTOR_SIZE);
  719. /* set SDC data control register */
  720. OUT32(SDC_DATA_CR, SDC_DATA_EN_MASK | ((SDD_POWER_OF_SECTOR_SIZE << SDC_BLK_SIZE_SHIFT) & SDC_BLK_SIZE_MASK)); /* 2^9 = 512 bytes */
  721. /* send SD command to readback data */
  722. SDD_TRACE(("- cmd17\r\n"));
  723. if (sdd.card_desc.card_ccs == SDD_CCS_SD)
  724. status = _sd_cmd17(sector * SDD_SECTOR_SIZE, &sd_rsp32); /* address unit is byte for SD */
  725. else
  726. status = _sd_cmd17(sector, &sd_rsp32); /* address unit is 512 bytes for SDHC */
  727. if (status != HAL_SUCCESS)
  728. goto _err_exit;
  729. SDD_TRACE(("- wait until card is sending out data\r\n"));
  730. _nds_kwait(0x1000); /* hw need delay ? */
  731. /*status = _sd_wait_sending_state(sdd.card_desc.rca); */
  732. /*if (status != HAL_SUCCESS) */
  733. /* goto _err_exit; */
  734. SDD_TRACE(("- read back data\r\n"));
  735. /* per 32-bit word read back */
  736. word_cnt = SDD_SECTOR_SIZE >> 2;
  737. while (word_cnt > 0) {
  738. retry = 0;
  739. while (retry++ < SD_READ_MAX_RETRY_COUNT) {
  740. sdc_status = IN32(SDC_STATUS);
  741. if (sdc_status &
  742. (SDC_SR_CARD_DETECT_MASK | SDC_SR_DATA_TIMEOUT_MASK
  743. | SDC_SR_DATA_CRC_FAIL_MASK)) {
  744. SDD_TRACE(("- data error/timeout or card removed, sdc_status: 0x%08lx\r\n", sdc_status));
  745. status = SDD_READ_DATA_ERROR;
  746. goto _err_exit;
  747. }
  748. if (sdc_status &
  749. (SDC_SR_FIFO_ORUN_MASK | SDC_SR_DATA_END_MASK)) {
  750. SETB32(SDC_CLEAR, SDC_FIFO_ORUN_BIT);
  751. retry = 0xffffffff; /* success */
  752. break;
  753. }
  754. }
  755. if (retry != 0xffffffff) {
  756. /* wait data timeout */
  757. SDD_TRACE(("- timeout, sdc_status: 0x%08lx\r\n",
  758. sdc_status));
  759. status = SDD_READ_DATA_ERROR;
  760. goto _err_exit;
  761. }
  762. fifo_depth = SDC_FIFO_WORD_DEPTH;
  763. while (fifo_depth-- > 0) {
  764. /* CMD17/18/24/25 ACMD18/25 data are LSB first (little-endian) */
  765. *((uint32_t *) io_buff) = IN32(SDC_DATA_WIN); /* just mem-move so no data endian issue. */
  766. io_buff += 4;
  767. if (--word_cnt == 0)
  768. break;
  769. }
  770. }
  771. SDD_TRACE(("- data read completed\r\n"));
  772. return HAL_SUCCESS;
  773. _err_exit:
  774. SDD_TRACE(("- error on data read\r\n"));
  775. return status;
  776. }
  777. #endif
  778. /*****************************************************************************
  779. * FUNCTION
  780. *
  781. * _sdd_read_sectors_pio
  782. *
  783. * DESCRIPTION
  784. *
  785. * This function performs PIO data transfer from the SD memory card in
  786. * multiple unit of sectors.
  787. *
  788. * NOTE
  789. *
  790. *
  791. * INPUTS
  792. *
  793. * sector :
  794. * sector_cnt :
  795. * io_buff :
  796. *
  797. * OUTPUTS
  798. *
  799. * uint32_t : Returns HAL_SUCCESS if successful initialization,
  800. * else positive value is SSPD-specific error code,
  801. * else negative value is NU system error code.
  802. *
  803. ****************************************************************************/
  804. static uint32_t _sdd_read_sectors_pio(uint32_t sector, uint32_t sector_cnt,
  805. uint8_t * io_buff)
  806. {
  807. uint32_t status = SDD_INVALID_FUNCTION;
  808. uint32_t sdc_status;
  809. SD_R32 sd_rsp32;
  810. uint32_t retry = 0;
  811. uint32_t word_cnt;
  812. uint32_t fifo_depth;
  813. SDD_TRACE(("\r\n_sdd_read_sectors_pio\r\n"));
  814. if (sector > (sdd.card_desc.card_capacity << 1)) {
  815. SDD_TRACE(("Invalid sector address!\r\n"));
  816. return SDD_INVLAID_ADDRESS;
  817. }
  818. if ((sector_cnt == 0) || (((sector + sector_cnt) > (sdd.card_desc.card_capacity << 1)))) {
  819. SDD_TRACE(("Invalid sector address range!\r\n"));
  820. return SDD_INVLAID_ADDR_RANGE;
  821. }
  822. /* todo: sector size */
  823. /* standby -> transfer */
  824. SDD_TRACE(("- select_card\r\n"));
  825. status = _sd_select_card(sdd.card_desc.rca);
  826. if (status != HAL_SUCCESS)
  827. goto _err_exit;
  828. /* send SD command to setup read-block-size */
  829. /* todo: assume sector size is 512 bytes */
  830. SDD_TRACE(("- cmd16\r\n"));
  831. status = _sd_cmd16(SDD_SECTOR_SIZE, &sd_rsp32);
  832. if (status != HAL_SUCCESS)
  833. goto _err_exit;
  834. /* set SDC data timeout register */
  835. OUT32(SDC_DATA_TIMER, sdd.card_desc.read_timeout_clks);
  836. /* set SDC data length register */
  837. OUT32(SDC_DATA_LEN, sector_cnt * SDD_SECTOR_SIZE);
  838. /* set SDC data control register */
  839. OUT32(SDC_DATA_CR, SDC_DATA_EN_MASK | ((SDD_POWER_OF_SECTOR_SIZE << SDC_BLK_SIZE_SHIFT) & SDC_BLK_SIZE_MASK)); /* 2^9 = 512 bytes */
  840. /* send SD command to readback data */
  841. SDD_TRACE(("- cmd18\r\n"));
  842. if (sdd.card_desc.card_ccs == SDD_CCS_SD)
  843. status = _sd_cmd18(sector * SDD_SECTOR_SIZE, &sd_rsp32); /* address unit is byte for SD */
  844. else
  845. status = _sd_cmd18(sector, &sd_rsp32); /* address unit is 512 bytes for SDHC */
  846. if (status != HAL_SUCCESS)
  847. goto _err_exit;
  848. SDD_TRACE(("- wait until card is sending out data\r\n"));
  849. _nds_kwait(0x1000); /* hw need delay ? */
  850. /* This method will dirty SDC_STATUS so not been used. */
  851. // status = _sd_wait_sending_state(sdd.card_desc.rca);
  852. // if (status != HAL_SUCCESS)
  853. // goto _err_exit;
  854. /* per sector PIO read back */
  855. OUT32(SDC_CLEAR, 0x3ff);
  856. SDD_TRACE(("- read back data\r\n"));
  857. while (sector_cnt-- > 0) {
  858. /* per 32-bit word read back */
  859. word_cnt = SDD_SECTOR_SIZE >> 2;
  860. while (word_cnt > 0) {
  861. retry = 0;
  862. while (retry++ < SD_READ_MAX_RETRY_COUNT) {
  863. sdc_status = IN32(SDC_STATUS);
  864. if (sdc_status &
  865. (SDC_SR_CARD_DETECT_MASK |
  866. SDC_SR_DATA_TIMEOUT_MASK |
  867. SDC_SR_DATA_CRC_FAIL_MASK)) {
  868. SDD_TRACE(("- data error/timeout or card removed, sdc_status: 0x%08lx\r\n", sdc_status));
  869. status = SDD_READ_DATA_ERROR;
  870. goto _err_exit;
  871. }
  872. if (sdc_status & (SDC_SR_FIFO_ORUN_MASK | SDC_SR_DATA_END_MASK)) {
  873. retry = 0xffffffff; /* success */
  874. break;
  875. }
  876. }
  877. if (retry != 0xffffffff) {
  878. /* wait data timeout */
  879. SDD_TRACE(("- timeout, sdc_status: 0x%08lx\r\n", sdc_status));
  880. status = SDD_READ_DATA_ERROR;
  881. goto _err_exit;
  882. }
  883. fifo_depth = SDC_FIFO_WORD_DEPTH;
  884. SETB32(SDC_CLEAR, SDC_FIFO_ORUN_BIT);
  885. while (fifo_depth-- > 0) {
  886. /* CMD17/18/24/25 ACMD18/25 data are LSB first (little-endian) */
  887. *((uint32_t *) io_buff) = IN32(SDC_DATA_WIN); /* just mem-move so no data endian issue. */
  888. io_buff += 4;
  889. if (--word_cnt == 0)
  890. break;
  891. }
  892. }
  893. }
  894. _nds_kwait(0x1000); /* hw need delay ? */
  895. /* Stop data transmission */
  896. SDD_TRACE(("- stop transmission\r\n"));
  897. status = _sd_stop_transmission(sdd.card_desc.rca);
  898. /* FIXME this part is marked for qemu */
  899. #if 0
  900. if (status != HAL_SUCCESS)
  901. goto _err_exit;
  902. #endif
  903. SDD_TRACE(("- data read completed\r\n"));
  904. return HAL_SUCCESS;
  905. _err_exit:
  906. SDD_TRACE(("- error on data read! status(0x%08lx)\r\n", status));
  907. return status;
  908. }
  909. extern int dmad_apb_config_dir(const DMAD_CHANNEL_REQUEST_DESC *ch_req, uint8_t dir);
  910. /*****************************************************************************
  911. * FUNCTION
  912. *
  913. * _sdd_read_sectors_dma
  914. *
  915. * DESCRIPTION
  916. *
  917. * This function performs DMA data transfer from the SD memory card in
  918. * multiple unit of sectors.
  919. *
  920. * NOTE
  921. *
  922. *
  923. * INPUTS
  924. *
  925. * sector :
  926. * sector_cnt :
  927. * io_buff :
  928. *
  929. * OUTPUTS
  930. *
  931. * uint32_t : Returns HAL_SUCCESS if successful initialization,
  932. * else positive value is SSPD-specific error code,
  933. * else negative value is NU system error code.
  934. *
  935. ****************************************************************************/
  936. static uint32_t _sdd_read_sectors_dma(uint32_t sector, uint32_t sector_cnt,
  937. uint8_t * io_buff)
  938. {
  939. uint32_t status = SDD_INVALID_FUNCTION;
  940. SD_R32 sd_rsp32;
  941. DMAD_DRB *drb;
  942. SDD_TRACE(("\r\n_sdd_read_sectors_dma\r\n"));
  943. if (sector > (sdd.card_desc.card_capacity << 1)) {
  944. SDD_TRACE(("Invalid sector address!\r\n"));
  945. return SDD_INVLAID_ADDRESS;
  946. }
  947. if ((sector_cnt == 0) || (((sector + sector_cnt) > (sdd.card_desc.card_capacity << 1)))) {
  948. SDD_TRACE(("Invalid sector address range!\r\n"));
  949. return SDD_INVLAID_ADDR_RANGE;
  950. }
  951. /* todo: sector size */
  952. /* standby -> transfer */
  953. SDD_TRACE(("- select_card\r\n"));
  954. status = _sd_select_card(sdd.card_desc.rca);
  955. if (status != HAL_SUCCESS)
  956. goto _safe_exit;
  957. /* send SD command to setup read-block-size */
  958. /* todo: assume sector size is 512 bytes */
  959. SDD_TRACE(("- cmd16\r\n"));
  960. status = _sd_cmd16(SDD_SECTOR_SIZE, &sd_rsp32);
  961. if (status != HAL_SUCCESS)
  962. goto _safe_exit;
  963. /* set SDC data timeout register */
  964. OUT32(SDC_DATA_TIMER, sdd.card_desc.read_timeout_clks);
  965. /* set SDC data length register */
  966. OUT32(SDC_DATA_LEN, sector_cnt * SDD_SECTOR_SIZE);
  967. /* set SDC data control register */
  968. OUT32(SDC_DATA_CR, SDC_DATA_EN_MASK | SDC_DMA_EN_MASK | ((SDD_POWER_OF_SECTOR_SIZE << SDC_BLK_SIZE_SHIFT) & SDC_BLK_SIZE_MASK)); /* 2^9 = 512 bytes */
  969. /* send SD command to readback data */
  970. SDD_TRACE(("- cmd18\r\n"));
  971. if (sdd.card_desc.card_ccs == SDD_CCS_SD)
  972. status = _sd_cmd18(sector * SDD_SECTOR_SIZE, &sd_rsp32); /* address unit is byte for SD */
  973. else
  974. status = _sd_cmd18(sector, &sd_rsp32); /* address unit is 512 bytes for SDHC */
  975. if (status != HAL_SUCCESS)
  976. goto _safe_exit;
  977. SDD_TRACE(("- wait until card is sending out data\r\n"));
  978. // _nds_kwait(0x1000); /* hw need delay ? */
  979. /* This method will dirty SDC_STATUS so not been used. */
  980. // status = _sd_wait_sending_state(sdd.card_desc.rca);
  981. // if (status != HAL_SUCCESS)
  982. // goto _err_exit;
  983. /* per sector DMA read back */
  984. /* CMD17/18/24/25 ACMD18/25 data are LSB first (little-endian) */
  985. SDD_TRACE(("- read back data\r\n"));
  986. dmad_apb_config_dir(&sdd.dma_ch,DMAD_DIR_A0_TO_A1);
  987. while (sector_cnt-- > 0) {
  988. status = _dmad_alloc_drb(&sdd.dma_ch, &drb);
  989. if (status != HAL_SUCCESS)
  990. goto _safe_exit;
  991. drb->src_addr = (void *)SDC_DATA_WIN;
  992. drb->dst_addr = (void *)io_buff;
  993. drb->req_size = SDD_SECTOR_SIZE >> 2; /* multiple counts of transfer width */
  994. if (sector_cnt == 0)
  995. drb->completion_sem = &sdd.dma_sem;
  996. /* Submit DRB */
  997. status = _dmad_submit_request(&sdd.dma_ch, drb);
  998. if (status != HAL_SUCCESS)
  999. goto _safe_exit;
  1000. /* Point to next buffer location */
  1001. io_buff += SDD_SECTOR_SIZE;
  1002. }
  1003. /* Wait DMA completion */
  1004. /* - method 1: sync with semaphore */
  1005. /* - method 2: check SDC status register SDC_STATUS[7] */
  1006. if (1){
  1007. DEBUG(0, 1, "- wait dma completion ...\n");
  1008. status = hal_pend_semaphore(&sdd.dma_sem, 300);
  1009. if (status == HAL_ERR_TIMEOUT) {
  1010. DEBUG(1, 1, "- wait dma completion timeout (might not an error)\n");
  1011. goto _safe_exit;
  1012. }
  1013. else if (status != HAL_SUCCESS) {
  1014. DEBUG(1, 1, "- wait dma completion failed! (0x%08lx)\n", status);
  1015. goto _safe_exit;
  1016. }
  1017. }
  1018. else {
  1019. uint32_t retry = 0;
  1020. uint32_t sdc_status;
  1021. SDD_TRACE(("- polling dma completion status ...\r\n"));
  1022. while (retry++ < SD_READ_MAX_RETRY_COUNT) {
  1023. sdc_status = IN32(SDC_STATUS);
  1024. if (sdc_status &
  1025. (SDC_SR_CARD_DETECT_MASK | SDC_SR_DATA_TIMEOUT_MASK
  1026. | SDC_SR_DATA_CRC_FAIL_MASK)) {
  1027. SDD_TRACE(("- data error/timeout or card removed, sdc_status: 0x%08lx\r\n", sdc_status));
  1028. status = SDD_READ_DATA_ERROR;
  1029. break; /* todo: report error to upper layer? */
  1030. }
  1031. if (sdc_status & (SDC_SR_FIFO_ORUN_MASK | SDC_SR_DATA_END_MASK)) {
  1032. SETB32(SDC_CLEAR, SDC_FIFO_ORUN_BIT);
  1033. retry = 0xffffffff; /* success */
  1034. break;
  1035. }
  1036. }
  1037. }
  1038. /* Stop data transmission anyway after waiting. */
  1039. SDD_TRACE(("- stop transmission\r\n"));
  1040. status = _sd_stop_transmission(sdd.card_desc.rca);
  1041. /* FIXME this part is marked for qemu */
  1042. #if 0
  1043. if (status != HAL_SUCCESS)
  1044. goto _safe_exit;
  1045. #endif
  1046. status = HAL_SUCCESS;
  1047. _safe_exit:
  1048. #if (SDD_DEBUG_TRACE)
  1049. if (status == HAL_SUCCESS)
  1050. SDD_TRACE(("- data read completed\r\n"));
  1051. else
  1052. SDD_TRACE(("- error on data read\r\n"));
  1053. #endif /* SDD_DEBUG_TRACE */
  1054. return status;
  1055. }
  1056. #if 0
  1057. /*****************************************************************************
  1058. * FUNCTION
  1059. *
  1060. * _sdd_write_sector_pio
  1061. *
  1062. * DESCRIPTION
  1063. *
  1064. * This function performs a sector of data PIO transfer to the SD memory
  1065. * card.
  1066. *
  1067. * NOTE
  1068. *
  1069. *
  1070. * INPUTS
  1071. *
  1072. * sector :
  1073. * io_buff :
  1074. *
  1075. * OUTPUTS
  1076. *
  1077. * uint32_t : Returns HAL_SUCCESS if successful initialization,
  1078. * else positive value is SSPD-specific error code,
  1079. * else negative value is NU system error code.
  1080. *
  1081. ****************************************************************************/
  1082. uint32_t _sdd_write_sector_pio(uint32_t sector, uint8_t * io_buff)
  1083. {
  1084. uint32_t status = SDD_INVALID_FUNCTION;
  1085. uint32_t sdc_status;
  1086. SD_R32 sd_rsp32;
  1087. uint32_t retry = 0;
  1088. uint32_t word_cnt;
  1089. uint32_t fifo_depth;
  1090. SDD_TRACE(("\r\n_sdd_write_sector_pio\r\n"));
  1091. if (sector > (sdd.card_desc.card_capacity << 1)) {
  1092. SDD_TRACE(("Invalid sector address!\r\n"));
  1093. return SDD_INVLAID_ADDRESS;
  1094. }
  1095. if (GETB32(SDC_STATUS, SDC_SR_WRITE_PROT_BIT)) {
  1096. SDD_TRACE(("Card is write protected!\r\n"));
  1097. return SDD_WRITE_PROTECTED;
  1098. }
  1099. /* todo: sector size */
  1100. /* standby -> transfer */
  1101. SDD_TRACE(("- select_card\r\n"));
  1102. status = _sd_select_card(sdd.card_desc.rca);
  1103. if (status != HAL_SUCCESS)
  1104. goto _err_exit;
  1105. /* send SD command to setup write-block-size */
  1106. /* todo: assume sector size is 512 bytes */
  1107. SDD_TRACE(("- cmd16\r\n"));
  1108. status = _sd_cmd16(SDD_SECTOR_SIZE, &sd_rsp32);
  1109. if (status != HAL_SUCCESS)
  1110. goto _err_exit;
  1111. /* set SDC data timeout register */
  1112. OUT32(SDC_DATA_TIMER, sdd.card_desc.write_timeout_clks);
  1113. /* set SDC data length register */
  1114. OUT32(SDC_DATA_LEN, SDD_SECTOR_SIZE);
  1115. /* set SDC data control register */
  1116. OUT32(SDC_DATA_CR, SDC_DATA_EN_MASK | SDC_DATA_WRITE_MASK | ((SDD_POWER_OF_SECTOR_SIZE << SDC_BLK_SIZE_SHIFT) & SDC_BLK_SIZE_MASK)); /* 2^9 = 512 bytes */
  1117. /* send SD command to write data */
  1118. SDD_TRACE(("- cmd24\r\n"));
  1119. if (sdd.card_desc.card_ccs == SDD_CCS_SD)
  1120. status = _sd_cmd24(sector * SDD_SECTOR_SIZE, &sd_rsp32); /* address unit is byte for SD */
  1121. else
  1122. status = _sd_cmd24(sector, &sd_rsp32); /* address unit is 512 bytes for SDHC */
  1123. if (status != HAL_SUCCESS)
  1124. goto _err_exit;
  1125. SDD_TRACE(("- wait ready to write out data\r\n"));
  1126. _nds_kwait(0x1000); /* hw need delay ? */
  1127. /*status = _sd_wait_receiving_state(sdd.card_desc.rca); // This method look not necessary for writing. */
  1128. /*if (status != HAL_SUCCESS) */
  1129. /* goto _err_exit; */
  1130. /* per sector PIO write out */
  1131. SDD_TRACE(("- write out data\r\n"));
  1132. /* clear SDC status bits before sending data */
  1133. OUT32(SDC_CLEAR, SDC_CLEAR_ALL);
  1134. /* per 32-bit word write out */
  1135. word_cnt = SDD_SECTOR_SIZE >> 2;
  1136. while (word_cnt > 0) {
  1137. fifo_depth = SDC_FIFO_WORD_DEPTH;
  1138. while (fifo_depth-- > 0) {
  1139. /* CMD17/18/24/25 ACMD18/25 data are LSB first (little-endian) */
  1140. OUT32(SDC_DATA_WIN, *((uint32_t *) io_buff)); /* just mem-move so no data endian issue. */
  1141. io_buff += 4;
  1142. if (--word_cnt == 0)
  1143. goto _complete_exit;
  1144. }
  1145. retry = 0;
  1146. while (retry++ < SD_WRITE_MAX_RETRY_COUNT) {
  1147. sdc_status = IN32(SDC_STATUS);
  1148. if (sdc_status &
  1149. (SDC_SR_CARD_DETECT_MASK | SDC_SR_DATA_TIMEOUT_MASK
  1150. | SDC_SR_DATA_CRC_FAIL_MASK)) {
  1151. status = SDD_WRITE_DATA_ERROR;
  1152. goto _err_exit;
  1153. }
  1154. if (sdc_status &
  1155. (SDC_SR_FIFO_URUN_MASK | SDC_SR_DATA_END_MASK)) {
  1156. SETB32(SDC_CLEAR, SDC_FIFO_URUN_BIT);
  1157. retry = 0xffffffff; /* success */
  1158. break;
  1159. }
  1160. }
  1161. if (retry != 0xffffffff) {
  1162. /* wait data timeout */
  1163. SDD_TRACE(("- timeout, sdc_status: 0x%08lx\r\n",
  1164. sdc_status));
  1165. /*SDD_TRACE(("- wait again by polling CSR\r\n")); */
  1166. /*status = _sd_wait_receiving_state(sdd.card_desc.rca); */
  1167. /*if (status != HAL_SUCCESS) */
  1168. goto _err_exit;
  1169. /*SDD_TRACE(("- card ready, sdc_status: 0x%08lx\r\n", IN32(SDC_STATUS))); */
  1170. }
  1171. }
  1172. _complete_exit:
  1173. /* Wait host SDC shift-out FIFO data */
  1174. SDD_TRACE(("- final check sdc_status\r\n"));
  1175. retry = 0;
  1176. while (retry++ < SD_WRITE_MAX_RETRY_COUNT) {
  1177. sdc_status = IN32(SDC_STATUS);
  1178. if (sdc_status &
  1179. (SDC_SR_CARD_DETECT_MASK | SDC_SR_DATA_TIMEOUT_MASK |
  1180. SDC_SR_DATA_CRC_FAIL_MASK)) {
  1181. status = SDD_WRITE_DATA_ERROR;
  1182. goto _err_exit;
  1183. }
  1184. if ((sdc_status == 0) || (sdc_status & SDC_SR_DATA_END_MASK)) {
  1185. break;
  1186. }
  1187. }
  1188. SDD_TRACE(("- data write completed\r\n"));
  1189. return HAL_SUCCESS;
  1190. _err_exit:
  1191. SDD_TRACE(("- error on data write\r\n"));
  1192. return status;
  1193. }
  1194. #endif
  1195. /*****************************************************************************
  1196. * FUNCTION
  1197. *
  1198. * _sdd_write_sectors_pio
  1199. *
  1200. * DESCRIPTION
  1201. *
  1202. * This function performs PIO data transfer to the SD memory card in
  1203. * multiple unit of sectors.
  1204. *
  1205. * NOTE
  1206. *
  1207. *
  1208. * INPUTS
  1209. *
  1210. * sector :
  1211. * sector_cnt :
  1212. * io_buff :
  1213. *
  1214. * OUTPUTS
  1215. *
  1216. * uint32_t : Returns HAL_SUCCESS if successful initialization,
  1217. * else positive value is SSPD-specific error code,
  1218. * else negative value is NU system error code.
  1219. *
  1220. ****************************************************************************/
  1221. static uint32_t _sdd_write_sectors_pio(uint32_t sector, uint32_t sector_cnt,
  1222. uint8_t * io_buff)
  1223. {
  1224. uint32_t status = SDD_INVALID_FUNCTION;
  1225. uint32_t sdc_status;
  1226. SD_R32 sd_rsp32;
  1227. uint32_t retry = 0;
  1228. uint32_t word_cnt;
  1229. uint32_t fifo_depth;
  1230. if (sector > (sdd.card_desc.card_capacity << 1)) {
  1231. SDD_TRACE(("Invalid sector address!\r\n"));
  1232. return SDD_INVLAID_ADDRESS;
  1233. }
  1234. if ((sector_cnt == 0) || (((sector + sector_cnt) > (sdd.card_desc.card_capacity << 1)))) {
  1235. SDD_TRACE(("Invalid sector address range!\r\n"));
  1236. return SDD_INVLAID_ADDR_RANGE;
  1237. }
  1238. if (GETB32(SDC_STATUS, SDC_SR_WRITE_PROT_BIT)) {
  1239. SDD_TRACE(("Card is write protected!\r\n"));
  1240. return SDD_WRITE_PROTECTED;
  1241. }
  1242. /* todo: sector size */
  1243. /* standby -> transfer */
  1244. SDD_TRACE(("- select_card\r\n"));
  1245. status = _sd_select_card(sdd.card_desc.rca);
  1246. if (status != HAL_SUCCESS)
  1247. goto _err_exit;
  1248. /* send SD command to setup write-block-size */
  1249. /* todo: assume sector size is 512 bytes */
  1250. SDD_TRACE(("- cmd16\r\n"));
  1251. status = _sd_cmd16(SDD_SECTOR_SIZE, &sd_rsp32);
  1252. if (status != HAL_SUCCESS)
  1253. goto _err_exit;
  1254. /* set SDC data timeout register */
  1255. OUT32(SDC_DATA_TIMER, sdd.card_desc.write_timeout_clks);
  1256. /* set SDC data length register */
  1257. OUT32(SDC_DATA_LEN, sector_cnt * SDD_SECTOR_SIZE);
  1258. /* set SDC data control register */
  1259. OUT32(SDC_DATA_CR, SDC_DATA_EN_MASK | SDC_DATA_WRITE_MASK | ((SDD_POWER_OF_SECTOR_SIZE << SDC_BLK_SIZE_SHIFT) & SDC_BLK_SIZE_MASK)); /* 2^9 = 512 bytes */
  1260. /* send SD command to write data */
  1261. SDD_TRACE(("- cmd25\r\n"));
  1262. if (sdd.card_desc.card_ccs == SDD_CCS_SD)
  1263. status = _sd_cmd25(sector * SDD_SECTOR_SIZE, &sd_rsp32); /* address unit is byte for SD */
  1264. else
  1265. status = _sd_cmd25(sector, &sd_rsp32); /* address unit is 512 bytes for SDHC */
  1266. if (status != HAL_SUCCESS)
  1267. goto _err_exit;
  1268. SDD_TRACE(("- wait ready to write out data\r\n"));
  1269. _nds_kwait(0x1000); /* hw need delay ? */
  1270. /* This method look not necessary for writing. */
  1271. // status = _sd_wait_receiving_state(sdd.card_desc.rca);
  1272. // if (status != HAL_SUCCESS) */
  1273. // goto _err_exit; */
  1274. /* per sector PIO write out */
  1275. OUT32(SDC_CLEAR, 0x3ff);
  1276. SDD_TRACE(("- write out data\r\n"));
  1277. while (sector_cnt-- > 0) {
  1278. /* per 32-bit word write out */
  1279. word_cnt = SDD_SECTOR_SIZE >> 2;
  1280. while (word_cnt > 0) {
  1281. SDD_TRACE(("- word_cnt: 0x%08lx\r\n", word_cnt));
  1282. fifo_depth = SDC_FIFO_WORD_DEPTH;
  1283. while ((fifo_depth-- > 0) && (word_cnt-- > 0)) {
  1284. /* CMD17/18/24/25 ACMD18/25 data are LSB first (little-endian) */
  1285. OUT32(SDC_DATA_WIN, *((uint32_t *) io_buff)); /* just mem-move so no data endian issue. */
  1286. io_buff += 4;
  1287. }
  1288. if (word_cnt == 0)
  1289. break;
  1290. retry = 0;
  1291. while (retry++ < SD_WRITE_MAX_RETRY_COUNT) {
  1292. sdc_status = IN32(SDC_STATUS);
  1293. if (sdc_status &
  1294. (SDC_SR_CARD_DETECT_MASK |
  1295. SDC_SR_DATA_TIMEOUT_MASK |
  1296. SDC_SR_DATA_CRC_FAIL_MASK)) {
  1297. status = SDD_WRITE_DATA_ERROR;
  1298. goto _err_exit;
  1299. }
  1300. if (sdc_status &
  1301. (SDC_SR_FIFO_URUN_MASK |
  1302. SDC_SR_DATA_END_MASK)) {
  1303. SETB32(SDC_CLEAR, SDC_FIFO_URUN_BIT);
  1304. retry = 0xffffffff; /* success */
  1305. break;
  1306. }
  1307. }
  1308. if (retry != 0xffffffff) {
  1309. /* wait data timeout */
  1310. SDD_TRACE(("- timeout, sdc_status: 0x%08lx\r\n", sdc_status));
  1311. // SDD_TRACE(("- wait again by polling CSR\r\n"));
  1312. // status = _sd_wait_receiving_state(sdd.card_desc.rca);
  1313. // if (status != HAL_SUCCESS)
  1314. goto _err_exit;
  1315. SDD_TRACE(("- card ready, sdc_status: 0x%08lx\r\n", IN32(SDC_STATUS)));
  1316. }
  1317. }
  1318. }
  1319. /* Wait host SDC shift-out FIFO data */
  1320. SDD_TRACE(("- final check sdc_status\r\n"));
  1321. retry = 0;
  1322. while (retry++ < SD_WRITE_MAX_RETRY_COUNT) {
  1323. sdc_status = IN32(SDC_STATUS);
  1324. if (sdc_status &
  1325. (SDC_SR_CARD_DETECT_MASK | SDC_SR_DATA_TIMEOUT_MASK |
  1326. SDC_SR_DATA_CRC_FAIL_MASK)) {
  1327. status = SDD_WRITE_DATA_ERROR;
  1328. goto _err_exit;
  1329. }
  1330. if ((sdc_status == 0) || (sdc_status & SDC_SR_DATA_END_MASK))
  1331. break;
  1332. }
  1333. /* Stop data transmission */
  1334. SDD_TRACE(("- stop transmission\r\n"));
  1335. status = _sd_stop_transmission(sdd.card_desc.rca);
  1336. /* FIXME this part is marked for qemu */
  1337. #if 0
  1338. if (status != HAL_SUCCESS)
  1339. goto _err_exit;
  1340. #endif
  1341. SDD_TRACE(("- data write completed\r\n"));
  1342. return HAL_SUCCESS;
  1343. _err_exit:
  1344. SDD_TRACE(("- error on data write\r\n"));
  1345. return status;
  1346. }
  1347. /*****************************************************************************
  1348. * FUNCTION
  1349. *
  1350. * _sdd_write_sectors_dma
  1351. *
  1352. * DESCRIPTION
  1353. *
  1354. * This function performs DMA data transfer to the SD memory card in
  1355. * multiple unit of sectors.
  1356. *
  1357. * NOTE
  1358. *
  1359. *
  1360. * INPUTS
  1361. *
  1362. * sector :
  1363. * sector_cnt :
  1364. * io_buff :
  1365. *
  1366. * OUTPUTS
  1367. *
  1368. * uint32_t : Returns HAL_SUCCESS if successful initialization,
  1369. * else positive value is SSPD-specific error code,
  1370. * else negative value is NU system error code.
  1371. *
  1372. ****************************************************************************/
  1373. static uint32_t _sdd_write_sectors_dma(uint32_t sector, uint32_t sector_cnt,
  1374. uint8_t * io_buff)
  1375. {
  1376. uint32_t status = SDD_INVALID_FUNCTION;
  1377. SD_R32 sd_rsp32;
  1378. uint32_t retry;
  1379. uint32_t sdc_status;
  1380. DMAD_DRB *drb;
  1381. #if 0
  1382. if (sector > (sdd.card_desc.card_capacity << 1)) {
  1383. SDD_TRACE(("Invalid sector address!\r\n"));
  1384. return SDD_INVLAID_ADDRESS;
  1385. }
  1386. if ((sector_cnt == 0) || (((sector + sector_cnt) > (sdd.card_desc.card_capacity << 1)))) {
  1387. SDD_TRACE(("Invalid sector address range!\r\n"));
  1388. return SDD_INVLAID_ADDR_RANGE;
  1389. }
  1390. #endif
  1391. if (GETB32(SDC_STATUS, SDC_SR_WRITE_PROT_BIT)) {
  1392. SDD_TRACE(("Card is write protected!\r\n"));
  1393. return SDD_WRITE_PROTECTED;
  1394. }
  1395. /* todo: sector size */
  1396. /* reset dam wait event */
  1397. // hal_set_semaphore(&sdd.dma_sem, 0);
  1398. /* standby -> transfer */
  1399. SDD_TRACE(("- select_card\r\n"));
  1400. status = _sd_select_card(sdd.card_desc.rca);
  1401. if (status != HAL_SUCCESS)
  1402. goto _safe_exit;
  1403. /* send SD command to setup write-block-size */
  1404. /* todo: assume sector size is 512 bytes */
  1405. SDD_TRACE(("- cmd16\r\n"));
  1406. status = _sd_cmd16(SDD_SECTOR_SIZE, &sd_rsp32);
  1407. if (status != HAL_SUCCESS)
  1408. goto _safe_exit;
  1409. /* set SDC data timeout register */
  1410. OUT32(SDC_DATA_TIMER, sdd.card_desc.write_timeout_clks);
  1411. /* set SDC data length register */
  1412. OUT32(SDC_DATA_LEN, sector_cnt * SDD_SECTOR_SIZE);
  1413. /* set SDC data control register */
  1414. OUT32(SDC_DATA_CR, SDC_DATA_EN_MASK | SDC_DATA_WRITE_MASK | SDC_DMA_EN_MASK | ((SDD_POWER_OF_SECTOR_SIZE << SDC_BLK_SIZE_SHIFT) & SDC_BLK_SIZE_MASK)); /* 2^9 = 512 bytes */
  1415. /* send SD command to write data */
  1416. SDD_TRACE(("- cmd25\r\n"));
  1417. if (sdd.card_desc.card_ccs == SDD_CCS_SD)
  1418. status = _sd_cmd25(sector * SDD_SECTOR_SIZE, &sd_rsp32); /* address unit is byte for SD */
  1419. else
  1420. status = _sd_cmd25(sector, &sd_rsp32); /* address unit is 512 bytes for SDHC */
  1421. if (status != HAL_SUCCESS)
  1422. goto _safe_exit;
  1423. SDD_TRACE(("- wait ready to write out data\r\n"));
  1424. _nds_kwait(0x1000); /* hw need delay ? */
  1425. /* This method look not necessary for writing. */
  1426. // status = _sd_wait_receiving_state(sdd.card_desc.rca);
  1427. // if (status != HAL_SUCCESS) */
  1428. // goto _err_exit; */
  1429. /* per sector DMA write out */
  1430. SDD_TRACE(("- write out data\r\n"));
  1431. dmad_apb_config_dir(&sdd.dma_ch, DMAD_DIR_A1_TO_A0);
  1432. if(hal_create_semaphore(&sdd.dma_sem, 0, 0) == HAL_FAILURE)
  1433. SDD_TRACE(("Failed to create dma semaphore\r\n"));
  1434. while (sector_cnt-- > 0) {
  1435. SDD_TRACE(("sector_cnt: %ld\r\n", sector_cnt));
  1436. /* Prepare DRB */
  1437. status = _dmad_alloc_drb(&sdd.dma_ch, &drb);
  1438. if (status != HAL_SUCCESS)
  1439. goto _safe_exit;
  1440. drb->src_addr = (void *)io_buff;
  1441. drb->dst_addr = (void *)SDC_DATA_WIN;
  1442. drb->req_size = SDD_SECTOR_SIZE >> 2; /* multiple counts of transfer width */
  1443. if (sector_cnt == 0)
  1444. drb->completion_sem = &sdd.dma_sem; /* Register DMA completion notification */
  1445. /* Submit DRB */
  1446. status = _dmad_submit_request(&sdd.dma_ch, drb);
  1447. if (status != HAL_SUCCESS)
  1448. goto _safe_exit;
  1449. /* Point to next buffer location */
  1450. io_buff += SDD_SECTOR_SIZE;
  1451. }
  1452. /*
  1453. * Wait DMA completion
  1454. * - method 1: sync with semaphore
  1455. * - method 2: check SDC status register SDC_STATUS[7]
  1456. */
  1457. status = hal_pend_semaphore(&sdd.dma_sem, 600); /* 6 sec */
  1458. /* Check waiting status */
  1459. if (status == HAL_ERR_TIMEOUT) {
  1460. SDD_TRACE(("- wait dma completion timeout (might not an error)\r\n"));
  1461. goto _safe_exit;
  1462. }
  1463. else if (status != HAL_SUCCESS) {
  1464. SDD_TRACE(("- wait dma completion failed\r\n"));
  1465. goto _safe_exit;
  1466. }
  1467. /* Wait host SDC shift-out FIFO data */
  1468. SDD_TRACE(("- final check sdc_status\r\n"));
  1469. retry = 0;
  1470. while (retry++ < SD_WRITE_MAX_RETRY_COUNT) {
  1471. sdc_status = IN32(SDC_STATUS);
  1472. if (sdc_status &
  1473. (SDC_SR_CARD_DETECT_MASK | SDC_SR_DATA_TIMEOUT_MASK |
  1474. SDC_SR_DATA_CRC_FAIL_MASK)) {
  1475. status = SDD_WRITE_DATA_ERROR;
  1476. goto _safe_exit;
  1477. }
  1478. if ((sdc_status == 0) || (sdc_status & SDC_SR_DATA_END_MASK))
  1479. break;
  1480. }
  1481. /* Stop data transmission */
  1482. SDD_TRACE(("- stop transmission\r\n"));
  1483. status = _sd_stop_transmission(sdd.card_desc.rca);
  1484. /* FIXME this part is marked for qemu */
  1485. #if 0
  1486. if (status != HAL_SUCCESS)
  1487. goto _safe_exit;
  1488. #endif
  1489. status = HAL_SUCCESS;
  1490. _safe_exit:
  1491. #if (SDD_DEBUG_TRACE)
  1492. if (status == HAL_SUCCESS)
  1493. SDD_TRACE(("- data read completed\r\n"));
  1494. else
  1495. SDD_TRACE(("- error on data read\r\n"));
  1496. #endif /* SDD_DEBUG_TRACE */
  1497. return status;
  1498. }
  1499. /*****************************************************************************
  1500. * FUNCTION
  1501. *
  1502. * _sdd_lisr
  1503. *
  1504. * DESCRIPTION
  1505. *
  1506. * This is the ISR that services SD card detection interrupt on the NDS32
  1507. * evb platform.
  1508. *
  1509. * NOTE
  1510. *
  1511. * Card Detection Procedures (LISR)
  1512. * LISR set HISR activation state flag
  1513. * LISR activates HISR
  1514. * call _sdd_cd_reset() to perform card insertion or removal tasks.
  1515. *
  1516. * Card Detection Procedures (_sdd_init)
  1517. * Perform basic SD controller register setup
  1518. * Checks SDC_SR_CARD_DETECT_BIT bit
  1519. * call _sdd_cd_reset() to perform card insertion or removal tasks.
  1520. *
  1521. * INPUTS
  1522. *
  1523. * vector : Interrupt vector number
  1524. *
  1525. * OUTPUTS
  1526. *
  1527. * none
  1528. *
  1529. ****************************************************************************/
  1530. void _sdd_lisr(int vector)
  1531. {
  1532. DEBUG(1, 1, "_sdd_lisr\r\n");
  1533. printf("hal_raise_bh0\n");
  1534. /* Fault invocation checking */
  1535. if (vector != IRQ_SDC_VECTOR )
  1536. hal_system_error(HAL_ERR_UNHANDLED_INTERRUPT);
  1537. /* Mask : Disable SDC interrupt */
  1538. hal_intc_irq_disable(IRQ_SDC_VECTOR);
  1539. /* Ack : Clean SDC interrupt pending */
  1540. hal_intc_irq_clean(IRQ_SDC_VECTOR);
  1541. printf("hal_raise_bh1\n");
  1542. if (GETB32(SDC_STATUS, SDC_SR_CARD_CHANGE_BIT)) {
  1543. SETB32(SDC_CLEAR, SDC_CARD_CHANGE_BIT);
  1544. /* Set HISR status register to get channel number */
  1545. sdd.hisr_as |= SDD_HISR_AS_CD;
  1546. printf("hal_raise_bh2\n");
  1547. hal_raise_bh(&sdd.hisr); /* Activate HISR to complete deferred tasks */
  1548. }
  1549. else {
  1550. printf("hal_raise_bh3\n");
  1551. /* todo: handle other interrupts. */
  1552. OUT32(SDC_CLEAR, SDC_CLEAR_ALL);
  1553. }
  1554. /* Unmask : Enable SDC interrupt */
  1555. hal_intc_irq_enable(IRQ_SDC_VECTOR);
  1556. }
  1557. /*****************************************************************************
  1558. * FUNCTION
  1559. *
  1560. * _sdd_hisr
  1561. *
  1562. * DESCRIPTION
  1563. *
  1564. * This is the HISR that services SD card detection interrupt on the NDS32
  1565. * evb platform.
  1566. *
  1567. * NOTE
  1568. *
  1569. *
  1570. * INPUTS
  1571. *
  1572. *
  1573. *
  1574. * OUTPUTS
  1575. *
  1576. * none
  1577. *
  1578. ****************************************************************************/
  1579. void _sdd_hisr(void *param)
  1580. {
  1581. hal_bh_t *bh = (hal_bh_t *)param;
  1582. uint32_t core_intl;
  1583. uint8_t hisr_as; /* HISR activation state - Card Detection */
  1584. while (1){
  1585. DEBUG(1, 1, "_sdd_hisr before\n");
  1586. hal_pend_semaphore(&bh->sem, HAL_SUSPEND);
  1587. /*
  1588. * Disable CPU interrupt
  1589. * Todo: frequently int-disable due to frequently HISR-call may cause problems?
  1590. */
  1591. core_intl = hal_global_int_ctl(HAL_DISABLE_INTERRUPTS);
  1592. /* Clone HISR activation state */
  1593. hisr_as = sdd.hisr_as;
  1594. sdd.hisr_as &= ~(uint32_t) SDD_HISR_AS_CD;
  1595. /* Enable CPU interrupt */
  1596. hal_global_int_ctl(core_intl);
  1597. /* Card detect initialization */
  1598. if (hisr_as & SDD_HISR_AS_CD) {
  1599. if (GETB32(SDC_STATUS, SDC_SR_CARD_DETECT_BIT)) {
  1600. SDD_TRACE(("SD card removed!\r\n"));
  1601. /* Perform card-remove tasks (turn off clock ...) */
  1602. _sdd_cd_reset(HAL_FALSE);
  1603. }
  1604. else {
  1605. SDD_TRACE(("SD card inserted!\r\n"));
  1606. /* Reset card and get device parameters */
  1607. _sdd_cd_reset(HAL_TRUE);
  1608. }
  1609. }
  1610. }
  1611. }
  1612. #if (SDD_VFS_SUPPORT)
  1613. //STATUS _sdd_read_sectors(SDD_IOCTL_READ_SECTORS_PARAM *iop);
  1614. STATUS _sdd_read_sectors_bdev(NDS_BDEV *bdev, UINT32 sector, UINT32 sector_count, void *buffer)
  1615. {
  1616. STATUS io_status;
  1617. SDD_DEVICE sdd_dev; // FIXME, NDS_SD_ReadSectors doesn't use this argument actully
  1618. BDEV_TRACE(("_sdd_read_sectors_bdev()\r\n"));
  1619. BDEV_TRACE((" read start at sector (0x%08lx + 0x%08lx = 0x%08lx) count (0x%08lx)\r\n",
  1620. bdev->start, sector, bdev->start + sector, sector_count));
  1621. #ifndef CONFIG_PLAT_QEMU
  1622. io_status = NDS_SD_ReadSectors(&sdd_dev, bdev->start + sector, sector_count, 512, buffer);
  1623. #else
  1624. io_status = NDS_SD_ReadSectors(&sdd_dev, sector, sector_count, 512, buffer);
  1625. #endif
  1626. #if 0
  1627. if (NU_Current_Task_Pointer() != HAL_NULL)
  1628. {
  1629. // obtain exclusive access to driver
  1630. request.nu_function = NU_ASSIGN;
  1631. request.nu_timeout = NU_SUSPEND;
  1632. status = NU_Request_Driver(&sdd_dcb, &request);
  1633. if (status != NU_SUCCESS)
  1634. return status;
  1635. }
  1636. // perform i/o operation
  1637. BDEV_TRACE((" read start at sector (0x%08lx + 0x%08lx = 0x%08lx) count (0x%08lx)\r\n",
  1638. bdev->start, sector, bdev->start + sector, sector_count));
  1639. iop.lba_sector = bdev->start + sector;
  1640. iop.sector_count = sector_count;
  1641. iop.sector_size = SDD_SECTOR_SIZE;
  1642. iop.io_buff = buffer;
  1643. io_status = _sdd_read_sectors(&iop);
  1644. if (NU_Current_Task_Pointer() != HAL_NULL)
  1645. {
  1646. // release exclusive access to driver
  1647. request.nu_function = NU_RELEASE;
  1648. status = NU_Request_Driver(&sdd_dcb, &request);
  1649. if (status != NU_SUCCESS)
  1650. return status;
  1651. }
  1652. #endif
  1653. return io_status;
  1654. }
  1655. //STATUS _sdd_write_sectors(SDD_IOCTL_WRITE_SECTORS_PARAM *iop);
  1656. STATUS _sdd_write_sectors_bdev(NDS_BDEV *bdev, UINT32 sector, UINT32 sector_count, void *buffer)
  1657. {
  1658. STATUS io_status;
  1659. SDD_DEVICE sdd_dev; // FIXME, NDS_SD_ReadSectors doesn't use this argument actully
  1660. BDEV_TRACE(("_sdd_write_sectors_bdev()\r\n"));
  1661. #ifndef CONFIG_PLAT_QEMU
  1662. io_status = NDS_SD_WriteSectors(&sdd_dev, bdev->start + sector, sector_count, 512, buffer);
  1663. #else
  1664. io_status = NDS_SD_WriteSectors(&sdd_dev, sector, sector_count, 512, buffer);
  1665. #endif
  1666. #if 0
  1667. if (NU_Current_Task_Pointer() != HAL_NULL)
  1668. {
  1669. // obtain exclusive access to driver
  1670. request.nu_function = NU_ASSIGN;
  1671. request.nu_timeout = NU_SUSPEND;
  1672. status = NU_Request_Driver(&sdd_dcb, &request);
  1673. if (status != NU_SUCCESS)
  1674. return status;
  1675. }
  1676. // perform i/o operation
  1677. BDEV_TRACE((" write start at sector (0x%08lx + 0x%08lx = 0x%08lx) count (0x%08lx)\r\n",
  1678. bdev->start, sector, bdev->start + sector, sector_count));
  1679. iop.lba_sector = bdev->start + sector;
  1680. iop.sector_count = sector_count;
  1681. iop.sector_size = SDD_SECTOR_SIZE;
  1682. iop.io_buff = buffer;
  1683. io_status = _sdd_write_sectors(&iop);
  1684. if (NU_Current_Task_Pointer() != HAL_NULL)
  1685. {
  1686. // release exclusive access to driver
  1687. request.nu_function = NU_RELEASE;
  1688. status = NU_Request_Driver(&sdd_dcb, &request);
  1689. if (status != NU_SUCCESS)
  1690. return status;
  1691. }
  1692. #endif
  1693. BDEV_TRACE((" status (0x%08lx)\r\n", io_status));
  1694. return io_status;
  1695. }
  1696. #endif // SDD_VFS_SUPPORT
  1697. /*****************************************************************************
  1698. * FUNCTION
  1699. *
  1700. * _sdd_init
  1701. *
  1702. * DESCRIPTION
  1703. *
  1704. * This function initializes the SDC device.
  1705. *
  1706. * NOTE
  1707. *
  1708. * SD/MEM : PC-Card Memory mode, PC-Card I/O mode, True-IDE.
  1709. * SDIO : Todo.
  1710. * SDHC : Not supported.
  1711. * MMC : Todo.
  1712. *
  1713. * Todo : Resource leaks is not recovered if error happens
  1714. * during init process. Client currently has to do
  1715. * TERMINATE request anyway, if driver load/unload
  1716. * resource control is a necessary, no-matter the
  1717. * initialization process is successful or not.
  1718. *
  1719. * INPUTS
  1720. *
  1721. * sdd_dev : user device struct
  1722. *
  1723. * OUTPUTS
  1724. *
  1725. * uint32_t : Returns HAL_SUCCESS if successful initialization,
  1726. * else positive value is SDD-specific error code,
  1727. * else negative value is NU system error code.
  1728. *
  1729. ****************************************************************************/
  1730. static uint32_t _sdd_init(SDD_DEVICE * sdd_dev)
  1731. {
  1732. uint32_t status = HAL_SUCCESS;
  1733. uint32_t core_intl;
  1734. SDD_TRACE(("_sdd_init()\r\n"));
  1735. /* Perform Parameter Checking */
  1736. #if (!SDD_SMALL_FOOTPRINT)
  1737. /* Check supplemental init structure */
  1738. if (sdd_dev == HAL_NULL) {
  1739. SDD_TRACE(("null sdd_dev!\r\n"));
  1740. return HAL_ERR_INVALID_POINTER;
  1741. }
  1742. /* Check duplicated device initialization */
  1743. if (sdd.valid != 0) {
  1744. /* Error if the device has been initialized */
  1745. SDD_TRACE(("sdd.valid is non-zero!\r\n"));
  1746. return SDD_INVALID_INIT;
  1747. }
  1748. #endif /* (!SDD_SMALL_FOOTPRINT) */
  1749. /* Initialize SDC driver resources */
  1750. /* Allocate DMA channel if user requested static DMA channel mode */
  1751. switch (sdd_dev->dma) {
  1752. case SDD_DMA_NONE:
  1753. case SDD_DMA_DCH:
  1754. break;
  1755. case SDD_DMA_SCH:
  1756. status = _sdd_alloc_dma_channel();
  1757. if (status != HAL_SUCCESS)
  1758. return status;
  1759. break;
  1760. default:
  1761. return SDD_INVALID_PARAMETER;
  1762. }
  1763. sdd.dma = sdd_dev->dma;
  1764. /*
  1765. * Allocate mutex (a semaphore with init count == 1)
  1766. * for driver access control
  1767. */
  1768. status = hal_create_mutex(&sdd.semaphore, "sdd_sem");
  1769. if (status != HAL_SUCCESS) {
  1770. SDD_TRACE(("Failed to create SD driver semaphore!\r\n"));
  1771. return status;
  1772. }
  1773. /*
  1774. * Allocate synchronization object for SDD to receive DMA completion notfication
  1775. * (init count is 0 so any obtain have to wait first)
  1776. */
  1777. status = hal_create_semaphore(&sdd.dma_sem, 0, 0);
  1778. if (status != HAL_SUCCESS) {
  1779. SDD_TRACE(("Failed to allocate SD driver dma semaphore!\r\n"));
  1780. hal_destroy_mutex(&sdd.semaphore);
  1781. return status;
  1782. }
  1783. /* Register LISR to receive SDC events */
  1784. if (sdd.lisr_registered == 0) {
  1785. /* Register LISR for SDC events interrupt */
  1786. status = hal_register_isr(IRQ_SDC_VECTOR, _sdd_lisr, (void*)0);
  1787. if (status != HAL_SUCCESS) {
  1788. SDD_TRACE(("Failed to register SD driver LISR!\r\n"));
  1789. hal_destroy_mutex(&sdd.semaphore);
  1790. hal_destroy_semaphore(&sdd.dma_sem);
  1791. return status;
  1792. }
  1793. sdd.lisr_registered = 1;
  1794. }
  1795. /* Register HISR to perform deferred SDC ISR tasks */
  1796. if (sdd.hisr_registered == 0) {
  1797. sdd.hisr.th.fn = _sdd_hisr;
  1798. sdd.hisr.th.arg = &sdd.hisr;
  1799. sdd.hisr.th.ptos = &sdd_hisr_stack[SDD_HISR_STACK_SIZE];
  1800. sdd.hisr.th.stack_size = sizeof(sdd_hisr_stack);
  1801. sdd.hisr.th.prio = CONFIG_SDD_HISR_PRIORITY;
  1802. sdd.hisr.th.name = "SD BH";
  1803. status = hal_create_bh(&sdd.hisr);
  1804. if (status != HAL_SUCCESS) {
  1805. DEBUG(1, 1, "Failed to create SD driver HISR!\r\n");
  1806. hal_destroy_mutex(&sdd.semaphore);
  1807. hal_destroy_semaphore(&sdd.dma_sem);
  1808. return status;
  1809. }
  1810. sdd.hisr_registered = 1;
  1811. }
  1812. /* Update driver data */
  1813. #if (SDD_VFS_SUPPORT)
  1814. // Init SDD-specific bdev object
  1815. sdd_bdev.next = HAL_NULL;
  1816. sdd_bdev.dev_id = 0;
  1817. sdd_bdev.vol_id = 0;
  1818. sdd_bdev.type = 0;
  1819. sdd_bdev.start = 0;
  1820. sdd_bdev.blocks = 0;
  1821. sdd_bdev.propagate_event = HAL_NULL;
  1822. sdd_bdev.read_sectors = _sdd_read_sectors_bdev;
  1823. sdd_bdev.write_sectors = _sdd_write_sectors_bdev;
  1824. sdd_dev->bdev_id = &sdd_bdev;
  1825. #endif // SDD_VFS_SUPPORT
  1826. /*
  1827. * Initialize SDC device
  1828. *
  1829. * SD card initialization and identification are performed either at
  1830. * - when the card was inserted (i.e., triggered from ISR and HISR), or
  1831. * - when this init routine was invoked and the card was already in the slot.
  1832. */
  1833. /* Disable CPU interrupt */
  1834. core_intl = hal_global_int_ctl(HAL_DISABLE_INTERRUPTS);
  1835. /* - Disable SDC interrupt */
  1836. hal_intc_irq_disable(IRQ_SDC_VECTOR);
  1837. /* - Clear SDC interrupt status */
  1838. hal_intc_irq_clean(IRQ_SDC_VECTOR);
  1839. /* - Setup SDC interrupt trigger mode - level trigger */
  1840. /* - Setup SDC interrupt trigger level - assert high */
  1841. hal_intc_irq_config(IRQ_SDC_VECTOR,IRQ_LEVEL_TRIGGER, IRQ_ACTIVE_HIGH);
  1842. /* - Enable SDC interrupt */
  1843. hal_intc_irq_enable(IRQ_SDC_VECTOR);
  1844. #if 0
  1845. #if(NO_EXTERNAL_INT_CTL==1)
  1846. /* FIXME
  1847. * - Setup SDC interrupt trigger mode */
  1848. /* - Enable SDC interrupt */
  1849. SR_SETB32(NDS32_SR_INT_MASK2,IRQ_SDC_VECTOR );
  1850. #else
  1851. /* INTC */
  1852. /* - Disable SDC interrupt */
  1853. CLRB32(INTC_HW1_ER, IRQ_SDC_VECTOR);
  1854. /* - Clear SDC interrupt status */
  1855. SETB32(INTC_HW1_CLR, IRQ_SDC_VECTOR);
  1856. /* - Setup SDC interrupt trigger mode - level trigger */
  1857. CLRB32(INTC_HW1_TMR, IRQ_SDC_VECTOR);
  1858. /* - Setup SDC interrupt trigger level - assert high */
  1859. CLRB32(INTC_HW1_TLR, IRQ_SDC_VECTOR);
  1860. /* - Enable SDC interrupt */
  1861. SETB32(INTC_HW1_ER, IRQ_SDC_VECTOR);
  1862. #endif
  1863. #endif
  1864. /* APBMCLKOFF */
  1865. /* todo */
  1866. /*
  1867. * SDC_PWR_CTL
  1868. * SD_POWER 0 (default: 0x00) (leave bootup default?)
  1869. * SD_POWER_ON 0 (off) (default: 0x10)
  1870. */
  1871. CLRB32(SDC_PWR_CTL, SDC_SD_POWER_ON_BIT);
  1872. _nds_kwait(0x4000);
  1873. /*
  1874. * SDC_CLK_CTL
  1875. * CLK_DIV 0x7f (default: 0x7f, result in 97.66K ~ 683.59K SD bus freq)
  1876. * CLK_SD 1 (default: 1 (SD))
  1877. * CLK_DIS 1 (off) (default: 0x01)
  1878. */
  1879. OUT32(SDC_CLK_CTL, (SDC_CLK_OFF << SDC_CLK_DIS_BIT) |
  1880. (SDC_CLK_SD << SDC_CLK_SD_BIT) | SDC_CLK_DIV_MASK);
  1881. /*
  1882. * SDC_MASK (note: spec "mask" means "enable", spec uses wrong term to describe this register)
  1883. * RSP_CRC_FAIL mask int
  1884. * DATA_CRC_FAIL mask int
  1885. * RSP_TIMEOUT mask int
  1886. * DATA_TIMEOUT mask int
  1887. * RSP_CRC_OK mask int
  1888. * DATA_CRC_OK mask int
  1889. * CMD_SENT mask int
  1890. * DATA_END mask int
  1891. * FIFO_U_RUN mask int
  1892. * FIFO_O_RUN mask int
  1893. * CARD_CHANGE enable int
  1894. */
  1895. OUT32(SDC_MASK, SDC_CARD_CHANGE_MASK);
  1896. /* SDC_CLEAR */
  1897. /* Clear all */
  1898. OUT32(SDC_CLEAR, SDC_CLEAR_ALL);
  1899. /*
  1900. * Following host controller register register setting needs information
  1901. * from the card, hence is postponed in the card initialization and
  1902. * identification routine.
  1903. *
  1904. * Data setup (need CSD/SCR)
  1905. *
  1906. * SDC_DATA_CR (setup before data transfer)
  1907. * SDC_DATA_TIMER (TAAC/NSAC)
  1908. * SDC_DATA_LEN (READ/WRITE/ERASE_BL_LEN, SECTOR_SIZE)
  1909. * SDC_BUS_WIDTH (SCR::SD_BUS_WIDTHS)
  1910. *
  1911. * Power/Clock settings (need OCR)
  1912. *
  1913. * SDC_PWR_CTL (OCR::Vdd)
  1914. * SDC_CLK_CTL (fod, fpp)
  1915. */
  1916. /*
  1917. * Detect card and perform card-detection initialization, if the is
  1918. * already in the slot before we re-enable interrupt.
  1919. */
  1920. if (GETB32(SDC_STATUS, SDC_SR_CARD_DETECT_BIT)) {
  1921. /* Perform card-remove tasks (turn off clock ...) */
  1922. SDD_TRACE(("SD card is not in slot!\r\n"));
  1923. _sdd_cd_reset(HAL_FALSE);
  1924. }
  1925. else {
  1926. /* Reset card and get device parameters */
  1927. SDD_TRACE(("SD card is in slot!\r\n"));
  1928. _sdd_cd_reset(HAL_TRUE);
  1929. //_sdd_cd_reset(HAL_TRUE);
  1930. //_sdd_cd_reset(HAL_TRUE);
  1931. //_sdd_cd_reset(HAL_TRUE);
  1932. // FIXME
  1933. }
  1934. /* Restore CPU interrupt controller to previous level */
  1935. hal_global_int_ctl(core_intl);
  1936. /* Mark driver state as valid */
  1937. sdd.valid = 1;
  1938. return HAL_SUCCESS;
  1939. }
  1940. /*****************************************************************************
  1941. * FUNCTION
  1942. *
  1943. * _sdd_unload
  1944. *
  1945. * DESCRIPTION
  1946. *
  1947. * Remove all the device resource so the driver could be removed safely.
  1948. *
  1949. * NOTE
  1950. *
  1951. * INPUTS
  1952. *
  1953. * none
  1954. *
  1955. * OUTPUTS
  1956. *
  1957. * uint32_t : Returns HAL_SUCCESS if successful initialization,
  1958. * else positive value is SDD-specific error code,
  1959. * else negative value is NU system error code.
  1960. *
  1961. ****************************************************************************/
  1962. static uint32_t _sdd_unload(void)
  1963. {
  1964. uint32_t status;
  1965. #if (!SDD_SMALL_FOOTPRINT)
  1966. /* Validate to terminate an already initialized driver state */
  1967. if (sdd.valid == 0)
  1968. return HAL_ERR_INVALID_DRIVER;
  1969. #endif /* (!SDD_SMALL_FOOTPRINT) */
  1970. // Notify file system
  1971. #if (SDD_VFS_SUPPORT)
  1972. if (sdd_bdev.propagate_event != HAL_NULL)
  1973. sdd_bdev.propagate_event(&sdd_bdev, NDSBDEV_DEVICE_UNPLUG, HAL_NULL);
  1974. sdd_bdev.next = HAL_NULL;
  1975. sdd_bdev.dev_id = 0;
  1976. sdd_bdev.vol_id = 0;
  1977. sdd_bdev.type = 0;
  1978. sdd_bdev.start = 0;
  1979. sdd_bdev.blocks = 0;
  1980. sdd_bdev.propagate_event = HAL_NULL;
  1981. sdd_bdev.read_sectors = HAL_NULL;
  1982. sdd_bdev.write_sectors = HAL_NULL;
  1983. #endif // SDD_VFS_SUPPORT
  1984. /* Shutdown device operation */
  1985. /* Release driver resources */
  1986. if (sdd.dma == SDD_DMA_SCH)
  1987. _sdd_free_dma_channel();
  1988. status = hal_destroy_bh(&sdd.hisr);
  1989. if (status != HAL_SUCCESS)
  1990. return status;
  1991. status = hal_destroy_semaphore(&sdd.dma_sem);
  1992. if (status != HAL_SUCCESS)
  1993. return status;
  1994. status = hal_destroy_mutex(&sdd.semaphore);
  1995. if (status != HAL_SUCCESS)
  1996. return status;
  1997. sdd.valid = 0;
  1998. return HAL_SUCCESS;
  1999. }
  2000. /*****************************************************************************
  2001. * FUNCTION
  2002. *
  2003. * _sdd_lock
  2004. *
  2005. * DESCRIPTION
  2006. *
  2007. * Obtain exclusive access to the devcie driver.
  2008. *
  2009. * NOTE
  2010. *
  2011. * INPUTS
  2012. *
  2013. * none
  2014. *
  2015. * OUTPUTS
  2016. *
  2017. * uint32_t : Returns HAL_SUCCESS if successful initialization,
  2018. * else positive value is SDD-specific error code,
  2019. * else negative value is NU system error code.
  2020. *
  2021. ****************************************************************************/
  2022. static inline uint32_t _sdd_lock(void)
  2023. {
  2024. #if (!SDD_SMALL_FOOTPRINT)
  2025. if (sdd.valid == 0)
  2026. return HAL_ERR_INVALID_DRIVER;
  2027. #endif /* (!SDD_SMALL_FOOTPRINT) */
  2028. return hal_wait_for_mutex(&sdd.semaphore, HAL_SUSPEND);
  2029. }
  2030. /*****************************************************************************
  2031. * FUNCTION
  2032. *
  2033. * _sdd_unlock
  2034. *
  2035. * DESCRIPTION
  2036. *
  2037. * Release exclusive access to the device driver.
  2038. *
  2039. * NOTE
  2040. *
  2041. * INPUTS
  2042. *
  2043. * none
  2044. *
  2045. * OUTPUTS
  2046. *
  2047. * uint32_t : Returns HAL_SUCCESS if successful initialization,
  2048. * else positive value is SDD-specific error code,
  2049. * else negative value is NU system error code.
  2050. *
  2051. ****************************************************************************/
  2052. static inline uint32_t _sdd_unlock(void)
  2053. {
  2054. #if (!SDD_SMALL_FOOTPRINT)
  2055. if (sdd.valid == 0)
  2056. return HAL_ERR_INVALID_DRIVER;
  2057. #endif /* (!SDD_SMALL_FOOTPRINT) */
  2058. return hal_release_mutex(&sdd.semaphore);
  2059. }
  2060. /*****************************************************************************
  2061. * FUNCTION
  2062. *
  2063. * _sdd_read_sectors
  2064. *
  2065. * DESCRIPTION
  2066. *
  2067. * Read sectors of data from the card. This is the DMA/PIO mode data-
  2068. * read dispatch function for client IOCTL request.
  2069. *
  2070. * NOTE
  2071. *
  2072. * INPUTS
  2073. *
  2074. * iop : pointer to SDD_IOCTL_READ_SECTORS_PARAM struct which
  2075. * specifies the IOCTL parameters.
  2076. *
  2077. * OUTPUTS
  2078. *
  2079. * uint32_t : Returns HAL_SUCCESS if successful initialization,
  2080. * else positive value is SDD-specific error code,
  2081. * else negative value is NU system error code.
  2082. *
  2083. ****************************************************************************/
  2084. static uint32_t _sdd_read_sectors(SDD_IOCTL_READ_SECTORS_PARAM * iop)
  2085. {
  2086. uint32_t sector = iop->lba_sector;
  2087. uint32_t sector_cnt = iop->sector_count;
  2088. uint8_t *io_buff = (uint8_t *) iop->io_buff;
  2089. uint32_t status;
  2090. uint32_t core_intl;
  2091. uint32_t rca = 0;
  2092. SDD_TRACE(("\r\n_sdd_read_sectors\r\n"));
  2093. /* Disable CPU interrupt */
  2094. core_intl = hal_global_int_ctl(HAL_DISABLE_INTERRUPTS);
  2095. /* Check if SD card has been initialized to transfer state */
  2096. rca = sdd.card_desc.rca;
  2097. /* Restore CPU interrupt controller to previous level */
  2098. hal_global_int_ctl(core_intl);
  2099. /* Reject if SD card is not initialized to transfer state */
  2100. if (rca == 0)
  2101. return SDD_INVALID_INIT;
  2102. /* Data transfer ... */
  2103. if ((sdd.dma != SDD_DMA_NONE) /* && (hal_current() != HAL_NULL) */ ) {
  2104. SDD_TRACE(("dma - sector(%ld) counts(%ld)\r\n", sector,
  2105. sector_cnt));
  2106. if (sdd.dma == SDD_DMA_DCH) {
  2107. status = _sdd_alloc_dma_channel();
  2108. if (status != HAL_SUCCESS)
  2109. return status;
  2110. }
  2111. while (sector_cnt > 0) {
  2112. /*
  2113. * SDC data length register max is 24 bits (32768 sectors).
  2114. * Divided by 2 for safe in case sector size is larger than 512 bytes.
  2115. * (so max sector size should be less than 1024 bytes)
  2116. */
  2117. if (sector_cnt >= 16384) {
  2118. /* Use SD multiple block transfer for sectors. */
  2119. status = _sdd_read_sectors_dma(sector, 16384, io_buff);
  2120. if (status != HAL_SUCCESS) {
  2121. /* Release DMA channel */
  2122. if (sdd.dma == SDD_DMA_DCH)
  2123. _sdd_free_dma_channel();
  2124. return status;
  2125. }
  2126. sector += 16384;
  2127. sector_cnt -= 16384;
  2128. io_buff += SDD_SECTOR_SIZE * 16384;
  2129. }
  2130. else {
  2131. /* Use SD multiple block transfer for all sectors. */
  2132. status = _sdd_read_sectors_dma(sector, sector_cnt, io_buff);
  2133. sector_cnt = 0;
  2134. }
  2135. }
  2136. /* Wait for DMA completion signal */
  2137. /* Release DMA channel */
  2138. if (sdd.dma == SDD_DMA_DCH)
  2139. _sdd_free_dma_channel();
  2140. }
  2141. else {
  2142. /* PIO mode data transfer */
  2143. SDD_TRACE(("pio - sector(%ld) counts(%ld)\r\n", sector, sector_cnt));
  2144. while (sector_cnt > 0) {
  2145. /*
  2146. * SDC data length register max is 24 bits (32768 sectors).
  2147. * Divided by 2 for safe in case sector size is larger than 512 bytes.
  2148. * (so max sector size should be less than 1024 bytes)
  2149. */
  2150. if (sector_cnt >= 16384) {
  2151. /* Use SD multiple block transfer for sectors. */
  2152. status = _sdd_read_sectors_pio(sector, 16384, io_buff);
  2153. if (status != HAL_SUCCESS)
  2154. return status;
  2155. sector += 16384;
  2156. sector_cnt -= 16384;
  2157. io_buff += SDD_SECTOR_SIZE * 16384;
  2158. }
  2159. else {
  2160. /* Use SD multiple block transfer for all sectors. */
  2161. status = _sdd_read_sectors_pio(sector, sector_cnt, io_buff);
  2162. sector_cnt = 0;
  2163. }
  2164. }
  2165. }
  2166. return HAL_SUCCESS;
  2167. }
  2168. /*****************************************************************************
  2169. * FUNCTION
  2170. *
  2171. * _sdd_write_sectors
  2172. *
  2173. * DESCRIPTION
  2174. *
  2175. * Write sectors of data to the card. This is the DMA/PIO mode data-
  2176. * write dispatch function for client IOCTL request.
  2177. *
  2178. * NOTE
  2179. *
  2180. * INPUTS
  2181. *
  2182. * iop : pointer to SDD_IOCTL_READ_SECTORS_PARAM struct which
  2183. * specifies the IOCTL parameters.
  2184. *
  2185. * OUTPUTS
  2186. *
  2187. * uint32_t : Returns HAL_SUCCESS if successful initialization,
  2188. * else positive value is SDD-specific error code,
  2189. * else negative value is NU system error code.
  2190. *
  2191. ****************************************************************************/
  2192. static uint32_t _sdd_write_sectors(SDD_IOCTL_WRITE_SECTORS_PARAM * iop)
  2193. {
  2194. uint32_t sector = iop->lba_sector;
  2195. uint32_t sector_cnt = iop->sector_count;
  2196. uint8_t *io_buff = (uint8_t *) iop->io_buff;
  2197. uint32_t status;
  2198. uint32_t core_intl;
  2199. uint32_t rca = 0;
  2200. SDD_TRACE(("\r\n_sdd_write_sectors\r\n"));
  2201. /* Disable CPU interrupt */
  2202. core_intl = hal_global_int_ctl(HAL_DISABLE_INTERRUPTS);
  2203. /* Check if SD card has been initialized to transfer state */
  2204. rca = sdd.card_desc.rca;
  2205. /* Restore CPU interrupt controller to previous level */
  2206. hal_global_int_ctl(core_intl);
  2207. /* Reject if SD card is not initialized to transfer state */
  2208. if (rca == 0)
  2209. return SDD_INVALID_INIT;
  2210. /* Data transfer ... */
  2211. if ((sdd.dma != SDD_DMA_NONE) /* && (hal_current() != HAL_NULL) */ ) {
  2212. SDD_TRACE(("dma - sector(%ld) counts(%ld)\r\n", sector,
  2213. sector_cnt));
  2214. if (sdd.dma != SDD_DMA_SCH) {
  2215. status = _sdd_alloc_dma_channel();
  2216. if (status != HAL_SUCCESS)
  2217. return status;
  2218. }
  2219. while (sector_cnt > 0) {
  2220. /*
  2221. * SDC data length register max is 24 bits (32768 sectors).
  2222. * Divided by 2 for safe in case sector size is larger than 512 bytes.
  2223. * (so max sector size should be less than 1024 bytes)
  2224. */
  2225. if (sector_cnt >= 16384) {
  2226. /* Use SD multiple block transfer for sectors. */
  2227. status = _sdd_write_sectors_dma(sector, 16384, io_buff);
  2228. if (status != HAL_SUCCESS) {
  2229. if (sdd.dma == SDD_DMA_DCH)
  2230. _sdd_free_dma_channel();
  2231. return status;
  2232. }
  2233. sector += 16384;
  2234. sector_cnt -= 16384;
  2235. io_buff += SDD_SECTOR_SIZE * 16384;
  2236. }
  2237. else {
  2238. /* Use SD multiple block transfer for all sectors. */
  2239. status = _sdd_write_sectors_dma(sector, sector_cnt, io_buff);
  2240. sector_cnt = 0;
  2241. }
  2242. }
  2243. /* Wait for DMA completion signal */
  2244. /* Release DMA channel */
  2245. if (sdd.dma == SDD_DMA_DCH)
  2246. _sdd_free_dma_channel();
  2247. }
  2248. else {
  2249. /* PIO mode data transfer */
  2250. SDD_TRACE(("pio - sector(%ld) counts(%ld)\r\n", sector,
  2251. sector_cnt));
  2252. while (sector_cnt > 0) {
  2253. /*
  2254. * SDC data length register max is 24 bits (32768 sectors).
  2255. * Divided by 2 for safe in case sector size is larger than 512 bytes.
  2256. * (so max sector size should be less than 1024 bytes)
  2257. */
  2258. if (sector_cnt >= 16384) {
  2259. /* Use SD multiple block transfer for sectors. */
  2260. status = _sdd_write_sectors_pio(sector, 16384, io_buff);
  2261. if (status != HAL_SUCCESS)
  2262. return status;
  2263. sector += 16384;
  2264. sector_cnt -= 16384;
  2265. io_buff += SDD_SECTOR_SIZE * 16384;
  2266. }
  2267. else {
  2268. /* Use SD multiple block transfer for all sectors. */
  2269. status = _sdd_write_sectors_pio(sector, sector_cnt, io_buff);
  2270. sector_cnt = 0;
  2271. }
  2272. }
  2273. }
  2274. return HAL_SUCCESS;
  2275. }
  2276. /*****************************************************************************
  2277. * FUNCTION
  2278. *
  2279. * _sdd_ioctl
  2280. *
  2281. * DESCRIPTION
  2282. *
  2283. * This function execute I/O control commands to SDC driver.
  2284. *
  2285. * NOTE
  2286. *
  2287. *
  2288. * INPUTS
  2289. *
  2290. * driver : device object/control_block
  2291. * request : request function and supplemental parameters
  2292. *
  2293. * OUTPUTS
  2294. *
  2295. * uint32_t : Returns HAL_SUCCESS if successful initialization,
  2296. * else positive value is SDD-specific error code,
  2297. * else negative value is NU system error code.
  2298. *
  2299. ****************************************************************************/
  2300. static inline uint32_t _sdd_ioctl(uint32_t ioctl, void *param)
  2301. {
  2302. uint32_t status = HAL_SUCCESS;
  2303. #if (!SDD_SMALL_FOOTPRINT)
  2304. /* Validate to terminate an already initialized driver state */
  2305. if (sdd.valid == 0)
  2306. return HAL_ERR_INVALID_DRIVER;
  2307. #endif /* (!UARTD_SMALL_FOOTPRINT) */
  2308. if (param == HAL_NULL)
  2309. return SDD_INVALID_PARAMETER;
  2310. switch (ioctl) {
  2311. case SDD_IOCTL_READ_SECTORS:
  2312. /* Parameter: pointer to SDD_IOCTL_READ_SECTORS_PARAM struct */
  2313. status = _sdd_read_sectors((SDD_IOCTL_READ_SECTORS_PARAM *) param);
  2314. break;
  2315. case SDD_IOCTL_WRITE_SECTORS:
  2316. /* Parameter: pointer to SDD_IOCTL_READ_SECTORS_PARAM struct */
  2317. status = _sdd_write_sectors((SDD_IOCTL_WRITE_SECTORS_PARAM *) param);
  2318. break;
  2319. default:
  2320. status = SDD_INVALID_IOCTL;
  2321. break;
  2322. }
  2323. return status;
  2324. }
  2325. /*****************************************************************************
  2326. * FUNCTION
  2327. *
  2328. * NDS_SD_Init
  2329. *
  2330. * DESCRIPTION
  2331. *
  2332. * This function initializes the SD device.
  2333. *
  2334. * INPUTS
  2335. *
  2336. * sdd_dev : User mode SDD device structure.
  2337. *
  2338. * OUTPUTS
  2339. *
  2340. * uint32_t : Returns HAL_SUCCESS if successful initialization,
  2341. * else a negative value is returned.
  2342. *
  2343. ****************************************************************************/
  2344. uint32_t NDS_SD_Init(SDD_DEVICE * sdd_dev)
  2345. {
  2346. return _sdd_init(sdd_dev);
  2347. }
  2348. /*****************************************************************************
  2349. * FUNCTION
  2350. * NDS_SD_Unload
  2351. *
  2352. * DESCRIPTION
  2353. *
  2354. * This function terminates all SD transaction and unload the driver.
  2355. *
  2356. * INPUTS
  2357. *
  2358. * None.
  2359. *
  2360. * OUTPUTS
  2361. *
  2362. * None.
  2363. *
  2364. ****************************************************************************/
  2365. void NDS_SD_Unload()
  2366. {
  2367. _sdd_unload();
  2368. }
  2369. /*****************************************************************************
  2370. * FUNCTION
  2371. *
  2372. * NDS_SD_ReadSectors
  2373. *
  2374. * DESCRIPTION
  2375. *
  2376. * This function read sectors of data from the SD memory card.
  2377. *
  2378. * INPUTS
  2379. *
  2380. * sdd_dev : User mode SDD device structure.
  2381. * sector : The starting LBA sector number.
  2382. * sector_count : Number of sectors to read.
  2383. * sector_size : Size of a sector in bytes.
  2384. * buffer : Pointer to a user buffer to hold the readback data.
  2385. *
  2386. * OUTPUTS
  2387. *
  2388. * uint32_t : Returns HAL_SUCCESS if successful initialization,
  2389. * else a negative value is returned.
  2390. *
  2391. ****************************************************************************/
  2392. uint32_t NDS_SD_ReadSectors(SDD_DEVICE * sdd_dev, uint32_t sector,
  2393. uint32_t sector_count, uint32_t sector_size,
  2394. void *buffer)
  2395. {
  2396. uint32_t status;
  2397. uint32_t io_status;
  2398. SDD_IOCTL_READ_SECTORS_PARAM iop;
  2399. status = _sdd_lock();
  2400. if (status != HAL_SUCCESS)
  2401. hal_system_error(status);
  2402. iop.lba_sector = sector;
  2403. iop.sector_count = sector_count;
  2404. iop.sector_size = sector_size;
  2405. iop.io_buff = buffer;
  2406. io_status = _sdd_read_sectors(&iop);
  2407. status = _sdd_unlock();
  2408. if (status != HAL_SUCCESS)
  2409. hal_system_error(status);
  2410. return io_status;
  2411. }
  2412. /*****************************************************************************
  2413. * FUNCTION
  2414. *
  2415. * NDS_SD_WriteSectors
  2416. *
  2417. * DESCRIPTION
  2418. *
  2419. * This function write sectors of data to the SD memory card.
  2420. *
  2421. * INPUTS
  2422. *
  2423. * sdd_dev : User mode SDD device structure.
  2424. * sector : The starting LBA sector number.
  2425. * sector_count : Number of sectors to write.
  2426. * sector_size : Size of a sector in bytes.
  2427. * buffer : Pointer to a user buffer of data to be written to the card.
  2428. *
  2429. * OUTPUTS
  2430. *
  2431. * uint32_t : Returns HAL_SUCCESS if successful initialization,
  2432. * else a negative value is returned.
  2433. *
  2434. ****************************************************************************/
  2435. uint32_t NDS_SD_WriteSectors(SDD_DEVICE * sdd_dev, uint32_t sector,
  2436. uint32_t sector_count, uint32_t sector_size,
  2437. void *buffer)
  2438. {
  2439. uint32_t status;
  2440. uint32_t io_status;
  2441. SDD_IOCTL_WRITE_SECTORS_PARAM iop;
  2442. status = _sdd_lock();
  2443. if (status != HAL_SUCCESS)
  2444. hal_system_error(status);
  2445. iop.lba_sector = sector;
  2446. iop.sector_count = sector_count;
  2447. iop.sector_size = sector_size;
  2448. iop.io_buff = buffer;
  2449. io_status = _sdd_write_sectors(&iop);
  2450. status = _sdd_unlock();
  2451. if (status != HAL_SUCCESS)
  2452. hal_system_error(status);
  2453. return io_status;
  2454. }