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os_cpu_common.h

os_cpu_common.h 8.3 KB
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  1. #include "nds32.h"
    2. 

  2. 

  3. 	.set	regno, 0
    4. 

  4. #ifdef __TARGET_IFC_EXT
    5. 

  5. 	.set	regno, regno+1
    6. 

  6. #endif
    7. 

  7. #ifdef __TARGET_ZOL_EXT
    8. 

  8. 	.set	regno, regno+3
    9. 

  9. #endif
    10. 

  10. 

  11. 	/* Descend PSW.INTL and enable PSW.AEN */
    12. 

  12. 	.macro IntlDescend
    13. 

  13. 		mfsr	$r1, $PSW
    14. 

  14. #ifdef __TARGET_ZOL_EXT
    15. 

  15. 		/* Also enable ZOL (PSW.AEN) */
    16. 

  16. 		xori	$r1, $r1, #((1 << 13) | (1 << 1))
    17. 

  17. #else
    18. 

  18. 		addi	$r1, $r1, #-2
    19. 

  19. #endif
    20. 

  20. 		mtsr	$r1, $PSW
    21. 

  21. 	.endm
    22. 

  22. 

  23. 	/* FPU registers */
    24. 

  24. 	.macro SAVE_FPU_REGS_00
    25. 

  25. 		fsdi.bi $fd3, [$sp], -8
    26. 

  26. 		fsdi.bi $fd2, [$sp], -8
    27. 

  27. 		fsdi.bi $fd1, [$sp], -8
    28. 

  28. 		fsdi    $fd0, [$sp+0]
    29. 

  29. 	.endm
    30. 

  30. 

  31. 	.macro SAVE_FPU_REGS_01
    32. 

  32. 		fsdi.bi $fd7, [$sp], -8
    33. 

  33. 		fsdi.bi $fd6, [$sp], -8
    34. 

  34. 		fsdi.bi $fd5, [$sp], -8
    35. 

  35. 		fsdi.bi $fd4, [$sp], -8
    36. 

  36. 		SAVE_FPU_REGS_00
    37. 

  37. 	.endm
    38. 

  38. 

  39. 	.macro SAVE_FPU_REGS_02
    40. 

  40. 		fsdi.bi $fd15, [$sp], -8
    41. 

  41. 		fsdi.bi $fd14, [$sp], -8
    42. 

  42. 		fsdi.bi $fd13, [$sp], -8
    43. 

  43. 		fsdi.bi $fd12, [$sp], -8
    44. 

  44. 		fsdi.bi $fd11, [$sp], -8
    45. 

  45. 		fsdi.bi $fd10, [$sp], -8
    46. 

  46. 		fsdi.bi $fd9, [$sp], -8
    47. 

  47. 		fsdi.bi $fd8, [$sp], -8
    48. 

  48. 		SAVE_FPU_REGS_01
    49. 

  49. 	.endm
    50. 

  50. 

  51. 	.macro SAVE_FPU_REGS_03
    52. 

  52. 		fsdi.bi $fd31, [$sp], -8
    53. 

  53. 		fsdi.bi $fd30, [$sp], -8
    54. 

  54. 		fsdi.bi $fd29, [$sp], -8
    55. 

  55. 		fsdi.bi $fd28, [$sp], -8
    56. 

  56. 		fsdi.bi $fd27, [$sp], -8
    57. 

  57. 		fsdi.bi $fd26, [$sp], -8
    58. 

  58. 		fsdi.bi $fd25, [$sp], -8
    59. 

  59. 		fsdi.bi $fd24, [$sp], -8
    60. 

  60. 		fsdi.bi $fd23, [$sp], -8
    61. 

  61. 		fsdi.bi $fd22, [$sp], -8
    62. 

  62. 		fsdi.bi $fd21, [$sp], -8
    63. 

  63. 		fsdi.bi $fd20, [$sp], -8
    64. 

  64. 		fsdi.bi $fd19, [$sp], -8
    65. 

  65. 		fsdi.bi $fd18, [$sp], -8
    66. 

  66. 		fsdi.bi $fd17, [$sp], -8
    67. 

  67. 		fsdi.bi $fd16, [$sp], -8
    68. 

  68. 		SAVE_FPU_REGS_02
    69. 

  69. 	.endm
    70. 

  70. 

  71. 	.macro push_fpu
    72. 

  72. #if defined(__NDS32_EXT_FPU_CONFIG_0__)
    73. 

  73. 		addi    $sp, $sp, -8
    74. 

  74. 		SAVE_FPU_REGS_00
    75. 

  75. #elif defined(__NDS32_EXT_FPU_CONFIG_1__)
    76. 

  76. 		addi    $sp, $sp, -8
    77. 

  77. 		SAVE_FPU_REGS_01
    78. 

  78. #elif defined(__NDS32_EXT_FPU_CONFIG_2__)
    79. 

  79. 		addi    $sp, $sp, -8
    80. 

  80. 		SAVE_FPU_REGS_02
    81. 

  81. #elif defined(__NDS32_EXT_FPU_CONFIG_3__)
    82. 

  82. 		addi    $sp, $sp, -8
    83. 

  83. 		SAVE_FPU_REGS_03
    84. 

  84. #else
    85. 

  85. #endif
    86. 

  86. 	.endm
    87. 

  87. 

  88. 	.macro RESTORE_FPU_REGS_00
    89. 

  89. 		fldi.bi $fd0, [$sp], 8
    90. 

  90. 		fldi.bi $fd1, [$sp], 8
    91. 

  91. 		fldi.bi $fd2, [$sp], 8
    92. 

  92. 		fldi.bi $fd3, [$sp], 8
    93. 

  93. 	.endm
    94. 

  94. 

  95. 	.macro RESTORE_FPU_REGS_01
    96. 

  96. 		RESTORE_FPU_REGS_00
    97. 

  97. 		fldi.bi $fd4, [$sp], 8
    98. 

  98. 		fldi.bi $fd5, [$sp], 8
    99. 

  99. 		fldi.bi $fd6, [$sp], 8
    100. 

  100. 		fldi.bi $fd7, [$sp], 8
    101. 

  101. 	.endm
    102. 

  102. 

  103. 	.macro RESTORE_FPU_REGS_02
    104. 

  104. 		RESTORE_FPU_REGS_01
    105. 

  105. 		fldi.bi $fd8, [$sp], 8
    106. 

  106. 		fldi.bi $fd9, [$sp], 8
    107. 

  107. 		fldi.bi $fd10, [$sp], 8
    108. 

  108. 		fldi.bi $fd11, [$sp], 8
    109. 

  109. 		fldi.bi $fd12, [$sp], 8
    110. 

  110. 		fldi.bi $fd13, [$sp], 8
    111. 

  111. 		fldi.bi $fd14, [$sp], 8
    112. 

  112. 		fldi.bi $fd15, [$sp], 8
    113. 

  113. 	.endm
    114. 

  114. 

  115. 	.macro RESTORE_FPU_REGS_03
    116. 

  116. 		RESTORE_FPU_REGS_02
    117. 

  117. 		fldi.bi $fd16, [$sp], 8
    118. 

  118. 		fldi.bi $fd17, [$sp], 8
    119. 

  119. 		fldi.bi $fd18, [$sp], 8
    120. 

  120. 		fldi.bi $fd19, [$sp], 8
    121. 

  121. 		fldi.bi $fd20, [$sp], 8
    122. 

  122. 		fldi.bi $fd21, [$sp], 8
    123. 

  123. 		fldi.bi $fd22, [$sp], 8
    124. 

  124. 		fldi.bi $fd23, [$sp], 8
    125. 

  125. 		fldi.bi $fd24, [$sp], 8
    126. 

  126. 		fldi.bi $fd25, [$sp], 8
    127. 

  127. 		fldi.bi $fd26, [$sp], 8
    128. 

  128. 		fldi.bi $fd27, [$sp], 8
    129. 

  129. 		fldi.bi $fd28, [$sp], 8
    130. 

  130. 		fldi.bi $fd29, [$sp], 8
    131. 

  131. 		fldi.bi $fd30, [$sp], 8
    132. 

  132. 		fldi.bi $fd31, [$sp], 8
    133. 

  133. 	.endm
    134. 

  134. 

  135. 	.macro pop_fpu
    136. 

  136. #if defined(__NDS32_EXT_FPU_CONFIG_0__)
    137. 

  137. 		RESTORE_FPU_REGS_00
    138. 

  138. #elif defined(__NDS32_EXT_FPU_CONFIG_1__)
    139. 

  139. 		RESTORE_FPU_REGS_01
    140. 

  140. #elif defined(__NDS32_EXT_FPU_CONFIG_2__)
    141. 

  141. 		RESTORE_FPU_REGS_02
    142. 

  142. #elif defined(__NDS32_EXT_FPU_CONFIG_3__)
    143. 

  143. 		RESTORE_FPU_REGS_03
    144. 

  144. #else
    145. 

  145. #endif
    146. 

  146. 	.endm
    147. 

  147. 

  148. 	/* FPU Caller registers */
    149. 

  149. 	.macro SAVE_FPU_CALLER_REGS_00
    150. 

  150. 		addi    $sp, $sp, -8
    151. 

  151. 		fsdi.bi $fd2, [$sp], -8
    152. 

  152. 		fsdi.bi $fd1, [$sp], -8
    153. 

  153. 		fsdi    $fd0, [$sp+0]
    154. 

  154. 	.endm
    155. 

  155. 

  156. 	.macro SAVE_FPU_CALLER_REGS_01
    157. 

  157. 		SAVE_FPU_CALLER_REGS_00
    158. 

  158. 	.endm
    159. 

  159. 

  160. 	.macro SAVE_FPU_CALLER_REGS_02
    161. 

  161. 		addi    $sp, $sp, -8
    162. 

  162. 		fsdi.bi $fd15, [$sp], -8
    163. 

  163. 		fsdi.bi $fd14, [$sp], -8
    164. 

  164. 		fsdi.bi $fd13, [$sp], -8
    165. 

  165. 		fsdi.bi $fd12, [$sp], -8
    166. 

  166. 		fsdi.bi $fd11, [$sp], -8
    167. 

  167. 		fsdi.bi $fd2, [$sp], -8
    168. 

  168. 		fsdi.bi $fd1, [$sp], -8
    169. 

  169. 		fsdi    $fd0, [$sp+0]
    170. 

  170. 	.endm
    171. 

  171. 

  172. 	.macro SAVE_FPU_CALLER_REGS_03
    173. 

  173. 		addi    $sp, $sp, -8
    174. 

  174. 		fsdi.bi $fd23, [$sp], -8
    175. 

  175. 		fsdi.bi $fd22, [$sp], -8
    176. 

  176. 		fsdi.bi $fd21, [$sp], -8
    177. 

  177. 		fsdi.bi $fd20, [$sp], -8
    178. 

  178. 		fsdi.bi $fd19, [$sp], -8
    179. 

  179. 		fsdi.bi $fd18, [$sp], -8
    180. 

  180. 		fsdi.bi $fd17, [$sp], -8
    181. 

  181. 		fsdi.bi $fd16, [$sp], -8
    182. 

  182. 		fsdi.bi $fd15, [$sp], -8
    183. 

  183. 		fsdi.bi $fd14, [$sp], -8
    184. 

  184. 		fsdi.bi $fd13, [$sp], -8
    185. 

  185. 		fsdi.bi $fd12, [$sp], -8
    186. 

  186. 		fsdi.bi $fd11, [$sp], -8
    187. 

  187. 		fsdi.bi $fd2, [$sp], -8
    188. 

  188. 		fsdi.bi $fd1, [$sp], -8
    189. 

  189. 		fsdi    $fd0, [$sp+0]
    190. 

  190. 	.endm
    191. 

  191. 

  192. 	.macro push_fpu_caller
    193. 

  193. #if defined(__NDS32_EXT_FPU_CONFIG_0__)
    194. 

  194. 		SAVE_FPU_CALLER_REGS_00
    195. 

  195. #elif defined(__NDS32_EXT_FPU_CONFIG_1__)
    196. 

  196. 		SAVE_FPU_CALLER_REGS_01
    197. 

  197. #elif defined(__NDS32_EXT_FPU_CONFIG_2__)
    198. 

  198. 		SAVE_FPU_CALLER_REGS_02
    199. 

  199. #elif defined(__NDS32_EXT_FPU_CONFIG_3__)
    200. 

  200. 		SAVE_FPU_CALLER_REGS_03
    201. 

  201. #else
    202. 

  202. #endif
    203. 

  203. 	.endm
    204. 

  204. 

  205. 	.macro RESTORE_FPU_CALLER_REGS_00
    206. 

  206. 		fldi.bi $fd0, [$sp], 8
    207. 

  207. 		fldi.bi $fd1, [$sp], 8
    208. 

  208. 		fldi.bi $fd2, [$sp], 8
    209. 

  209. 	.endm
    210. 

  210. 

  211. 	.macro RESTORE_FPU_CALLER_REGS_01
    212. 

  212. 		RESTORE_FPU_CALLER_REGS_00
    213. 

  213. 	.endm
    214. 

  214. 

  215. 	.macro RESTORE_FPU_CALLER_REGS_02
    216. 

  216. 		fldi.bi $fd0, [$sp], 8
    217. 

  217. 		fldi.bi $fd1, [$sp], 8
    218. 

  218. 		fldi.bi $fd2, [$sp], 8
    219. 

  219. 		fldi.bi $fd11, [$sp], 8
    220. 

  220. 		fldi.bi $fd12, [$sp], 8
    221. 

  221. 		fldi.bi $fd13, [$sp], 8
    222. 

  222. 		fldi.bi $fd14, [$sp], 8
    223. 

  223. 		fldi.bi $fd15, [$sp], 8
    224. 

  224. 	.endm
    225. 

  225. 

  226. 	.macro RESTORE_FPU_CALLER_REGS_03
    227. 

  227. 		fldi.bi $fd0, [$sp], 8
    228. 

  228. 		fldi.bi $fd1, [$sp], 8
    229. 

  229. 		fldi.bi $fd2, [$sp], 8
    230. 

  230. 		fldi.bi $fd11, [$sp], 8
    231. 

  231. 		fldi.bi $fd12, [$sp], 8
    232. 

  232. 		fldi.bi $fd13, [$sp], 8
    233. 

  233. 		fldi.bi $fd14, [$sp], 8
    234. 

  234. 		fldi.bi $fd15, [$sp], 8
    235. 

  235. 		fldi.bi $fd16, [$sp], 8
    236. 

  236. 		fldi.bi $fd17, [$sp], 8
    237. 

  237. 		fldi.bi $fd18, [$sp], 8
    238. 

  238. 		fldi.bi $fd19, [$sp], 8
    239. 

  239. 		fldi.bi $fd20, [$sp], 8
    240. 

  240. 		fldi.bi $fd21, [$sp], 8
    241. 

  241. 		fldi.bi $fd22, [$sp], 8
    242. 

  242. 		fldi.bi $fd23, [$sp], 8
    243. 

  243. 	.endm
    244. 

  244. 

  245. 	.macro pop_fpu_caller
    246. 

  246. #if defined(__NDS32_EXT_FPU_CONFIG_0__)
    247. 

  247. 		RESTORE_FPU_CALLER_REGS_00
    248. 

  248. #elif defined(__NDS32_EXT_FPU_CONFIG_1__)
    249. 

  249. 		RESTORE_FPU_CALLER_REGS_01
    250. 

  250. #elif defined(__NDS32_EXT_FPU_CONFIG_2__)
    251. 

  251. 		RESTORE_FPU_CALLER_REGS_02
    252. 

  252. #elif defined(__NDS32_EXT_FPU_CONFIG_3__)
    253. 

  253. 		RESTORE_FPU_CALLER_REGS_03
    254. 

  254. #else
    255. 

  255. #endif
    256. 

  256. 	.endm
    257. 

  257. 

  258. 	/* IFC system register */
    259. 

  259. 	.macro MFUSR_IFC R0="$r1"
    260. 

  260. 		mfusr	\R0, $IFC_LP
    261. 

  261. 	.endm
    262. 

  262. 

  263. 	.macro MTUSR_IFC R0="$r1"
    264. 

  264. 		mtusr	\R0, $IFC_LP
    265. 

  265. 	.endm
    266. 

  266. 

  267. 	/* ZOL system registers */
    268. 

  268. 	.macro MFUSR_ZOL R0="$r1", R1="$r2", R2="$r3"
    269. 

  269. 		mfusr	\R0, $LB
    270. 

  270. 		mfusr	\R1, $LE
    271. 

  271. 		mfusr	\R2, $LC
    272. 

  272. 	.endm
    273. 

  273. 

  274. 	.macro MTUSR_ZOL R0="$r1", R1="$r2", R2="$r3"
    275. 

  275. 		mtusr	\R0, $LB
    276. 

  276. 		mtusr	\R1, $LE
    277. 

  277. 		mtusr	\R2, $LC
    278. 

  278. 	.endm
    279. 

  279. 

  280. 	/* Context-switch save and restore routines */
    281. 

  281. 	.macro SAVE_ALL
    282. 

  282. 		pushm	$r6, $r30
    283. 

  283. 

  284. 		mfsr	$r1, $IPC
    285. 

  285. 		mfsr	$r2, $IPSW
    286. 

  286. 

  287. 		.if (regno == 4)
    288. 

  288. 		MFUSR_ZOL "$r3","$r4","$r5"
    289. 

  289. 		MFUSR_IFC "$r6"
    290. 

  290. 		pushm	$r0, $r6		/* $0 is dummy */
    291. 

  291. 		.else
    292. 

  292. 		.if (regno == 3)
    293. 

  293. 		MFUSR_ZOL "$r3","$r4","$r5"
    294. 

  294. 		pushm	$r1, $r5
    295. 

  295. 		.else
    296. 

  296. 		.if (regno == 1)
    297. 

  297. 		MFUSR_IFC "$r3"
    298. 

  298. 		pushm	$r1, $r3
    299. 

  299. 		.else
    300. 

  300. 		pushm	$r1, $r2
    301. 

  301. 		.endif
    302. 

  302. 		.endif
    303. 

  303. 		.endif
    304. 

  304. 

  305. 		push_fpu
    306. 

  306. 	.endm
    307. 

  307. 

  308. 	.macro RESTORE_ALL
    309. 

  309. 		pop_fpu
    310. 

  310. 		setgie.d
    311. 

  311. 		dsb
    312. 

  312. 

  313. 		.if (regno == 4)
    314. 

  314. 		popm	$r0, $r6		/* $0 is dummy */
    315. 

  315. 		MTUSR_ZOL "$r3","$r4","$r5"
    316. 

  316. 		MTUSR_IFC "$r6"
    317. 

  317. 		.else
    318. 

  318. 		.if (regno == 3)
    319. 

  319. 		popm	$r1, $r5
    320. 

  320. 		MTUSR_ZOL "$r3","$r4","$r5"
    321. 

  321. 		.else
    322. 

  322. 		.if (regno == 1)
    323. 

  323. 		popm	$r1, $r3
    324. 

  324. 		MTUSR_IFC "$r3"
    325. 

  325. 		.else
    326. 

  326. 		popm	$r1, $r2
    327. 

  327. 		.endif
    328. 

  328. 		.endif
    329. 

  329. 		.endif
    330. 

  330. 

  331. 		mtsr	$r1, $IPC
    332. 

  332. 		mtsr	$r2, $IPSW
    333. 

  333. 

  334. 		popm	$r6, $r30
    335. 

  335. 		popm	$r0, $r5
    336. 

  336. 	.endm
    337. 

  337. 

  338. 	/* Nested IRQ save and restore routines*/
    339. 

  339. 	.macro SAVE_CALLER
    340. 

  340. 		pushm	$r15,$r30		/* full: 16 gpr, reduce: 4 gpr */
    341. 

  341. 

  342. 		.if (regno == 4)
    343. 

  343. 		MFUSR_ZOL "$r1","$r2","$r3"
    344. 

  344. 		MFUSR_IFC "$r4"
    345. 

  345. 		pushm	$r1, $r4
    346. 

  346. 

  347. 		mfsr	$r1, $IPC
    348. 

  348. 		mfsr	$r2, $IPSW
    349. 

  349. 		pushm	$r1, $r2
    350. 

  350. 		.else
    351. 

  351. 		mfsr	$r1, $IPC
    352. 

  352.                 mfsr	$r2, $IPSW
    353. 

  353. 		.if (regno == 3)
    354. 

  354. 		MFUSR_ZOL "$r3","$r4","$r5"
    355. 

  355. 		pushm	$r0, $r5		/* $0 is dummy */
    356. 

  356. 		.else
    357. 

  357. 		.if (regno == 1)
    358. 

  358. 		MFUSR_IFC "$r3"
    359. 

  359. 		pushm	$r0, $r3		/* $r0 is dummy */
    360. 

  360. 		.else
    361. 

  361. 		pushm	$r1, $r2
    362. 

  362. 		.endif
    363. 

  363. 		.endif
    364. 

  364. 		.endif
    365. 

  365. 

  366. 		push_fpu_caller
    367. 

  367. 	.endm
    368. 

  368. 

  369. 	.macro RESTORE_CALLER
    370. 

  370. 		pop_fpu_caller
    371. 

  371. 		setgie.d
    372. 

  372. 		dsb
    373. 

  373. 

  374. 		.if (regno == 4)
    375. 

  375. 		popm $r1, $r2
    376. 

  376. 		mtsr	$r1, $IPC
    377. 

  377. 		mtsr	$r2, $IPSW
    378. 

  378. 

  379. 		popm	$r1, $r4
    380. 

  380. 		MTUSR_ZOL "$r1","$r2","$r3"
    381. 

  381.                 MTUSR_IFC "$r4"
    382. 

  382. 		.else
    383. 

  383. 		.if (regno == 3)
    384. 

  384. 		popm	$r0, $r5		/* $0 is dummy */
    385. 

  385. 		MTUSR_ZOL "$r3","$r4","$r5"
    386. 

  386. 		.else
    387. 

  387. 		.if (regno == 1)
    388. 

  388. 		popm	$r0, $r3		/* $0 is dummy */
    389. 

  389. 		MTUSR_IFC "$r3"
    390. 

  390. 		.else
    391. 

  391. 		popm	$r1, $r2
    392. 

  392. 		.endif
    393. 

  393. 		.endif
    394. 

  394. 		mtsr	$r1, $IPC
    395. 

  395. 		mtsr	$r2, $IPSW
    396. 

  396. 		.endif
    397. 

  397. 

  398. 		popm	$r15,$r30		/* full: 16 gpr, reduce: 4 gpr*/
    399. 

  399. 		popm	$r0, $r5
    400. 

  400. 	.endm
    401. 

  401. 

  402. 	/* Non-Nested IRQ save and restore routines */
    403. 

  403. 	.macro SAVE_CALLER_UNNESTED
    404. 

  404. 		pushm	$r15,$r30		/* full: 16 gpr, reduce: 4 gpr */
    405. 

  405. 

  406. 		.if (regno == 1)
    407. 

  407. 		MFUSR_IFC "$r1"
    408. 

  408. 		pushm	$r0, $r1		/* $r0 is dummy */
    409. 

  409. 		.endif
    410. 

  410. 

  411. 		push_fpu_caller
    412. 

  412. 	.endm
    413. 

  413. 

  414. 	.macro RESTORE_CALLER_UNNESTED
    415. 

  415. 		pop_fpu_caller
    416. 

  416. 

  417. 		.if (regno == 1)
    418. 

  418. 		setgie.d
    419. 

  419. 		dsb
    420. 

  420. 		popm	$r0, $r1		/* $0 is dummy */
    421. 

  421. 		MTUSR_IFC "$r1"
    422. 

  422. 		.endif
    423. 

  423. 

  424. 		popm	$r15,$r30		/* full: 16 gpr, reduce: 4 gpr*/
    425. 

  425. 		popm	$r0, $r5
    426. 

  426. 	.endm
    427.