stm32f4xx_hal_pwr.h 15 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_pwr.h
  4. * @author MCD Application Team
  5. * @version V1.6.0
  6. * @date 04-November-2016
  7. * @brief Header file of PWR HAL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32F4xx_HAL_PWR_H
  39. #define __STM32F4xx_HAL_PWR_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. /* Includes ------------------------------------------------------------------*/
  44. #include "stm32f4xx_hal_def.h"
  45. /** @addtogroup STM32F4xx_HAL_Driver
  46. * @{
  47. */
  48. /** @addtogroup PWR
  49. * @{
  50. */
  51. /* Exported types ------------------------------------------------------------*/
  52. /** @defgroup PWR_Exported_Types PWR Exported Types
  53. * @{
  54. */
  55. /**
  56. * @brief PWR PVD configuration structure definition
  57. */
  58. typedef struct
  59. {
  60. uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
  61. This parameter can be a value of @ref PWR_PVD_detection_level */
  62. uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
  63. This parameter can be a value of @ref PWR_PVD_Mode */
  64. }PWR_PVDTypeDef;
  65. /**
  66. * @}
  67. */
  68. /* Exported constants --------------------------------------------------------*/
  69. /** @defgroup PWR_Exported_Constants PWR Exported Constants
  70. * @{
  71. */
  72. /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins
  73. * @{
  74. */
  75. #define PWR_WAKEUP_PIN1 ((uint32_t)0x00000100U)
  76. /**
  77. * @}
  78. */
  79. /** @defgroup PWR_PVD_detection_level PWR PVD detection level
  80. * @{
  81. */
  82. #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
  83. #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
  84. #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
  85. #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
  86. #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
  87. #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
  88. #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
  89. #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7/* External input analog voltage
  90. (Compare internally to VREFINT) */
  91. /**
  92. * @}
  93. */
  94. /** @defgroup PWR_PVD_Mode PWR PVD Mode
  95. * @{
  96. */
  97. #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000U) /*!< basic mode is used */
  98. #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001U) /*!< External Interrupt Mode with Rising edge trigger detection */
  99. #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002U) /*!< External Interrupt Mode with Falling edge trigger detection */
  100. #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
  101. #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001U) /*!< Event Mode with Rising edge trigger detection */
  102. #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002U) /*!< Event Mode with Falling edge trigger detection */
  103. #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003U) /*!< Event Mode with Rising/Falling edge trigger detection */
  104. /**
  105. * @}
  106. */
  107. /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode
  108. * @{
  109. */
  110. #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000U)
  111. #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
  112. /**
  113. * @}
  114. */
  115. /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
  116. * @{
  117. */
  118. #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01U)
  119. #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02U)
  120. /**
  121. * @}
  122. */
  123. /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
  124. * @{
  125. */
  126. #define PWR_STOPENTRY_WFI ((uint8_t)0x01U)
  127. #define PWR_STOPENTRY_WFE ((uint8_t)0x02U)
  128. /**
  129. * @}
  130. */
  131. /** @defgroup PWR_Flag PWR Flag
  132. * @{
  133. */
  134. #define PWR_FLAG_WU PWR_CSR_WUF
  135. #define PWR_FLAG_SB PWR_CSR_SBF
  136. #define PWR_FLAG_PVDO PWR_CSR_PVDO
  137. #define PWR_FLAG_BRR PWR_CSR_BRR
  138. #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY
  139. /**
  140. * @}
  141. */
  142. /**
  143. * @}
  144. */
  145. /* Exported macro ------------------------------------------------------------*/
  146. /** @defgroup PWR_Exported_Macro PWR Exported Macro
  147. * @{
  148. */
  149. /** @brief Check PWR flag is set or not.
  150. * @param __FLAG__: specifies the flag to check.
  151. * This parameter can be one of the following values:
  152. * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
  153. * was received from the WKUP pin or from the RTC alarm (Alarm A
  154. * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
  155. * An additional wakeup event is detected if the WKUP pin is enabled
  156. * (by setting the EWUP bit) when the WKUP pin level is already high.
  157. * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
  158. * resumed from StandBy mode.
  159. * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
  160. * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
  161. * For this reason, this bit is equal to 0 after Standby or reset
  162. * until the PVDE bit is set.
  163. * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset
  164. * when the device wakes up from Standby mode or by a system reset
  165. * or power reset.
  166. * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage
  167. * scaling output selection is ready.
  168. * @retval The new state of __FLAG__ (TRUE or FALSE).
  169. */
  170. #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
  171. /** @brief Clear the PWR's pending flags.
  172. * @param __FLAG__: specifies the flag to clear.
  173. * This parameter can be one of the following values:
  174. * @arg PWR_FLAG_WU: Wake Up flag
  175. * @arg PWR_FLAG_SB: StandBy flag
  176. */
  177. #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U)
  178. /**
  179. * @brief Enable the PVD Exti Line 16.
  180. * @retval None.
  181. */
  182. #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
  183. /**
  184. * @brief Disable the PVD EXTI Line 16.
  185. * @retval None.
  186. */
  187. #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
  188. /**
  189. * @brief Enable event on PVD Exti Line 16.
  190. * @retval None.
  191. */
  192. #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
  193. /**
  194. * @brief Disable event on PVD Exti Line 16.
  195. * @retval None.
  196. */
  197. #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
  198. /**
  199. * @brief Enable the PVD Extended Interrupt Rising Trigger.
  200. * @retval None.
  201. */
  202. #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
  203. /**
  204. * @brief Disable the PVD Extended Interrupt Rising Trigger.
  205. * @retval None.
  206. */
  207. #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
  208. /**
  209. * @brief Enable the PVD Extended Interrupt Falling Trigger.
  210. * @retval None.
  211. */
  212. #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
  213. /**
  214. * @brief Disable the PVD Extended Interrupt Falling Trigger.
  215. * @retval None.
  216. */
  217. #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
  218. /**
  219. * @brief PVD EXTI line configuration: set rising & falling edge trigger.
  220. * @retval None.
  221. */
  222. #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();\
  223. __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();\
  224. }while(0)
  225. /**
  226. * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
  227. * This parameter can be:
  228. * @retval None.
  229. */
  230. #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();\
  231. __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();\
  232. }while(0)
  233. /**
  234. * @brief checks whether the specified PVD Exti interrupt flag is set or not.
  235. * @retval EXTI PVD Line Status.
  236. */
  237. #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
  238. /**
  239. * @brief Clear the PVD Exti flag.
  240. * @retval None.
  241. */
  242. #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
  243. /**
  244. * @brief Generates a Software interrupt on PVD EXTI line.
  245. * @retval None
  246. */
  247. #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
  248. /**
  249. * @}
  250. */
  251. /* Include PWR HAL Extension module */
  252. #include "stm32f4xx_hal_pwr_ex.h"
  253. /* Exported functions --------------------------------------------------------*/
  254. /** @addtogroup PWR_Exported_Functions PWR Exported Functions
  255. * @{
  256. */
  257. /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
  258. * @{
  259. */
  260. /* Initialization and de-initialization functions *****************************/
  261. void HAL_PWR_DeInit(void);
  262. void HAL_PWR_EnableBkUpAccess(void);
  263. void HAL_PWR_DisableBkUpAccess(void);
  264. /**
  265. * @}
  266. */
  267. /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
  268. * @{
  269. */
  270. /* Peripheral Control functions **********************************************/
  271. /* PVD configuration */
  272. void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
  273. void HAL_PWR_EnablePVD(void);
  274. void HAL_PWR_DisablePVD(void);
  275. /* WakeUp pins configuration */
  276. void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
  277. void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
  278. /* Low Power modes entry */
  279. void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
  280. void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
  281. void HAL_PWR_EnterSTANDBYMode(void);
  282. /* Power PVD IRQ Handler */
  283. void HAL_PWR_PVD_IRQHandler(void);
  284. void HAL_PWR_PVDCallback(void);
  285. /* Cortex System Control functions *******************************************/
  286. void HAL_PWR_EnableSleepOnExit(void);
  287. void HAL_PWR_DisableSleepOnExit(void);
  288. void HAL_PWR_EnableSEVOnPend(void);
  289. void HAL_PWR_DisableSEVOnPend(void);
  290. /**
  291. * @}
  292. */
  293. /**
  294. * @}
  295. */
  296. /* Private types -------------------------------------------------------------*/
  297. /* Private variables ---------------------------------------------------------*/
  298. /* Private constants ---------------------------------------------------------*/
  299. /** @defgroup PWR_Private_Constants PWR Private Constants
  300. * @{
  301. */
  302. /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line
  303. * @{
  304. */
  305. #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
  306. /**
  307. * @}
  308. */
  309. /** @defgroup PWR_register_alias_address PWR Register alias address
  310. * @{
  311. */
  312. /* ------------- PWR registers bit address in the alias region ---------------*/
  313. #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
  314. #define PWR_CR_OFFSET 0x00U
  315. #define PWR_CSR_OFFSET 0x04U
  316. #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET)
  317. #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET)
  318. /**
  319. * @}
  320. */
  321. /** @defgroup PWR_CR_register_alias PWR CR Register alias address
  322. * @{
  323. */
  324. /* --- CR Register ---*/
  325. /* Alias word address of DBP bit */
  326. #define DBP_BIT_NUMBER POSITION_VAL(PWR_CR_DBP)
  327. #define CR_DBP_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (DBP_BIT_NUMBER * 4U))
  328. /* Alias word address of PVDE bit */
  329. #define PVDE_BIT_NUMBER POSITION_VAL(PWR_CR_PVDE)
  330. #define CR_PVDE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PVDE_BIT_NUMBER * 4U))
  331. /* Alias word address of PMODE bit */
  332. #define PMODE_BIT_NUMBER POSITION_VAL(PWR_CR_PMODE)
  333. #define CR_PMODE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PMODE_BIT_NUMBER * 4U))
  334. /**
  335. * @}
  336. */
  337. /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address
  338. * @{
  339. */
  340. /* --- CSR Register ---*/
  341. /* Alias word address of EWUP bit */
  342. #define EWUP_BIT_NUMBER POSITION_VAL(PWR_CSR_EWUP)
  343. #define CSR_EWUP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (EWUP_BIT_NUMBER * 4U))
  344. /**
  345. * @}
  346. */
  347. /**
  348. * @}
  349. */
  350. /* Private macros ------------------------------------------------------------*/
  351. /** @defgroup PWR_Private_Macros PWR Private Macros
  352. * @{
  353. */
  354. /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters
  355. * @{
  356. */
  357. #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
  358. ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
  359. ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
  360. ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
  361. #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
  362. ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
  363. ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
  364. ((MODE) == PWR_PVD_MODE_NORMAL))
  365. #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
  366. ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
  367. #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
  368. #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
  369. /**
  370. * @}
  371. */
  372. /**
  373. * @}
  374. */
  375. /**
  376. * @}
  377. */
  378. /**
  379. * @}
  380. */
  381. #ifdef __cplusplus
  382. }
  383. #endif
  384. #endif /* __STM32F4xx_HAL_PWR_H */
  385. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/