stm32f7xx_hal_can.c 43 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f7xx_hal_can.c
  4. * @author MCD Application Team
  5. * @version V1.0.1
  6. * @date 25-June-2015
  7. * @brief CAN HAL module driver.
  8. * This file provides firmware functions to manage the following
  9. * functionalities of the Controller Area Network (CAN) peripheral:
  10. * + Initialization and de-initialization functions
  11. * + IO operation functions
  12. * + Peripheral Control functions
  13. * + Peripheral State and Error functions
  14. *
  15. @verbatim
  16. ==============================================================================
  17. ##### How to use this driver #####
  18. ==============================================================================
  19. [..]
  20. (#) Enable the CAN controller interface clock using
  21. __HAL_RCC_CAN1_CLK_ENABLE() for CAN1 and __HAL_RCC_CAN2_CLK_ENABLE() for CAN2
  22. -@- In case you are using CAN2 only, you have to enable the CAN1 clock.
  23. (#) CAN pins configuration
  24. (++) Enable the clock for the CAN GPIOs using the following function:
  25. __HAL_RCC_GPIOx_CLK_ENABLE()
  26. (++) Connect and configure the involved CAN pins to AF9 using the
  27. following function HAL_GPIO_Init()
  28. (#) Initialize and configure the CAN using HAL_CAN_Init() function.
  29. (#) Transmit the desired CAN frame using HAL_CAN_Transmit() function.
  30. (#) Receive a CAN frame using HAL_CAN_Receive() function.
  31. *** Polling mode IO operation ***
  32. =================================
  33. [..]
  34. (+) Start the CAN peripheral transmission and wait the end of this operation
  35. using HAL_CAN_Transmit(), at this stage user can specify the value of timeout
  36. according to his end application
  37. (+) Start the CAN peripheral reception and wait the end of this operation
  38. using HAL_CAN_Receive(), at this stage user can specify the value of timeout
  39. according to his end application
  40. *** Interrupt mode IO operation ***
  41. ===================================
  42. [..]
  43. (+) Start the CAN peripheral transmission using HAL_CAN_Transmit_IT()
  44. (+) Start the CAN peripheral reception using HAL_CAN_Receive_IT()
  45. (+) Use HAL_CAN_IRQHandler() called under the used CAN Interrupt subroutine
  46. (+) At CAN end of transmission HAL_CAN_TxCpltCallback() function is executed and user can
  47. add his own code by customization of function pointer HAL_CAN_TxCpltCallback
  48. (+) In case of CAN Error, HAL_CAN_ErrorCallback() function is executed and user can
  49. add his own code by customization of function pointer HAL_CAN_ErrorCallback
  50. *** CAN HAL driver macros list ***
  51. =============================================
  52. [..]
  53. Below the list of most used macros in CAN HAL driver.
  54. (+) __HAL_CAN_ENABLE_IT: Enable the specified CAN interrupts
  55. (+) __HAL_CAN_DISABLE_IT: Disable the specified CAN interrupts
  56. (+) __HAL_CAN_GET_IT_SOURCE: Check if the specified CAN interrupt source is enabled or disabled
  57. (+) __HAL_CAN_CLEAR_FLAG: Clear the CAN's pending flags
  58. (+) __HAL_CAN_GET_FLAG: Get the selected CAN's flag status
  59. [..]
  60. (@) You can refer to the CAN HAL driver header file for more useful macros
  61. @endverbatim
  62. ******************************************************************************
  63. * @attention
  64. *
  65. * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
  66. *
  67. * Redistribution and use in source and binary forms, with or without modification,
  68. * are permitted provided that the following conditions are met:
  69. * 1. Redistributions of source code must retain the above copyright notice,
  70. * this list of conditions and the following disclaimer.
  71. * 2. Redistributions in binary form must reproduce the above copyright notice,
  72. * this list of conditions and the following disclaimer in the documentation
  73. * and/or other materials provided with the distribution.
  74. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  75. * may be used to endorse or promote products derived from this software
  76. * without specific prior written permission.
  77. *
  78. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  79. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  80. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  81. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  82. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  83. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  84. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  85. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  86. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  87. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  88. *
  89. ******************************************************************************
  90. */
  91. /* Includes ------------------------------------------------------------------*/
  92. #include "stm32f7xx_hal.h"
  93. /** @addtogroup STM32F7xx_HAL_Driver
  94. * @{
  95. */
  96. /** @defgroup CAN CAN
  97. * @brief CAN driver modules
  98. * @{
  99. */
  100. #ifdef HAL_CAN_MODULE_ENABLED
  101. /* Private typedef -----------------------------------------------------------*/
  102. /* Private define ------------------------------------------------------------*/
  103. /** @addtogroup CAN_Private_Constants
  104. * @{
  105. */
  106. #define CAN_TIMEOUT_VALUE 10
  107. /**
  108. * @}
  109. */
  110. /* Private macro -------------------------------------------------------------*/
  111. /* Private variables ---------------------------------------------------------*/
  112. /* Private function prototypes -----------------------------------------------*/
  113. /** @addtogroup CAN_Private_Functions
  114. * @{
  115. */
  116. static HAL_StatusTypeDef CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber);
  117. static HAL_StatusTypeDef CAN_Transmit_IT(CAN_HandleTypeDef* hcan);
  118. /**
  119. * @}
  120. */
  121. /* Exported functions --------------------------------------------------------*/
  122. /** @defgroup CAN_Exported_Functions CAN Exported Functions
  123. * @{
  124. */
  125. /** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions
  126. * @brief Initialization and Configuration functions
  127. *
  128. @verbatim
  129. ==============================================================================
  130. ##### Initialization and de-initialization functions #####
  131. ==============================================================================
  132. [..] This section provides functions allowing to:
  133. (+) Initialize and configure the CAN.
  134. (+) De-initialize the CAN.
  135. @endverbatim
  136. * @{
  137. */
  138. /**
  139. * @brief Initializes the CAN peripheral according to the specified
  140. * parameters in the CAN_InitStruct.
  141. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  142. * the configuration information for the specified CAN.
  143. * @retval HAL status
  144. */
  145. HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan)
  146. {
  147. uint32_t InitStatus = 3;
  148. uint32_t tickstart = 0;
  149. /* Check CAN handle */
  150. if(hcan == NULL)
  151. {
  152. return HAL_ERROR;
  153. }
  154. /* Check the parameters */
  155. assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance));
  156. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TTCM));
  157. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.ABOM));
  158. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AWUM));
  159. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.NART));
  160. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.RFLM));
  161. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TXFP));
  162. assert_param(IS_CAN_MODE(hcan->Init.Mode));
  163. assert_param(IS_CAN_SJW(hcan->Init.SJW));
  164. assert_param(IS_CAN_BS1(hcan->Init.BS1));
  165. assert_param(IS_CAN_BS2(hcan->Init.BS2));
  166. assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler));
  167. if(hcan->State == HAL_CAN_STATE_RESET)
  168. {
  169. /* Allocate lock resource and initialize it */
  170. hcan->Lock = HAL_UNLOCKED;
  171. /* Init the low level hardware */
  172. HAL_CAN_MspInit(hcan);
  173. }
  174. /* Initialize the CAN state*/
  175. hcan->State = HAL_CAN_STATE_BUSY;
  176. /* Exit from sleep mode */
  177. hcan->Instance->MCR &= (~(uint32_t)CAN_MCR_SLEEP);
  178. /* Request initialisation */
  179. hcan->Instance->MCR |= CAN_MCR_INRQ ;
  180. /* Get tick */
  181. tickstart = HAL_GetTick();
  182. /* Wait the acknowledge */
  183. while((hcan->Instance->MSR & CAN_MSR_INAK) != CAN_MSR_INAK)
  184. {
  185. if((HAL_GetTick() - tickstart ) > CAN_TIMEOUT_VALUE)
  186. {
  187. hcan->State= HAL_CAN_STATE_TIMEOUT;
  188. /* Process unlocked */
  189. __HAL_UNLOCK(hcan);
  190. return HAL_TIMEOUT;
  191. }
  192. }
  193. /* Check acknowledge */
  194. if ((hcan->Instance->MSR & CAN_MSR_INAK) != CAN_MSR_INAK)
  195. {
  196. InitStatus = CAN_INITSTATUS_FAILED;
  197. }
  198. else
  199. {
  200. /* Set the time triggered communication mode */
  201. if (hcan->Init.TTCM == ENABLE)
  202. {
  203. hcan->Instance->MCR |= CAN_MCR_TTCM;
  204. }
  205. else
  206. {
  207. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_TTCM;
  208. }
  209. /* Set the automatic bus-off management */
  210. if (hcan->Init.ABOM == ENABLE)
  211. {
  212. hcan->Instance->MCR |= CAN_MCR_ABOM;
  213. }
  214. else
  215. {
  216. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_ABOM;
  217. }
  218. /* Set the automatic wake-up mode */
  219. if (hcan->Init.AWUM == ENABLE)
  220. {
  221. hcan->Instance->MCR |= CAN_MCR_AWUM;
  222. }
  223. else
  224. {
  225. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_AWUM;
  226. }
  227. /* Set the no automatic retransmission */
  228. if (hcan->Init.NART == ENABLE)
  229. {
  230. hcan->Instance->MCR |= CAN_MCR_NART;
  231. }
  232. else
  233. {
  234. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_NART;
  235. }
  236. /* Set the receive FIFO locked mode */
  237. if (hcan->Init.RFLM == ENABLE)
  238. {
  239. hcan->Instance->MCR |= CAN_MCR_RFLM;
  240. }
  241. else
  242. {
  243. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_RFLM;
  244. }
  245. /* Set the transmit FIFO priority */
  246. if (hcan->Init.TXFP == ENABLE)
  247. {
  248. hcan->Instance->MCR |= CAN_MCR_TXFP;
  249. }
  250. else
  251. {
  252. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_TXFP;
  253. }
  254. /* Set the bit timing register */
  255. hcan->Instance->BTR = (uint32_t)((uint32_t)hcan->Init.Mode) | \
  256. ((uint32_t)hcan->Init.SJW) | \
  257. ((uint32_t)hcan->Init.BS1) | \
  258. ((uint32_t)hcan->Init.BS2) | \
  259. ((uint32_t)hcan->Init.Prescaler - 1);
  260. /* Request leave initialisation */
  261. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_INRQ;
  262. /* Get tick */
  263. tickstart = HAL_GetTick();
  264. /* Wait the acknowledge */
  265. while((hcan->Instance->MSR & CAN_MSR_INAK) == CAN_MSR_INAK)
  266. {
  267. if((HAL_GetTick() - tickstart ) > CAN_TIMEOUT_VALUE)
  268. {
  269. hcan->State= HAL_CAN_STATE_TIMEOUT;
  270. /* Process unlocked */
  271. __HAL_UNLOCK(hcan);
  272. return HAL_TIMEOUT;
  273. }
  274. }
  275. /* Check acknowledged */
  276. if ((hcan->Instance->MSR & CAN_MSR_INAK) == CAN_MSR_INAK)
  277. {
  278. InitStatus = CAN_INITSTATUS_FAILED;
  279. }
  280. else
  281. {
  282. InitStatus = CAN_INITSTATUS_SUCCESS;
  283. }
  284. }
  285. if(InitStatus == CAN_INITSTATUS_SUCCESS)
  286. {
  287. /* Set CAN error code to none */
  288. hcan->ErrorCode = HAL_CAN_ERROR_NONE;
  289. /* Initialize the CAN state */
  290. hcan->State = HAL_CAN_STATE_READY;
  291. /* Return function status */
  292. return HAL_OK;
  293. }
  294. else
  295. {
  296. /* Initialize the CAN state */
  297. hcan->State = HAL_CAN_STATE_ERROR;
  298. /* Return function status */
  299. return HAL_ERROR;
  300. }
  301. }
  302. /**
  303. * @brief Configures the CAN reception filter according to the specified
  304. * parameters in the CAN_FilterInitStruct.
  305. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  306. * the configuration information for the specified CAN.
  307. * @param sFilterConfig: pointer to a CAN_FilterConfTypeDef structure that
  308. * contains the filter configuration information.
  309. * @retval None
  310. */
  311. HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig)
  312. {
  313. uint32_t filternbrbitpos = 0;
  314. /* Check the parameters */
  315. assert_param(IS_CAN_FILTER_NUMBER(sFilterConfig->FilterNumber));
  316. assert_param(IS_CAN_FILTER_MODE(sFilterConfig->FilterMode));
  317. assert_param(IS_CAN_FILTER_SCALE(sFilterConfig->FilterScale));
  318. assert_param(IS_CAN_FILTER_FIFO(sFilterConfig->FilterFIFOAssignment));
  319. assert_param(IS_FUNCTIONAL_STATE(sFilterConfig->FilterActivation));
  320. assert_param(IS_CAN_BANKNUMBER(sFilterConfig->BankNumber));
  321. filternbrbitpos = ((uint32_t)1) << sFilterConfig->FilterNumber;
  322. /* Initialisation mode for the filter */
  323. CAN1->FMR |= (uint32_t)CAN_FMR_FINIT;
  324. /* Select the start slave bank */
  325. CAN1->FMR &= ~((uint32_t)CAN_FMR_CAN2SB);
  326. CAN1->FMR |= (uint32_t)(sFilterConfig->BankNumber << 8);
  327. /* Filter Deactivation */
  328. CAN1->FA1R &= ~(uint32_t)filternbrbitpos;
  329. /* Filter Scale */
  330. if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT)
  331. {
  332. /* 16-bit scale for the filter */
  333. CAN1->FS1R &= ~(uint32_t)filternbrbitpos;
  334. /* First 16-bit identifier and First 16-bit mask */
  335. /* Or First 16-bit identifier and Second 16-bit identifier */
  336. CAN1->sFilterRegister[sFilterConfig->FilterNumber].FR1 =
  337. ((0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16) |
  338. (0x0000FFFF & (uint32_t)sFilterConfig->FilterIdLow);
  339. /* Second 16-bit identifier and Second 16-bit mask */
  340. /* Or Third 16-bit identifier and Fourth 16-bit identifier */
  341. CAN1->sFilterRegister[sFilterConfig->FilterNumber].FR2 =
  342. ((0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16) |
  343. (0x0000FFFF & (uint32_t)sFilterConfig->FilterIdHigh);
  344. }
  345. if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT)
  346. {
  347. /* 32-bit scale for the filter */
  348. CAN1->FS1R |= filternbrbitpos;
  349. /* 32-bit identifier or First 32-bit identifier */
  350. CAN1->sFilterRegister[sFilterConfig->FilterNumber].FR1 =
  351. ((0x0000FFFF & (uint32_t)sFilterConfig->FilterIdHigh) << 16) |
  352. (0x0000FFFF & (uint32_t)sFilterConfig->FilterIdLow);
  353. /* 32-bit mask or Second 32-bit identifier */
  354. CAN1->sFilterRegister[sFilterConfig->FilterNumber].FR2 =
  355. ((0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16) |
  356. (0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdLow);
  357. }
  358. /* Filter Mode */
  359. if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK)
  360. {
  361. /*Id/Mask mode for the filter*/
  362. CAN1->FM1R &= ~(uint32_t)filternbrbitpos;
  363. }
  364. else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */
  365. {
  366. /*Identifier list mode for the filter*/
  367. CAN1->FM1R |= (uint32_t)filternbrbitpos;
  368. }
  369. /* Filter FIFO assignment */
  370. if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0)
  371. {
  372. /* FIFO 0 assignation for the filter */
  373. CAN1->FFA1R &= ~(uint32_t)filternbrbitpos;
  374. }
  375. if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO1)
  376. {
  377. /* FIFO 1 assignation for the filter */
  378. CAN1->FFA1R |= (uint32_t)filternbrbitpos;
  379. }
  380. /* Filter activation */
  381. if (sFilterConfig->FilterActivation == ENABLE)
  382. {
  383. CAN1->FA1R |= filternbrbitpos;
  384. }
  385. /* Leave the initialisation mode for the filter */
  386. CAN1->FMR &= ~((uint32_t)CAN_FMR_FINIT);
  387. /* Return function status */
  388. return HAL_OK;
  389. }
  390. /**
  391. * @brief Deinitializes the CANx peripheral registers to their default reset values.
  392. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  393. * the configuration information for the specified CAN.
  394. * @retval HAL status
  395. */
  396. HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan)
  397. {
  398. /* Check CAN handle */
  399. if(hcan == NULL)
  400. {
  401. return HAL_ERROR;
  402. }
  403. /* Check the parameters */
  404. assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance));
  405. /* Change CAN state */
  406. hcan->State = HAL_CAN_STATE_BUSY;
  407. /* DeInit the low level hardware */
  408. HAL_CAN_MspDeInit(hcan);
  409. /* Change CAN state */
  410. hcan->State = HAL_CAN_STATE_RESET;
  411. /* Release Lock */
  412. __HAL_UNLOCK(hcan);
  413. /* Return function status */
  414. return HAL_OK;
  415. }
  416. /**
  417. * @brief Initializes the CAN MSP.
  418. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  419. * the configuration information for the specified CAN.
  420. * @retval None
  421. */
  422. __weak void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan)
  423. {
  424. /* NOTE : This function Should not be modified, when the callback is needed,
  425. the HAL_CAN_MspInit could be implemented in the user file
  426. */
  427. }
  428. /**
  429. * @brief DeInitializes the CAN MSP.
  430. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  431. * the configuration information for the specified CAN.
  432. * @retval None
  433. */
  434. __weak void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan)
  435. {
  436. /* NOTE : This function Should not be modified, when the callback is needed,
  437. the HAL_CAN_MspDeInit could be implemented in the user file
  438. */
  439. }
  440. /**
  441. * @}
  442. */
  443. /** @defgroup CAN_Exported_Functions_Group2 IO operation functions
  444. * @brief IO operation functions
  445. *
  446. @verbatim
  447. ==============================================================================
  448. ##### IO operation functions #####
  449. ==============================================================================
  450. [..] This section provides functions allowing to:
  451. (+) Transmit a CAN frame message.
  452. (+) Receive a CAN frame message.
  453. (+) Enter CAN peripheral in sleep mode.
  454. (+) Wake up the CAN peripheral from sleep mode.
  455. @endverbatim
  456. * @{
  457. */
  458. /**
  459. * @brief Initiates and transmits a CAN frame message.
  460. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  461. * the configuration information for the specified CAN.
  462. * @param Timeout: Specify Timeout value
  463. * @retval HAL status
  464. */
  465. HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef* hcan, uint32_t Timeout)
  466. {
  467. uint32_t transmitmailbox = 5;
  468. uint32_t tickstart = 0;
  469. /* Check the parameters */
  470. assert_param(IS_CAN_IDTYPE(hcan->pTxMsg->IDE));
  471. assert_param(IS_CAN_RTR(hcan->pTxMsg->RTR));
  472. assert_param(IS_CAN_DLC(hcan->pTxMsg->DLC));
  473. /* Process locked */
  474. __HAL_LOCK(hcan);
  475. if(hcan->State == HAL_CAN_STATE_BUSY_RX)
  476. {
  477. /* Change CAN state */
  478. hcan->State = HAL_CAN_STATE_BUSY_TX_RX;
  479. }
  480. else
  481. {
  482. /* Change CAN state */
  483. hcan->State = HAL_CAN_STATE_BUSY_TX;
  484. }
  485. /* Select one empty transmit mailbox */
  486. if ((hcan->Instance->TSR&CAN_TSR_TME0) == CAN_TSR_TME0)
  487. {
  488. transmitmailbox = 0;
  489. }
  490. else if ((hcan->Instance->TSR&CAN_TSR_TME1) == CAN_TSR_TME1)
  491. {
  492. transmitmailbox = 1;
  493. }
  494. else if ((hcan->Instance->TSR&CAN_TSR_TME2) == CAN_TSR_TME2)
  495. {
  496. transmitmailbox = 2;
  497. }
  498. else
  499. {
  500. transmitmailbox = CAN_TXSTATUS_NOMAILBOX;
  501. }
  502. if (transmitmailbox != CAN_TXSTATUS_NOMAILBOX)
  503. {
  504. /* Set up the Id */
  505. hcan->Instance->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ;
  506. if (hcan->pTxMsg->IDE == CAN_ID_STD)
  507. {
  508. assert_param(IS_CAN_STDID(hcan->pTxMsg->StdId));
  509. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->StdId << 21) | \
  510. hcan->pTxMsg->RTR);
  511. }
  512. else
  513. {
  514. assert_param(IS_CAN_EXTID(hcan->pTxMsg->ExtId));
  515. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->ExtId << 3) | \
  516. hcan->pTxMsg->IDE | \
  517. hcan->pTxMsg->RTR);
  518. }
  519. /* Set up the DLC */
  520. hcan->pTxMsg->DLC &= (uint8_t)0x0000000F;
  521. hcan->Instance->sTxMailBox[transmitmailbox].TDTR &= (uint32_t)0xFFFFFFF0;
  522. hcan->Instance->sTxMailBox[transmitmailbox].TDTR |= hcan->pTxMsg->DLC;
  523. /* Set up the data field */
  524. hcan->Instance->sTxMailBox[transmitmailbox].TDLR = (((uint32_t)hcan->pTxMsg->Data[3] << 24) |
  525. ((uint32_t)hcan->pTxMsg->Data[2] << 16) |
  526. ((uint32_t)hcan->pTxMsg->Data[1] << 8) |
  527. ((uint32_t)hcan->pTxMsg->Data[0]));
  528. hcan->Instance->sTxMailBox[transmitmailbox].TDHR = (((uint32_t)hcan->pTxMsg->Data[7] << 24) |
  529. ((uint32_t)hcan->pTxMsg->Data[6] << 16) |
  530. ((uint32_t)hcan->pTxMsg->Data[5] << 8) |
  531. ((uint32_t)hcan->pTxMsg->Data[4]));
  532. /* Request transmission */
  533. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= CAN_TI0R_TXRQ;
  534. /* Get tick */
  535. tickstart = HAL_GetTick();
  536. /* Check End of transmission flag */
  537. while(!(__HAL_CAN_TRANSMIT_STATUS(hcan, transmitmailbox)))
  538. {
  539. /* Check for the Timeout */
  540. if(Timeout != HAL_MAX_DELAY)
  541. {
  542. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  543. {
  544. hcan->State = HAL_CAN_STATE_TIMEOUT;
  545. /* Process unlocked */
  546. __HAL_UNLOCK(hcan);
  547. return HAL_TIMEOUT;
  548. }
  549. }
  550. }
  551. if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX)
  552. {
  553. /* Change CAN state */
  554. hcan->State = HAL_CAN_STATE_BUSY_RX;
  555. /* Process unlocked */
  556. __HAL_UNLOCK(hcan);
  557. }
  558. else
  559. {
  560. /* Change CAN state */
  561. hcan->State = HAL_CAN_STATE_READY;
  562. /* Process unlocked */
  563. __HAL_UNLOCK(hcan);
  564. }
  565. /* Return function status */
  566. return HAL_OK;
  567. }
  568. else
  569. {
  570. /* Change CAN state */
  571. hcan->State = HAL_CAN_STATE_ERROR;
  572. /* Process unlocked */
  573. __HAL_UNLOCK(hcan);
  574. /* Return function status */
  575. return HAL_ERROR;
  576. }
  577. }
  578. /**
  579. * @brief Initiates and transmits a CAN frame message.
  580. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  581. * the configuration information for the specified CAN.
  582. * @retval HAL status
  583. */
  584. HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef* hcan)
  585. {
  586. uint32_t transmitmailbox = 5;
  587. uint32_t tmp = 0;
  588. /* Check the parameters */
  589. assert_param(IS_CAN_IDTYPE(hcan->pTxMsg->IDE));
  590. assert_param(IS_CAN_RTR(hcan->pTxMsg->RTR));
  591. assert_param(IS_CAN_DLC(hcan->pTxMsg->DLC));
  592. tmp = hcan->State;
  593. if((tmp == HAL_CAN_STATE_READY) || (tmp == HAL_CAN_STATE_BUSY_RX))
  594. {
  595. /* Process Locked */
  596. __HAL_LOCK(hcan);
  597. /* Select one empty transmit mailbox */
  598. if((hcan->Instance->TSR&CAN_TSR_TME0) == CAN_TSR_TME0)
  599. {
  600. transmitmailbox = 0;
  601. }
  602. else if((hcan->Instance->TSR&CAN_TSR_TME1) == CAN_TSR_TME1)
  603. {
  604. transmitmailbox = 1;
  605. }
  606. else if((hcan->Instance->TSR&CAN_TSR_TME2) == CAN_TSR_TME2)
  607. {
  608. transmitmailbox = 2;
  609. }
  610. else
  611. {
  612. transmitmailbox = CAN_TXSTATUS_NOMAILBOX;
  613. }
  614. if(transmitmailbox != CAN_TXSTATUS_NOMAILBOX)
  615. {
  616. /* Set up the Id */
  617. hcan->Instance->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ;
  618. if(hcan->pTxMsg->IDE == CAN_ID_STD)
  619. {
  620. assert_param(IS_CAN_STDID(hcan->pTxMsg->StdId));
  621. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->StdId << 21) | \
  622. hcan->pTxMsg->RTR);
  623. }
  624. else
  625. {
  626. assert_param(IS_CAN_EXTID(hcan->pTxMsg->ExtId));
  627. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->ExtId << 3) | \
  628. hcan->pTxMsg->IDE | \
  629. hcan->pTxMsg->RTR);
  630. }
  631. /* Set up the DLC */
  632. hcan->pTxMsg->DLC &= (uint8_t)0x0000000F;
  633. hcan->Instance->sTxMailBox[transmitmailbox].TDTR &= (uint32_t)0xFFFFFFF0;
  634. hcan->Instance->sTxMailBox[transmitmailbox].TDTR |= hcan->pTxMsg->DLC;
  635. /* Set up the data field */
  636. hcan->Instance->sTxMailBox[transmitmailbox].TDLR = (((uint32_t)hcan->pTxMsg->Data[3] << 24) |
  637. ((uint32_t)hcan->pTxMsg->Data[2] << 16) |
  638. ((uint32_t)hcan->pTxMsg->Data[1] << 8) |
  639. ((uint32_t)hcan->pTxMsg->Data[0]));
  640. hcan->Instance->sTxMailBox[transmitmailbox].TDHR = (((uint32_t)hcan->pTxMsg->Data[7] << 24) |
  641. ((uint32_t)hcan->pTxMsg->Data[6] << 16) |
  642. ((uint32_t)hcan->pTxMsg->Data[5] << 8) |
  643. ((uint32_t)hcan->pTxMsg->Data[4]));
  644. if(hcan->State == HAL_CAN_STATE_BUSY_RX)
  645. {
  646. /* Change CAN state */
  647. hcan->State = HAL_CAN_STATE_BUSY_TX_RX;
  648. }
  649. else
  650. {
  651. /* Change CAN state */
  652. hcan->State = HAL_CAN_STATE_BUSY_TX;
  653. }
  654. /* Set CAN error code to none */
  655. hcan->ErrorCode = HAL_CAN_ERROR_NONE;
  656. /* Process Unlocked */
  657. __HAL_UNLOCK(hcan);
  658. /* Enable Error warning Interrupt */
  659. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EWG);
  660. /* Enable Error passive Interrupt */
  661. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EPV);
  662. /* Enable Bus-off Interrupt */
  663. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_BOF);
  664. /* Enable Last error code Interrupt */
  665. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_LEC);
  666. /* Enable Error Interrupt */
  667. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_ERR);
  668. /* Enable Transmit mailbox empty Interrupt */
  669. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_TME);
  670. /* Request transmission */
  671. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= CAN_TI0R_TXRQ;
  672. }
  673. }
  674. else
  675. {
  676. return HAL_BUSY;
  677. }
  678. return HAL_OK;
  679. }
  680. /**
  681. * @brief Receives a correct CAN frame.
  682. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  683. * the configuration information for the specified CAN.
  684. * @param FIFONumber: FIFO Number value
  685. * @param Timeout: Specify Timeout value
  686. * @retval HAL status
  687. */
  688. HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef* hcan, uint8_t FIFONumber, uint32_t Timeout)
  689. {
  690. uint32_t tickstart = 0;
  691. /* Check the parameters */
  692. assert_param(IS_CAN_FIFO(FIFONumber));
  693. /* Process locked */
  694. __HAL_LOCK(hcan);
  695. if(hcan->State == HAL_CAN_STATE_BUSY_TX)
  696. {
  697. /* Change CAN state */
  698. hcan->State = HAL_CAN_STATE_BUSY_TX_RX;
  699. }
  700. else
  701. {
  702. /* Change CAN state */
  703. hcan->State = HAL_CAN_STATE_BUSY_RX;
  704. }
  705. /* Get tick */
  706. tickstart = HAL_GetTick();
  707. /* Check pending message */
  708. while(__HAL_CAN_MSG_PENDING(hcan, FIFONumber) == 0)
  709. {
  710. /* Check for the Timeout */
  711. if(Timeout != HAL_MAX_DELAY)
  712. {
  713. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  714. {
  715. hcan->State = HAL_CAN_STATE_TIMEOUT;
  716. /* Process unlocked */
  717. __HAL_UNLOCK(hcan);
  718. return HAL_TIMEOUT;
  719. }
  720. }
  721. }
  722. /* Get the Id */
  723. hcan->pRxMsg->IDE = (uint8_t)0x04 & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;
  724. if (hcan->pRxMsg->IDE == CAN_ID_STD)
  725. {
  726. hcan->pRxMsg->StdId = (uint32_t)0x000007FF & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 21);
  727. }
  728. else
  729. {
  730. hcan->pRxMsg->ExtId = (uint32_t)0x1FFFFFFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 3);
  731. }
  732. hcan->pRxMsg->RTR = (uint8_t)0x02 & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;
  733. /* Get the DLC */
  734. hcan->pRxMsg->DLC = (uint8_t)0x0F & hcan->Instance->sFIFOMailBox[FIFONumber].RDTR;
  735. /* Get the FMI */
  736. hcan->pRxMsg->FMI = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDTR >> 8);
  737. /* Get the data field */
  738. hcan->pRxMsg->Data[0] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDLR;
  739. hcan->pRxMsg->Data[1] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 8);
  740. hcan->pRxMsg->Data[2] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 16);
  741. hcan->pRxMsg->Data[3] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 24);
  742. hcan->pRxMsg->Data[4] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDHR;
  743. hcan->pRxMsg->Data[5] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 8);
  744. hcan->pRxMsg->Data[6] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 16);
  745. hcan->pRxMsg->Data[7] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 24);
  746. /* Release the FIFO */
  747. if(FIFONumber == CAN_FIFO0)
  748. {
  749. /* Release FIFO0 */
  750. __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO0);
  751. }
  752. else /* FIFONumber == CAN_FIFO1 */
  753. {
  754. /* Release FIFO1 */
  755. __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO1);
  756. }
  757. if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX)
  758. {
  759. /* Change CAN state */
  760. hcan->State = HAL_CAN_STATE_BUSY_TX;
  761. /* Process unlocked */
  762. __HAL_UNLOCK(hcan);
  763. }
  764. else
  765. {
  766. /* Change CAN state */
  767. hcan->State = HAL_CAN_STATE_READY;
  768. /* Process unlocked */
  769. __HAL_UNLOCK(hcan);
  770. }
  771. /* Return function status */
  772. return HAL_OK;
  773. }
  774. /**
  775. * @brief Receives a correct CAN frame.
  776. * @param hcan: Pointer to a CAN_HandleTypeDef structure that contains
  777. * the configuration information for the specified CAN.
  778. * @param FIFONumber: Specify the FIFO number
  779. * @retval HAL status
  780. */
  781. HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber)
  782. {
  783. uint32_t tmp = 0;
  784. /* Check the parameters */
  785. assert_param(IS_CAN_FIFO(FIFONumber));
  786. tmp = hcan->State;
  787. if((tmp == HAL_CAN_STATE_READY) || (tmp == HAL_CAN_STATE_BUSY_TX))
  788. {
  789. /* Process locked */
  790. __HAL_LOCK(hcan);
  791. if(hcan->State == HAL_CAN_STATE_BUSY_TX)
  792. {
  793. /* Change CAN state */
  794. hcan->State = HAL_CAN_STATE_BUSY_TX_RX;
  795. }
  796. else
  797. {
  798. /* Change CAN state */
  799. hcan->State = HAL_CAN_STATE_BUSY_RX;
  800. }
  801. /* Set CAN error code to none */
  802. hcan->ErrorCode = HAL_CAN_ERROR_NONE;
  803. /* Enable Error warning Interrupt */
  804. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EWG);
  805. /* Enable Error passive Interrupt */
  806. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EPV);
  807. /* Enable Bus-off Interrupt */
  808. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_BOF);
  809. /* Enable Last error code Interrupt */
  810. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_LEC);
  811. /* Enable Error Interrupt */
  812. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_ERR);
  813. /* Process unlocked */
  814. __HAL_UNLOCK(hcan);
  815. if(FIFONumber == CAN_FIFO0)
  816. {
  817. /* Enable FIFO 0 message pending Interrupt */
  818. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_FMP0);
  819. }
  820. else
  821. {
  822. /* Enable FIFO 1 message pending Interrupt */
  823. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_FMP1);
  824. }
  825. }
  826. else
  827. {
  828. return HAL_BUSY;
  829. }
  830. /* Return function status */
  831. return HAL_OK;
  832. }
  833. /**
  834. * @brief Enters the Sleep (low power) mode.
  835. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  836. * the configuration information for the specified CAN.
  837. * @retval HAL status.
  838. */
  839. HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef* hcan)
  840. {
  841. uint32_t tickstart = 0;
  842. /* Process locked */
  843. __HAL_LOCK(hcan);
  844. /* Change CAN state */
  845. hcan->State = HAL_CAN_STATE_BUSY;
  846. /* Request Sleep mode */
  847. hcan->Instance->MCR = (((hcan->Instance->MCR) & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP);
  848. /* Sleep mode status */
  849. if ((hcan->Instance->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) != CAN_MSR_SLAK)
  850. {
  851. /* Process unlocked */
  852. __HAL_UNLOCK(hcan);
  853. /* Return function status */
  854. return HAL_ERROR;
  855. }
  856. /* Get tick */
  857. tickstart = HAL_GetTick();
  858. /* Wait the acknowledge */
  859. while((hcan->Instance->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) != CAN_MSR_SLAK)
  860. {
  861. if((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
  862. {
  863. hcan->State = HAL_CAN_STATE_TIMEOUT;
  864. /* Process unlocked */
  865. __HAL_UNLOCK(hcan);
  866. return HAL_TIMEOUT;
  867. }
  868. }
  869. /* Change CAN state */
  870. hcan->State = HAL_CAN_STATE_READY;
  871. /* Process unlocked */
  872. __HAL_UNLOCK(hcan);
  873. /* Return function status */
  874. return HAL_OK;
  875. }
  876. /**
  877. * @brief Wakes up the CAN peripheral from sleep mode, after that the CAN peripheral
  878. * is in the normal mode.
  879. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  880. * the configuration information for the specified CAN.
  881. * @retval HAL status.
  882. */
  883. HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef* hcan)
  884. {
  885. uint32_t tickstart = 0;
  886. /* Process locked */
  887. __HAL_LOCK(hcan);
  888. /* Change CAN state */
  889. hcan->State = HAL_CAN_STATE_BUSY;
  890. /* Wake up request */
  891. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_SLEEP;
  892. /* Get tick */
  893. tickstart = HAL_GetTick();
  894. /* Sleep mode status */
  895. while((hcan->Instance->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK)
  896. {
  897. if((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
  898. {
  899. hcan->State= HAL_CAN_STATE_TIMEOUT;
  900. /* Process unlocked */
  901. __HAL_UNLOCK(hcan);
  902. return HAL_TIMEOUT;
  903. }
  904. }
  905. if((hcan->Instance->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK)
  906. {
  907. /* Process unlocked */
  908. __HAL_UNLOCK(hcan);
  909. /* Return function status */
  910. return HAL_ERROR;
  911. }
  912. /* Change CAN state */
  913. hcan->State = HAL_CAN_STATE_READY;
  914. /* Process unlocked */
  915. __HAL_UNLOCK(hcan);
  916. /* Return function status */
  917. return HAL_OK;
  918. }
  919. /**
  920. * @brief Handles CAN interrupt request
  921. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  922. * the configuration information for the specified CAN.
  923. * @retval None
  924. */
  925. void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan)
  926. {
  927. uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
  928. /* Check End of transmission flag */
  929. if(__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_TME))
  930. {
  931. tmp1 = __HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_0);
  932. tmp2 = __HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_1);
  933. tmp3 = __HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_2);
  934. if(tmp1 || tmp2 || tmp3)
  935. {
  936. /* Call transmit function */
  937. CAN_Transmit_IT(hcan);
  938. }
  939. }
  940. tmp1 = __HAL_CAN_MSG_PENDING(hcan, CAN_FIFO0);
  941. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP0);
  942. /* Check End of reception flag for FIFO0 */
  943. if((tmp1 != 0) && tmp2)
  944. {
  945. /* Call receive function */
  946. CAN_Receive_IT(hcan, CAN_FIFO0);
  947. }
  948. tmp1 = __HAL_CAN_MSG_PENDING(hcan, CAN_FIFO1);
  949. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP1);
  950. /* Check End of reception flag for FIFO1 */
  951. if((tmp1 != 0) && tmp2)
  952. {
  953. /* Call receive function */
  954. CAN_Receive_IT(hcan, CAN_FIFO1);
  955. }
  956. tmp1 = __HAL_CAN_GET_FLAG(hcan, CAN_FLAG_EWG);
  957. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_EWG);
  958. tmp3 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR);
  959. /* Check Error Warning Flag */
  960. if(tmp1 && tmp2 && tmp3)
  961. {
  962. /* Set CAN error code to EWG error */
  963. hcan->ErrorCode |= HAL_CAN_ERROR_EWG;
  964. /* Clear Error Warning Flag */
  965. __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_EWG);
  966. }
  967. tmp1 = __HAL_CAN_GET_FLAG(hcan, CAN_FLAG_EPV);
  968. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_EPV);
  969. tmp3 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR);
  970. /* Check Error Passive Flag */
  971. if(tmp1 && tmp2 && tmp3)
  972. {
  973. /* Set CAN error code to EPV error */
  974. hcan->ErrorCode |= HAL_CAN_ERROR_EPV;
  975. /* Clear Error Passive Flag */
  976. __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_EPV);
  977. }
  978. tmp1 = __HAL_CAN_GET_FLAG(hcan, CAN_FLAG_BOF);
  979. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_BOF);
  980. tmp3 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR);
  981. /* Check Bus-Off Flag */
  982. if(tmp1 && tmp2 && tmp3)
  983. {
  984. /* Set CAN error code to BOF error */
  985. hcan->ErrorCode |= HAL_CAN_ERROR_BOF;
  986. /* Clear Bus-Off Flag */
  987. __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_BOF);
  988. }
  989. tmp1 = HAL_IS_BIT_CLR(hcan->Instance->ESR, CAN_ESR_LEC);
  990. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_LEC);
  991. tmp3 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR);
  992. /* Check Last error code Flag */
  993. if((!tmp1) && tmp2 && tmp3)
  994. {
  995. tmp1 = (hcan->Instance->ESR) & CAN_ESR_LEC;
  996. switch(tmp1)
  997. {
  998. case(CAN_ESR_LEC_0):
  999. /* Set CAN error code to STF error */
  1000. hcan->ErrorCode |= HAL_CAN_ERROR_STF;
  1001. break;
  1002. case(CAN_ESR_LEC_1):
  1003. /* Set CAN error code to FOR error */
  1004. hcan->ErrorCode |= HAL_CAN_ERROR_FOR;
  1005. break;
  1006. case(CAN_ESR_LEC_1 | CAN_ESR_LEC_0):
  1007. /* Set CAN error code to ACK error */
  1008. hcan->ErrorCode |= HAL_CAN_ERROR_ACK;
  1009. break;
  1010. case(CAN_ESR_LEC_2):
  1011. /* Set CAN error code to BR error */
  1012. hcan->ErrorCode |= HAL_CAN_ERROR_BR;
  1013. break;
  1014. case(CAN_ESR_LEC_2 | CAN_ESR_LEC_0):
  1015. /* Set CAN error code to BD error */
  1016. hcan->ErrorCode |= HAL_CAN_ERROR_BD;
  1017. break;
  1018. case(CAN_ESR_LEC_2 | CAN_ESR_LEC_1):
  1019. /* Set CAN error code to CRC error */
  1020. hcan->ErrorCode |= HAL_CAN_ERROR_CRC;
  1021. break;
  1022. default:
  1023. break;
  1024. }
  1025. /* Clear Last error code Flag */
  1026. hcan->Instance->ESR &= ~(CAN_ESR_LEC);
  1027. }
  1028. /* Call the Error call Back in case of Errors */
  1029. if(hcan->ErrorCode != HAL_CAN_ERROR_NONE)
  1030. {
  1031. /* Set the CAN state ready to be able to start again the process */
  1032. hcan->State = HAL_CAN_STATE_READY;
  1033. /* Call Error callback function */
  1034. HAL_CAN_ErrorCallback(hcan);
  1035. }
  1036. }
  1037. /**
  1038. * @brief Transmission complete callback in non blocking mode
  1039. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1040. * the configuration information for the specified CAN.
  1041. * @retval None
  1042. */
  1043. __weak void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan)
  1044. {
  1045. /* NOTE : This function Should not be modified, when the callback is needed,
  1046. the HAL_CAN_TxCpltCallback could be implemented in the user file
  1047. */
  1048. }
  1049. /**
  1050. * @brief Transmission complete callback in non blocking mode
  1051. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1052. * the configuration information for the specified CAN.
  1053. * @retval None
  1054. */
  1055. __weak void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan)
  1056. {
  1057. /* NOTE : This function Should not be modified, when the callback is needed,
  1058. the HAL_CAN_RxCpltCallback could be implemented in the user file
  1059. */
  1060. }
  1061. /**
  1062. * @brief Error CAN callback.
  1063. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1064. * the configuration information for the specified CAN.
  1065. * @retval None
  1066. */
  1067. __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan)
  1068. {
  1069. /* NOTE : This function Should not be modified, when the callback is needed,
  1070. the HAL_CAN_ErrorCallback could be implemented in the user file
  1071. */
  1072. }
  1073. /**
  1074. * @}
  1075. */
  1076. /** @defgroup CAN_Exported_Functions_Group3 Peripheral State and Error functions
  1077. * @brief CAN Peripheral State functions
  1078. *
  1079. @verbatim
  1080. ==============================================================================
  1081. ##### Peripheral State and Error functions #####
  1082. ==============================================================================
  1083. [..]
  1084. This subsection provides functions allowing to :
  1085. (+) Check the CAN state.
  1086. (+) Check CAN Errors detected during interrupt process
  1087. @endverbatim
  1088. * @{
  1089. */
  1090. /**
  1091. * @brief return the CAN state
  1092. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1093. * the configuration information for the specified CAN.
  1094. * @retval HAL state
  1095. */
  1096. HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan)
  1097. {
  1098. /* Return CAN state */
  1099. return hcan->State;
  1100. }
  1101. /**
  1102. * @brief Return the CAN error code
  1103. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1104. * the configuration information for the specified CAN.
  1105. * @retval CAN Error Code
  1106. */
  1107. uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan)
  1108. {
  1109. return hcan->ErrorCode;
  1110. }
  1111. /**
  1112. * @}
  1113. */
  1114. /**
  1115. * @brief Initiates and transmits a CAN frame message.
  1116. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1117. * the configuration information for the specified CAN.
  1118. * @retval HAL status
  1119. */
  1120. static HAL_StatusTypeDef CAN_Transmit_IT(CAN_HandleTypeDef* hcan)
  1121. {
  1122. /* Disable Transmit mailbox empty Interrupt */
  1123. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_TME);
  1124. if(hcan->State == HAL_CAN_STATE_BUSY_TX)
  1125. {
  1126. /* Disable Error warning Interrupt */
  1127. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EWG);
  1128. /* Disable Error passive Interrupt */
  1129. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EPV);
  1130. /* Disable Bus-off Interrupt */
  1131. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_BOF);
  1132. /* Disable Last error code Interrupt */
  1133. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_LEC);
  1134. /* Disable Error Interrupt */
  1135. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_ERR);
  1136. }
  1137. if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX)
  1138. {
  1139. /* Change CAN state */
  1140. hcan->State = HAL_CAN_STATE_BUSY_RX;
  1141. }
  1142. else
  1143. {
  1144. /* Change CAN state */
  1145. hcan->State = HAL_CAN_STATE_READY;
  1146. }
  1147. /* Transmission complete callback */
  1148. HAL_CAN_TxCpltCallback(hcan);
  1149. return HAL_OK;
  1150. }
  1151. /**
  1152. * @brief Receives a correct CAN frame.
  1153. * @param hcan: Pointer to a CAN_HandleTypeDef structure that contains
  1154. * the configuration information for the specified CAN.
  1155. * @param FIFONumber: Specify the FIFO number
  1156. * @retval HAL status
  1157. * @retval None
  1158. */
  1159. static HAL_StatusTypeDef CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber)
  1160. {
  1161. /* Get the Id */
  1162. hcan->pRxMsg->IDE = (uint8_t)0x04 & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;
  1163. if (hcan->pRxMsg->IDE == CAN_ID_STD)
  1164. {
  1165. hcan->pRxMsg->StdId = (uint32_t)0x000007FF & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 21);
  1166. }
  1167. else
  1168. {
  1169. hcan->pRxMsg->ExtId = (uint32_t)0x1FFFFFFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 3);
  1170. }
  1171. hcan->pRxMsg->RTR = (uint8_t)0x02 & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;
  1172. /* Get the DLC */
  1173. hcan->pRxMsg->DLC = (uint8_t)0x0F & hcan->Instance->sFIFOMailBox[FIFONumber].RDTR;
  1174. /* Get the FMI */
  1175. hcan->pRxMsg->FMI = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDTR >> 8);
  1176. /* Get the data field */
  1177. hcan->pRxMsg->Data[0] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDLR;
  1178. hcan->pRxMsg->Data[1] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 8);
  1179. hcan->pRxMsg->Data[2] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 16);
  1180. hcan->pRxMsg->Data[3] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 24);
  1181. hcan->pRxMsg->Data[4] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDHR;
  1182. hcan->pRxMsg->Data[5] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 8);
  1183. hcan->pRxMsg->Data[6] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 16);
  1184. hcan->pRxMsg->Data[7] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 24);
  1185. /* Release the FIFO */
  1186. /* Release FIFO0 */
  1187. if (FIFONumber == CAN_FIFO0)
  1188. {
  1189. __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO0);
  1190. /* Disable FIFO 0 message pending Interrupt */
  1191. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_FMP0);
  1192. }
  1193. /* Release FIFO1 */
  1194. else /* FIFONumber == CAN_FIFO1 */
  1195. {
  1196. __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO1);
  1197. /* Disable FIFO 1 message pending Interrupt */
  1198. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_FMP1);
  1199. }
  1200. if(hcan->State == HAL_CAN_STATE_BUSY_RX)
  1201. {
  1202. /* Disable Error warning Interrupt */
  1203. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EWG);
  1204. /* Disable Error passive Interrupt */
  1205. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EPV);
  1206. /* Disable Bus-off Interrupt */
  1207. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_BOF);
  1208. /* Disable Last error code Interrupt */
  1209. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_LEC);
  1210. /* Disable Error Interrupt */
  1211. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_ERR);
  1212. }
  1213. if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX)
  1214. {
  1215. /* Disable CAN state */
  1216. hcan->State = HAL_CAN_STATE_BUSY_TX;
  1217. }
  1218. else
  1219. {
  1220. /* Change CAN state */
  1221. hcan->State = HAL_CAN_STATE_READY;
  1222. }
  1223. /* Receive complete callback */
  1224. HAL_CAN_RxCpltCallback(hcan);
  1225. /* Return function status */
  1226. return HAL_OK;
  1227. }
  1228. /**
  1229. * @}
  1230. */
  1231. #endif /* HAL_CAN_MODULE_ENABLED */
  1232. /**
  1233. * @}
  1234. */
  1235. /**
  1236. * @}
  1237. */
  1238. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/