stm32f7xx_hal_hash.c 57 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f7xx_hal_hash.c
  4. * @author MCD Application Team
  5. * @version V1.0.1
  6. * @date 25-June-2015
  7. * @brief HASH HAL module driver.
  8. * This file provides firmware functions to manage the following
  9. * functionalities of the HASH peripheral:
  10. * + Initialization and de-initialization functions
  11. * + HASH/HMAC Processing functions by algorithm using polling mode
  12. * + HASH/HMAC functions by algorithm using interrupt mode
  13. * + HASH/HMAC functions by algorithm using DMA mode
  14. * + Peripheral State functions
  15. *
  16. @verbatim
  17. ==============================================================================
  18. ##### How to use this driver #####
  19. ==============================================================================
  20. [..]
  21. The HASH HAL driver can be used as follows:
  22. (#)Initialize the HASH low level resources by implementing the HAL_HASH_MspInit():
  23. (##) Enable the HASH interface clock using __HAL_RCC_HASH_CLK_ENABLE()
  24. (##) In case of using processing APIs based on interrupts (e.g. HAL_HMAC_SHA1_Start_IT())
  25. (+++) Configure the HASH interrupt priority using HAL_NVIC_SetPriority()
  26. (+++) Enable the HASH IRQ handler using HAL_NVIC_EnableIRQ()
  27. (+++) In HASH IRQ handler, call HAL_HASH_IRQHandler()
  28. (##) In case of using DMA to control data transfer (e.g. HAL_HMAC_SHA1_Start_DMA())
  29. (+++) Enable the DMAx interface clock using __DMAx_CLK_ENABLE()
  30. (+++) Configure and enable one DMA stream one for managing data transfer from
  31. memory to peripheral (input stream). Managing data transfer from
  32. peripheral to memory can be performed only using CPU
  33. (+++) Associate the initialized DMA handle to the HASH DMA handle
  34. using __HAL_LINKDMA()
  35. (+++) Configure the priority and enable the NVIC for the transfer complete
  36. interrupt on the DMA Stream using HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ()
  37. (#)Initialize the HASH HAL using HAL_HASH_Init(). This function configures mainly:
  38. (##) The data type: 1-bit, 8-bit, 16-bit and 32-bit.
  39. (##) For HMAC, the encryption key.
  40. (##) For HMAC, the key size used for encryption.
  41. (#)Three processing functions are available:
  42. (##) Polling mode: processing APIs are blocking functions
  43. i.e. they process the data and wait till the digest computation is finished
  44. e.g. HAL_HASH_SHA1_Start()
  45. (##) Interrupt mode: encryption and decryption APIs are not blocking functions
  46. i.e. they process the data under interrupt
  47. e.g. HAL_HASH_SHA1_Start_IT()
  48. (##) DMA mode: processing APIs are not blocking functions and the CPU is
  49. not used for data transfer i.e. the data transfer is ensured by DMA
  50. e.g. HAL_HASH_SHA1_Start_DMA()
  51. (#)When the processing function is called at first time after HAL_HASH_Init()
  52. the HASH peripheral is initialized and processes the buffer in input.
  53. After that, the digest computation is started.
  54. When processing multi-buffer use the accumulate function to write the
  55. data in the peripheral without starting the digest computation. In last
  56. buffer use the start function to input the last buffer ans start the digest
  57. computation.
  58. (##) e.g. HAL_HASH_SHA1_Accumulate() : write 1st data buffer in the peripheral without starting the digest computation
  59. (##) write (n-1)th data buffer in the peripheral without starting the digest computation
  60. (##) HAL_HASH_SHA1_Start() : write (n)th data buffer in the peripheral and start the digest computation
  61. (#)In HMAC mode, there is no Accumulate API. Only Start API is available.
  62. (#)In case of using DMA, call the DMA start processing e.g. HAL_HASH_SHA1_Start_DMA().
  63. After that, call the finish function in order to get the digest value
  64. e.g. HAL_HASH_SHA1_Finish()
  65. (#)Call HAL_HASH_DeInit() to deinitialize the HASH peripheral.
  66. @endverbatim
  67. ******************************************************************************
  68. * @attention
  69. *
  70. * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
  71. *
  72. * Redistribution and use in source and binary forms, with or without modification,
  73. * are permitted provided that the following conditions are met:
  74. * 1. Redistributions of source code must retain the above copyright notice,
  75. * this list of conditions and the following disclaimer.
  76. * 2. Redistributions in binary form must reproduce the above copyright notice,
  77. * this list of conditions and the following disclaimer in the documentation
  78. * and/or other materials provided with the distribution.
  79. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  80. * may be used to endorse or promote products derived from this software
  81. * without specific prior written permission.
  82. *
  83. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  84. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  85. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  86. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  87. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  88. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  89. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  90. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  91. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  92. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  93. *
  94. ******************************************************************************
  95. */
  96. /* Includes ------------------------------------------------------------------*/
  97. #include "stm32f7xx_hal.h"
  98. /** @addtogroup STM32F7xx_HAL_Driver
  99. * @{
  100. */
  101. #if defined(STM32F756xx)
  102. /** @defgroup HASH HASH
  103. * @brief HASH HAL module driver.
  104. * @{
  105. */
  106. #ifdef HAL_HASH_MODULE_ENABLED
  107. /* Private typedef -----------------------------------------------------------*/
  108. /* Private define ------------------------------------------------------------*/
  109. /* Private macro -------------------------------------------------------------*/
  110. /* Private variables ---------------------------------------------------------*/
  111. /* Private function prototypes -----------------------------------------------*/
  112. /** @defgroup HASH_Private_Functions HASH Private Functions
  113. * @{
  114. */
  115. static void HASH_DMAXferCplt(DMA_HandleTypeDef *hdma);
  116. static void HASH_DMAError(DMA_HandleTypeDef *hdma);
  117. static void HASH_GetDigest(uint8_t *pMsgDigest, uint8_t Size);
  118. static void HASH_WriteData(uint8_t *pInBuffer, uint32_t Size);
  119. /**
  120. * @}
  121. */
  122. /* Private functions ---------------------------------------------------------*/
  123. /** @addtogroup HASH_Private_Functions
  124. * @{
  125. */
  126. /**
  127. * @brief DMA HASH Input Data complete callback.
  128. * @param hdma: DMA handle
  129. * @retval None
  130. */
  131. static void HASH_DMAXferCplt(DMA_HandleTypeDef *hdma)
  132. {
  133. HASH_HandleTypeDef* hhash = ( HASH_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  134. uint32_t inputaddr = 0;
  135. uint32_t buffersize = 0;
  136. if((HASH->CR & HASH_CR_MODE) != HASH_CR_MODE)
  137. {
  138. /* Disable the DMA transfer */
  139. HASH->CR &= (uint32_t)(~HASH_CR_DMAE);
  140. /* Change HASH peripheral state */
  141. hhash->State = HAL_HASH_STATE_READY;
  142. /* Call Input data transfer complete callback */
  143. HAL_HASH_InCpltCallback(hhash);
  144. }
  145. else
  146. {
  147. /* Increment Interrupt counter */
  148. hhash->HashInCount++;
  149. /* Disable the DMA transfer before starting the next transfer */
  150. HASH->CR &= (uint32_t)(~HASH_CR_DMAE);
  151. if(hhash->HashInCount <= 2)
  152. {
  153. /* In case HashInCount = 1, set the DMA to transfer data to HASH DIN register */
  154. if(hhash->HashInCount == 1)
  155. {
  156. inputaddr = (uint32_t)hhash->pHashInBuffPtr;
  157. buffersize = hhash->HashBuffSize;
  158. }
  159. /* In case HashInCount = 2, set the DMA to transfer key to HASH DIN register */
  160. else if(hhash->HashInCount == 2)
  161. {
  162. inputaddr = (uint32_t)hhash->Init.pKey;
  163. buffersize = hhash->Init.KeySize;
  164. }
  165. /* Configure the number of valid bits in last word of the message */
  166. MODIFY_REG(HASH->STR, HASH_STR_NBLW, 8 * (buffersize % 4));
  167. /* Set the HASH DMA transfer complete */
  168. hhash->hdmain->XferCpltCallback = HASH_DMAXferCplt;
  169. /* Enable the DMA In DMA Stream */
  170. HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (buffersize%4 ? (buffersize+3)/4:buffersize/4));
  171. /* Enable DMA requests */
  172. HASH->CR |= (HASH_CR_DMAE);
  173. }
  174. else
  175. {
  176. /* Disable the DMA transfer */
  177. HASH->CR &= (uint32_t)(~HASH_CR_DMAE);
  178. /* Reset the InCount */
  179. hhash->HashInCount = 0;
  180. /* Change HASH peripheral state */
  181. hhash->State = HAL_HASH_STATE_READY;
  182. /* Call Input data transfer complete callback */
  183. HAL_HASH_InCpltCallback(hhash);
  184. }
  185. }
  186. }
  187. /**
  188. * @brief DMA HASH communication error callback.
  189. * @param hdma: DMA handle
  190. * @retval None
  191. */
  192. static void HASH_DMAError(DMA_HandleTypeDef *hdma)
  193. {
  194. HASH_HandleTypeDef* hhash = ( HASH_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  195. hhash->State= HAL_HASH_STATE_READY;
  196. HAL_HASH_ErrorCallback(hhash);
  197. }
  198. /**
  199. * @brief Writes the input buffer in data register.
  200. * @param pInBuffer: Pointer to input buffer
  201. * @param Size: The size of input buffer
  202. * @retval None
  203. */
  204. static void HASH_WriteData(uint8_t *pInBuffer, uint32_t Size)
  205. {
  206. uint32_t buffercounter;
  207. uint32_t inputaddr = (uint32_t) pInBuffer;
  208. for(buffercounter = 0; buffercounter < Size; buffercounter+=4)
  209. {
  210. HASH->DIN = *(uint32_t*)inputaddr;
  211. inputaddr+=4;
  212. }
  213. }
  214. /**
  215. * @brief Provides the message digest result.
  216. * @param pMsgDigest: Pointer to the message digest
  217. * @param Size: The size of the message digest in bytes
  218. * @retval None
  219. */
  220. static void HASH_GetDigest(uint8_t *pMsgDigest, uint8_t Size)
  221. {
  222. uint32_t msgdigest = (uint32_t)pMsgDigest;
  223. switch(Size)
  224. {
  225. case 16:
  226. /* Read the message digest */
  227. *(uint32_t*)(msgdigest) = __REV(HASH->HR[0]);
  228. msgdigest+=4;
  229. *(uint32_t*)(msgdigest) = __REV(HASH->HR[1]);
  230. msgdigest+=4;
  231. *(uint32_t*)(msgdigest) = __REV(HASH->HR[2]);
  232. msgdigest+=4;
  233. *(uint32_t*)(msgdigest) = __REV(HASH->HR[3]);
  234. break;
  235. case 20:
  236. /* Read the message digest */
  237. *(uint32_t*)(msgdigest) = __REV(HASH->HR[0]);
  238. msgdigest+=4;
  239. *(uint32_t*)(msgdigest) = __REV(HASH->HR[1]);
  240. msgdigest+=4;
  241. *(uint32_t*)(msgdigest) = __REV(HASH->HR[2]);
  242. msgdigest+=4;
  243. *(uint32_t*)(msgdigest) = __REV(HASH->HR[3]);
  244. msgdigest+=4;
  245. *(uint32_t*)(msgdigest) = __REV(HASH->HR[4]);
  246. break;
  247. case 28:
  248. /* Read the message digest */
  249. *(uint32_t*)(msgdigest) = __REV(HASH->HR[0]);
  250. msgdigest+=4;
  251. *(uint32_t*)(msgdigest) = __REV(HASH->HR[1]);
  252. msgdigest+=4;
  253. *(uint32_t*)(msgdigest) = __REV(HASH->HR[2]);
  254. msgdigest+=4;
  255. *(uint32_t*)(msgdigest) = __REV(HASH->HR[3]);
  256. msgdigest+=4;
  257. *(uint32_t*)(msgdigest) = __REV(HASH->HR[4]);
  258. msgdigest+=4;
  259. *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[5]);
  260. msgdigest+=4;
  261. *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[6]);
  262. break;
  263. case 32:
  264. /* Read the message digest */
  265. *(uint32_t*)(msgdigest) = __REV(HASH->HR[0]);
  266. msgdigest+=4;
  267. *(uint32_t*)(msgdigest) = __REV(HASH->HR[1]);
  268. msgdigest+=4;
  269. *(uint32_t*)(msgdigest) = __REV(HASH->HR[2]);
  270. msgdigest+=4;
  271. *(uint32_t*)(msgdigest) = __REV(HASH->HR[3]);
  272. msgdigest+=4;
  273. *(uint32_t*)(msgdigest) = __REV(HASH->HR[4]);
  274. msgdigest+=4;
  275. *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[5]);
  276. msgdigest+=4;
  277. *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[6]);
  278. msgdigest+=4;
  279. *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[7]);
  280. break;
  281. default:
  282. break;
  283. }
  284. }
  285. /**
  286. * @}
  287. */
  288. /* Exported functions --------------------------------------------------------*/
  289. /** @addtogroup HASH_Exported_Functions
  290. * @{
  291. */
  292. /** @addtogroup HASH_Exported_Functions_Group1 Initialization and de-initialization functions
  293. * @brief Initialization and Configuration functions.
  294. *
  295. @verbatim
  296. ===============================================================================
  297. ##### Initialization and de-initialization functions #####
  298. ===============================================================================
  299. [..] This section provides functions allowing to:
  300. (+) Initialize the HASH according to the specified parameters
  301. in the HASH_InitTypeDef and creates the associated handle.
  302. (+) DeInitialize the HASH peripheral.
  303. (+) Initialize the HASH MSP.
  304. (+) DeInitialize HASH MSP.
  305. @endverbatim
  306. * @{
  307. */
  308. /**
  309. * @brief Initializes the HASH according to the specified parameters in the
  310. HASH_HandleTypeDef and creates the associated handle.
  311. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  312. * the configuration information for HASH module
  313. * @retval HAL status
  314. */
  315. HAL_StatusTypeDef HAL_HASH_Init(HASH_HandleTypeDef *hhash)
  316. {
  317. /* Check the hash handle allocation */
  318. if(hhash == NULL)
  319. {
  320. return HAL_ERROR;
  321. }
  322. /* Check the parameters */
  323. assert_param(IS_HASH_DATATYPE(hhash->Init.DataType));
  324. if(hhash->State == HAL_HASH_STATE_RESET)
  325. {
  326. /* Allocate lock resource and initialize it */
  327. hhash->Lock = HAL_UNLOCKED;
  328. /* Init the low level hardware */
  329. HAL_HASH_MspInit(hhash);
  330. }
  331. /* Change the HASH state */
  332. hhash->State = HAL_HASH_STATE_BUSY;
  333. /* Reset HashInCount, HashBuffSize and HashITCounter */
  334. hhash->HashInCount = 0;
  335. hhash->HashBuffSize = 0;
  336. hhash->HashITCounter = 0;
  337. /* Set the data type */
  338. HASH->CR |= (uint32_t) (hhash->Init.DataType);
  339. /* Change the HASH state */
  340. hhash->State = HAL_HASH_STATE_READY;
  341. /* Set the default HASH phase */
  342. hhash->Phase = HAL_HASH_PHASE_READY;
  343. /* Return function status */
  344. return HAL_OK;
  345. }
  346. /**
  347. * @brief DeInitializes the HASH peripheral.
  348. * @note This API must be called before starting a new processing.
  349. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  350. * the configuration information for HASH module
  351. * @retval HAL status
  352. */
  353. HAL_StatusTypeDef HAL_HASH_DeInit(HASH_HandleTypeDef *hhash)
  354. {
  355. /* Check the HASH handle allocation */
  356. if(hhash == NULL)
  357. {
  358. return HAL_ERROR;
  359. }
  360. /* Change the HASH state */
  361. hhash->State = HAL_HASH_STATE_BUSY;
  362. /* Set the default HASH phase */
  363. hhash->Phase = HAL_HASH_PHASE_READY;
  364. /* Reset HashInCount, HashBuffSize and HashITCounter */
  365. hhash->HashInCount = 0;
  366. hhash->HashBuffSize = 0;
  367. hhash->HashITCounter = 0;
  368. /* DeInit the low level hardware */
  369. HAL_HASH_MspDeInit(hhash);
  370. /* Change the HASH state */
  371. hhash->State = HAL_HASH_STATE_RESET;
  372. /* Release Lock */
  373. __HAL_UNLOCK(hhash);
  374. /* Return function status */
  375. return HAL_OK;
  376. }
  377. /**
  378. * @brief Initializes the HASH MSP.
  379. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  380. * the configuration information for HASH module
  381. * @retval None
  382. */
  383. __weak void HAL_HASH_MspInit(HASH_HandleTypeDef *hhash)
  384. {
  385. /* NOTE: This function Should not be modified, when the callback is needed,
  386. the HAL_HASH_MspInit could be implemented in the user file
  387. */
  388. }
  389. /**
  390. * @brief DeInitializes HASH MSP.
  391. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  392. * the configuration information for HASH module
  393. * @retval None
  394. */
  395. __weak void HAL_HASH_MspDeInit(HASH_HandleTypeDef *hhash)
  396. {
  397. /* NOTE: This function Should not be modified, when the callback is needed,
  398. the HAL_HASH_MspDeInit could be implemented in the user file
  399. */
  400. }
  401. /**
  402. * @brief Input data transfer complete callback.
  403. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  404. * the configuration information for HASH module
  405. * @retval None
  406. */
  407. __weak void HAL_HASH_InCpltCallback(HASH_HandleTypeDef *hhash)
  408. {
  409. /* NOTE: This function Should not be modified, when the callback is needed,
  410. the HAL_HASH_InCpltCallback could be implemented in the user file
  411. */
  412. }
  413. /**
  414. * @brief Data transfer Error callback.
  415. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  416. * the configuration information for HASH module
  417. * @retval None
  418. */
  419. __weak void HAL_HASH_ErrorCallback(HASH_HandleTypeDef *hhash)
  420. {
  421. /* NOTE: This function Should not be modified, when the callback is needed,
  422. the HAL_HASH_ErrorCallback could be implemented in the user file
  423. */
  424. }
  425. /**
  426. * @brief Digest computation complete callback. It is used only with interrupt.
  427. * @note This callback is not relevant with DMA.
  428. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  429. * the configuration information for HASH module
  430. * @retval None
  431. */
  432. __weak void HAL_HASH_DgstCpltCallback(HASH_HandleTypeDef *hhash)
  433. {
  434. /* NOTE: This function Should not be modified, when the callback is needed,
  435. the HAL_HASH_DgstCpltCallback could be implemented in the user file
  436. */
  437. }
  438. /**
  439. * @}
  440. */
  441. /** @defgroup HASH_Exported_Functions_Group2 HASH processing functions using polling mode
  442. * @brief processing functions using polling mode
  443. *
  444. @verbatim
  445. ===============================================================================
  446. ##### HASH processing using polling mode functions#####
  447. ===============================================================================
  448. [..] This section provides functions allowing to calculate in polling mode
  449. the hash value using one of the following algorithms:
  450. (+) MD5
  451. (+) SHA1
  452. @endverbatim
  453. * @{
  454. */
  455. /**
  456. * @brief Initializes the HASH peripheral in MD5 mode then processes pInBuffer.
  457. The digest is available in pOutBuffer.
  458. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  459. * the configuration information for HASH module
  460. * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
  461. * @param Size: Length of the input buffer in bytes.
  462. * If the Size is multiple of 64 bytes, appending the input buffer is possible.
  463. * If the Size is not multiple of 64 bytes, the padding is managed by hardware
  464. * and appending the input buffer is no more possible.
  465. * @param pOutBuffer: Pointer to the computed digest. Its size must be 16 bytes.
  466. * @param Timeout: Timeout value
  467. * @retval HAL status
  468. */
  469. HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
  470. {
  471. uint32_t tickstart = 0;
  472. /* Process Locked */
  473. __HAL_LOCK(hhash);
  474. /* Change the HASH state */
  475. hhash->State = HAL_HASH_STATE_BUSY;
  476. /* Check if initialization phase has already been performed */
  477. if(hhash->Phase == HAL_HASH_PHASE_READY)
  478. {
  479. /* Select the MD5 mode and reset the HASH processor core, so that the HASH will be ready to compute
  480. the message digest of a new message */
  481. HASH->CR |= HASH_ALGOSELECTION_MD5 | HASH_CR_INIT;
  482. }
  483. /* Set the phase */
  484. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  485. /* Configure the number of valid bits in last word of the message */
  486. __HAL_HASH_SET_NBVALIDBITS(Size);
  487. /* Write input buffer in data register */
  488. HASH_WriteData(pInBuffer, Size);
  489. /* Start the digest calculation */
  490. __HAL_HASH_START_DIGEST();
  491. /* Get tick */
  492. tickstart = HAL_GetTick();
  493. while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
  494. {
  495. /* Check for the Timeout */
  496. if(Timeout != HAL_MAX_DELAY)
  497. {
  498. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  499. {
  500. /* Change state */
  501. hhash->State = HAL_HASH_STATE_TIMEOUT;
  502. /* Process Unlocked */
  503. __HAL_UNLOCK(hhash);
  504. return HAL_TIMEOUT;
  505. }
  506. }
  507. }
  508. /* Read the message digest */
  509. HASH_GetDigest(pOutBuffer, 16);
  510. /* Change the HASH state */
  511. hhash->State = HAL_HASH_STATE_READY;
  512. /* Process Unlocked */
  513. __HAL_UNLOCK(hhash);
  514. /* Return function status */
  515. return HAL_OK;
  516. }
  517. /**
  518. * @brief Initializes the HASH peripheral in MD5 mode then writes the pInBuffer.
  519. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  520. * the configuration information for HASH module
  521. * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
  522. * @param Size: Length of the input buffer in bytes.
  523. * If the Size is multiple of 64 bytes, appending the input buffer is possible.
  524. * If the Size is not multiple of 64 bytes, the padding is managed by hardware
  525. * and appending the input buffer is no more possible.
  526. * @retval HAL status
  527. */
  528. HAL_StatusTypeDef HAL_HASH_MD5_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
  529. {
  530. /* Process Locked */
  531. __HAL_LOCK(hhash);
  532. /* Change the HASH state */
  533. hhash->State = HAL_HASH_STATE_BUSY;
  534. /* Check if initialization phase has already been performed */
  535. if(hhash->Phase == HAL_HASH_PHASE_READY)
  536. {
  537. /* Select the MD5 mode and reset the HASH processor core, so that the HASH will be ready to compute
  538. the message digest of a new message */
  539. HASH->CR |= HASH_ALGOSELECTION_MD5 | HASH_CR_INIT;
  540. }
  541. /* Set the phase */
  542. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  543. /* Configure the number of valid bits in last word of the message */
  544. __HAL_HASH_SET_NBVALIDBITS(Size);
  545. /* Write input buffer in data register */
  546. HASH_WriteData(pInBuffer, Size);
  547. /* Change the HASH state */
  548. hhash->State = HAL_HASH_STATE_READY;
  549. /* Process Unlocked */
  550. __HAL_UNLOCK(hhash);
  551. /* Return function status */
  552. return HAL_OK;
  553. }
  554. /**
  555. * @brief Initializes the HASH peripheral in SHA1 mode then processes pInBuffer.
  556. The digest is available in pOutBuffer.
  557. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  558. * the configuration information for HASH module
  559. * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
  560. * @param Size: Length of the input buffer in bytes.
  561. * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
  562. * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
  563. * @param Timeout: Timeout value
  564. * @retval HAL status
  565. */
  566. HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
  567. {
  568. uint32_t tickstart = 0;
  569. /* Process Locked */
  570. __HAL_LOCK(hhash);
  571. /* Change the HASH state */
  572. hhash->State = HAL_HASH_STATE_BUSY;
  573. /* Check if initialization phase has already been performed */
  574. if(hhash->Phase == HAL_HASH_PHASE_READY)
  575. {
  576. /* Select the SHA1 mode and reset the HASH processor core, so that the HASH will be ready to compute
  577. the message digest of a new message */
  578. HASH->CR |= HASH_ALGOSELECTION_SHA1 | HASH_CR_INIT;
  579. }
  580. /* Set the phase */
  581. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  582. /* Configure the number of valid bits in last word of the message */
  583. __HAL_HASH_SET_NBVALIDBITS(Size);
  584. /* Write input buffer in data register */
  585. HASH_WriteData(pInBuffer, Size);
  586. /* Start the digest calculation */
  587. __HAL_HASH_START_DIGEST();
  588. /* Get tick */
  589. tickstart = HAL_GetTick();
  590. while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
  591. {
  592. /* Check for the Timeout */
  593. if(Timeout != HAL_MAX_DELAY)
  594. {
  595. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  596. {
  597. /* Change state */
  598. hhash->State = HAL_HASH_STATE_TIMEOUT;
  599. /* Process Unlocked */
  600. __HAL_UNLOCK(hhash);
  601. return HAL_TIMEOUT;
  602. }
  603. }
  604. }
  605. /* Read the message digest */
  606. HASH_GetDigest(pOutBuffer, 20);
  607. /* Change the HASH state */
  608. hhash->State = HAL_HASH_STATE_READY;
  609. /* Process Unlocked */
  610. __HAL_UNLOCK(hhash);
  611. /* Return function status */
  612. return HAL_OK;
  613. }
  614. /**
  615. * @brief Initializes the HASH peripheral in SHA1 mode then processes pInBuffer.
  616. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  617. * the configuration information for HASH module
  618. * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
  619. * @param Size: Length of the input buffer in bytes.
  620. * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
  621. * @note Input buffer size in bytes must be a multiple of 4 otherwise the digest computation is corrupted.
  622. * @retval HAL status
  623. */
  624. HAL_StatusTypeDef HAL_HASH_SHA1_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
  625. {
  626. /* Check the parameters */
  627. assert_param(IS_HASH_SHA1_BUFFER_SIZE(Size));
  628. /* Process Locked */
  629. __HAL_LOCK(hhash);
  630. /* Change the HASH state */
  631. hhash->State = HAL_HASH_STATE_BUSY;
  632. /* Check if initialization phase has already been performed */
  633. if(hhash->Phase == HAL_HASH_PHASE_READY)
  634. {
  635. /* Select the SHA1 mode and reset the HASH processor core, so that the HASH will be ready to compute
  636. the message digest of a new message */
  637. HASH->CR |= HASH_ALGOSELECTION_SHA1 | HASH_CR_INIT;
  638. }
  639. /* Set the phase */
  640. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  641. /* Configure the number of valid bits in last word of the message */
  642. __HAL_HASH_SET_NBVALIDBITS(Size);
  643. /* Write input buffer in data register */
  644. HASH_WriteData(pInBuffer, Size);
  645. /* Change the HASH state */
  646. hhash->State = HAL_HASH_STATE_READY;
  647. /* Process Unlocked */
  648. __HAL_UNLOCK(hhash);
  649. /* Return function status */
  650. return HAL_OK;
  651. }
  652. /**
  653. * @}
  654. */
  655. /** @defgroup HASH_Exported_Functions_Group3 HASH processing functions using interrupt mode
  656. * @brief processing functions using interrupt mode.
  657. *
  658. @verbatim
  659. ===============================================================================
  660. ##### HASH processing using interrupt mode functions #####
  661. ===============================================================================
  662. [..] This section provides functions allowing to calculate in interrupt mode
  663. the hash value using one of the following algorithms:
  664. (+) MD5
  665. (+) SHA1
  666. @endverbatim
  667. * @{
  668. */
  669. /**
  670. * @brief Initializes the HASH peripheral in MD5 mode then processes pInBuffer.
  671. * The digest is available in pOutBuffer.
  672. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  673. * the configuration information for HASH module
  674. * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
  675. * @param Size: Length of the input buffer in bytes.
  676. * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
  677. * @param pOutBuffer: Pointer to the computed digest. Its size must be 16 bytes.
  678. * @retval HAL status
  679. */
  680. HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer)
  681. {
  682. uint32_t inputaddr;
  683. uint32_t outputaddr;
  684. uint32_t buffercounter;
  685. uint32_t inputcounter;
  686. /* Process Locked */
  687. __HAL_LOCK(hhash);
  688. if(hhash->State == HAL_HASH_STATE_READY)
  689. {
  690. /* Change the HASH state */
  691. hhash->State = HAL_HASH_STATE_BUSY;
  692. hhash->HashInCount = Size;
  693. hhash->pHashInBuffPtr = pInBuffer;
  694. hhash->pHashOutBuffPtr = pOutBuffer;
  695. /* Check if initialization phase has already been performed */
  696. if(hhash->Phase == HAL_HASH_PHASE_READY)
  697. {
  698. /* Select the SHA1 mode */
  699. HASH->CR |= HASH_ALGOSELECTION_MD5;
  700. /* Reset the HASH processor core, so that the HASH will be ready to compute
  701. the message digest of a new message */
  702. HASH->CR |= HASH_CR_INIT;
  703. }
  704. /* Reset interrupt counter */
  705. hhash->HashITCounter = 0;
  706. /* Set the phase */
  707. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  708. /* Process Unlocked */
  709. __HAL_UNLOCK(hhash);
  710. /* Enable Interrupts */
  711. HASH->IMR = (HASH_IT_DINI | HASH_IT_DCI);
  712. /* Return function status */
  713. return HAL_OK;
  714. }
  715. if(__HAL_HASH_GET_FLAG(HASH_FLAG_DCIS))
  716. {
  717. outputaddr = (uint32_t)hhash->pHashOutBuffPtr;
  718. /* Read the Output block from the Output FIFO */
  719. *(uint32_t*)(outputaddr) = __REV(HASH->HR[0]);
  720. outputaddr+=4;
  721. *(uint32_t*)(outputaddr) = __REV(HASH->HR[1]);
  722. outputaddr+=4;
  723. *(uint32_t*)(outputaddr) = __REV(HASH->HR[2]);
  724. outputaddr+=4;
  725. *(uint32_t*)(outputaddr) = __REV(HASH->HR[3]);
  726. if(hhash->HashInCount == 0)
  727. {
  728. /* Disable Interrupts */
  729. HASH->IMR = 0;
  730. /* Change the HASH state */
  731. hhash->State = HAL_HASH_STATE_READY;
  732. /* Call digest computation complete callback */
  733. HAL_HASH_DgstCpltCallback(hhash);
  734. /* Process Unlocked */
  735. __HAL_UNLOCK(hhash);
  736. /* Return function status */
  737. return HAL_OK;
  738. }
  739. }
  740. if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS))
  741. {
  742. if(hhash->HashInCount >= 68)
  743. {
  744. inputaddr = (uint32_t)hhash->pHashInBuffPtr;
  745. /* Write the Input block in the Data IN register */
  746. for(buffercounter = 0; buffercounter < 64; buffercounter+=4)
  747. {
  748. HASH->DIN = *(uint32_t*)inputaddr;
  749. inputaddr+=4;
  750. }
  751. if(hhash->HashITCounter == 0)
  752. {
  753. HASH->DIN = *(uint32_t*)inputaddr;
  754. if(hhash->HashInCount >= 68)
  755. {
  756. /* Decrement buffer counter */
  757. hhash->HashInCount -= 68;
  758. hhash->pHashInBuffPtr+= 68;
  759. }
  760. else
  761. {
  762. hhash->HashInCount = 0;
  763. hhash->pHashInBuffPtr+= hhash->HashInCount;
  764. }
  765. /* Set Interrupt counter */
  766. hhash->HashITCounter = 1;
  767. }
  768. else
  769. {
  770. /* Decrement buffer counter */
  771. hhash->HashInCount -= 64;
  772. hhash->pHashInBuffPtr+= 64;
  773. }
  774. }
  775. else
  776. {
  777. /* Get the buffer address */
  778. inputaddr = (uint32_t)hhash->pHashInBuffPtr;
  779. /* Get the buffer counter */
  780. inputcounter = hhash->HashInCount;
  781. /* Disable Interrupts */
  782. HASH->IMR &= ~(HASH_IT_DINI);
  783. /* Configure the number of valid bits in last word of the message */
  784. __HAL_HASH_SET_NBVALIDBITS(inputcounter);
  785. if((inputcounter > 4) && (inputcounter%4))
  786. {
  787. inputcounter = (inputcounter+4-inputcounter%4);
  788. }
  789. else if ((inputcounter < 4) && (inputcounter != 0))
  790. {
  791. inputcounter = 4;
  792. }
  793. /* Write the Input block in the Data IN register */
  794. for(buffercounter = 0; buffercounter < inputcounter/4; buffercounter++)
  795. {
  796. HASH->DIN = *(uint32_t*)inputaddr;
  797. inputaddr+=4;
  798. }
  799. /* Start the digest calculation */
  800. __HAL_HASH_START_DIGEST();
  801. /* Reset buffer counter */
  802. hhash->HashInCount = 0;
  803. /* Call Input data transfer complete callback */
  804. HAL_HASH_InCpltCallback(hhash);
  805. }
  806. }
  807. /* Process Unlocked */
  808. __HAL_UNLOCK(hhash);
  809. /* Return function status */
  810. return HAL_OK;
  811. }
  812. /**
  813. * @brief Initializes the HASH peripheral in SHA1 mode then processes pInBuffer.
  814. * The digest is available in pOutBuffer.
  815. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  816. * the configuration information for HASH module
  817. * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
  818. * @param Size: Length of the input buffer in bytes.
  819. * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
  820. * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
  821. * @retval HAL status
  822. */
  823. HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer)
  824. {
  825. uint32_t inputaddr;
  826. uint32_t outputaddr;
  827. uint32_t buffercounter;
  828. uint32_t inputcounter;
  829. /* Process Locked */
  830. __HAL_LOCK(hhash);
  831. if(hhash->State == HAL_HASH_STATE_READY)
  832. {
  833. /* Change the HASH state */
  834. hhash->State = HAL_HASH_STATE_BUSY;
  835. hhash->HashInCount = Size;
  836. hhash->pHashInBuffPtr = pInBuffer;
  837. hhash->pHashOutBuffPtr = pOutBuffer;
  838. /* Check if initialization phase has already been performed */
  839. if(hhash->Phase == HAL_HASH_PHASE_READY)
  840. {
  841. /* Select the SHA1 mode */
  842. HASH->CR |= HASH_ALGOSELECTION_SHA1;
  843. /* Reset the HASH processor core, so that the HASH will be ready to compute
  844. the message digest of a new message */
  845. HASH->CR |= HASH_CR_INIT;
  846. }
  847. /* Reset interrupt counter */
  848. hhash->HashITCounter = 0;
  849. /* Set the phase */
  850. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  851. /* Process Unlocked */
  852. __HAL_UNLOCK(hhash);
  853. /* Enable Interrupts */
  854. HASH->IMR = (HASH_IT_DINI | HASH_IT_DCI);
  855. /* Return function status */
  856. return HAL_OK;
  857. }
  858. if(__HAL_HASH_GET_FLAG(HASH_FLAG_DCIS))
  859. {
  860. outputaddr = (uint32_t)hhash->pHashOutBuffPtr;
  861. /* Read the Output block from the Output FIFO */
  862. *(uint32_t*)(outputaddr) = __REV(HASH->HR[0]);
  863. outputaddr+=4;
  864. *(uint32_t*)(outputaddr) = __REV(HASH->HR[1]);
  865. outputaddr+=4;
  866. *(uint32_t*)(outputaddr) = __REV(HASH->HR[2]);
  867. outputaddr+=4;
  868. *(uint32_t*)(outputaddr) = __REV(HASH->HR[3]);
  869. outputaddr+=4;
  870. *(uint32_t*)(outputaddr) = __REV(HASH->HR[4]);
  871. if(hhash->HashInCount == 0)
  872. {
  873. /* Disable Interrupts */
  874. HASH->IMR = 0;
  875. /* Change the HASH state */
  876. hhash->State = HAL_HASH_STATE_READY;
  877. /* Call digest computation complete callback */
  878. HAL_HASH_DgstCpltCallback(hhash);
  879. /* Process Unlocked */
  880. __HAL_UNLOCK(hhash);
  881. /* Return function status */
  882. return HAL_OK;
  883. }
  884. }
  885. if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS))
  886. {
  887. if(hhash->HashInCount >= 68)
  888. {
  889. inputaddr = (uint32_t)hhash->pHashInBuffPtr;
  890. /* Write the Input block in the Data IN register */
  891. for(buffercounter = 0; buffercounter < 64; buffercounter+=4)
  892. {
  893. HASH->DIN = *(uint32_t*)inputaddr;
  894. inputaddr+=4;
  895. }
  896. if(hhash->HashITCounter == 0)
  897. {
  898. HASH->DIN = *(uint32_t*)inputaddr;
  899. if(hhash->HashInCount >= 68)
  900. {
  901. /* Decrement buffer counter */
  902. hhash->HashInCount -= 68;
  903. hhash->pHashInBuffPtr+= 68;
  904. }
  905. else
  906. {
  907. hhash->HashInCount = 0;
  908. hhash->pHashInBuffPtr+= hhash->HashInCount;
  909. }
  910. /* Set Interrupt counter */
  911. hhash->HashITCounter = 1;
  912. }
  913. else
  914. {
  915. /* Decrement buffer counter */
  916. hhash->HashInCount -= 64;
  917. hhash->pHashInBuffPtr+= 64;
  918. }
  919. }
  920. else
  921. {
  922. /* Get the buffer address */
  923. inputaddr = (uint32_t)hhash->pHashInBuffPtr;
  924. /* Get the buffer counter */
  925. inputcounter = hhash->HashInCount;
  926. /* Disable Interrupts */
  927. HASH->IMR &= ~(HASH_IT_DINI);
  928. /* Configure the number of valid bits in last word of the message */
  929. __HAL_HASH_SET_NBVALIDBITS(inputcounter);
  930. if((inputcounter > 4) && (inputcounter%4))
  931. {
  932. inputcounter = (inputcounter+4-inputcounter%4);
  933. }
  934. else if ((inputcounter < 4) && (inputcounter != 0))
  935. {
  936. inputcounter = 4;
  937. }
  938. /* Write the Input block in the Data IN register */
  939. for(buffercounter = 0; buffercounter < inputcounter/4; buffercounter++)
  940. {
  941. HASH->DIN = *(uint32_t*)inputaddr;
  942. inputaddr+=4;
  943. }
  944. /* Start the digest calculation */
  945. __HAL_HASH_START_DIGEST();
  946. /* Reset buffer counter */
  947. hhash->HashInCount = 0;
  948. /* Call Input data transfer complete callback */
  949. HAL_HASH_InCpltCallback(hhash);
  950. }
  951. }
  952. /* Process Unlocked */
  953. __HAL_UNLOCK(hhash);
  954. /* Return function status */
  955. return HAL_OK;
  956. }
  957. /**
  958. * @brief This function handles HASH interrupt request.
  959. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  960. * the configuration information for HASH module
  961. * @retval None
  962. */
  963. void HAL_HASH_IRQHandler(HASH_HandleTypeDef *hhash)
  964. {
  965. switch(HASH->CR & HASH_CR_ALGO)
  966. {
  967. case HASH_ALGOSELECTION_MD5:
  968. HAL_HASH_MD5_Start_IT(hhash, NULL, 0, NULL);
  969. break;
  970. case HASH_ALGOSELECTION_SHA1:
  971. HAL_HASH_SHA1_Start_IT(hhash, NULL, 0, NULL);
  972. break;
  973. default:
  974. break;
  975. }
  976. }
  977. /**
  978. * @}
  979. */
  980. /** @defgroup HASH_Exported_Functions_Group4 HASH processing functions using DMA mode
  981. * @brief processing functions using DMA mode.
  982. *
  983. @verbatim
  984. ===============================================================================
  985. ##### HASH processing using DMA mode functions #####
  986. ===============================================================================
  987. [..] This section provides functions allowing to calculate in DMA mode
  988. the hash value using one of the following algorithms:
  989. (+) MD5
  990. (+) SHA1
  991. @endverbatim
  992. * @{
  993. */
  994. /**
  995. * @brief Initializes the HASH peripheral in MD5 mode then enables DMA to
  996. control data transfer. Use HAL_HASH_MD5_Finish() to get the digest.
  997. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  998. * the configuration information for HASH module
  999. * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
  1000. * @param Size: Length of the input buffer in bytes.
  1001. * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
  1002. * @retval HAL status
  1003. */
  1004. HAL_StatusTypeDef HAL_HASH_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
  1005. {
  1006. uint32_t inputaddr = (uint32_t)pInBuffer;
  1007. /* Process Locked */
  1008. __HAL_LOCK(hhash);
  1009. /* Change the HASH state */
  1010. hhash->State = HAL_HASH_STATE_BUSY;
  1011. /* Check if initialization phase has already been performed */
  1012. if(hhash->Phase == HAL_HASH_PHASE_READY)
  1013. {
  1014. /* Select the MD5 mode and reset the HASH processor core, so that the HASH will be ready to compute
  1015. the message digest of a new message */
  1016. HASH->CR |= HASH_ALGOSELECTION_MD5 | HASH_CR_INIT;
  1017. }
  1018. /* Configure the number of valid bits in last word of the message */
  1019. __HAL_HASH_SET_NBVALIDBITS(Size);
  1020. /* Set the phase */
  1021. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  1022. /* Set the HASH DMA transfer complete callback */
  1023. hhash->hdmain->XferCpltCallback = HASH_DMAXferCplt;
  1024. /* Set the DMA error callback */
  1025. hhash->hdmain->XferErrorCallback = HASH_DMAError;
  1026. /* Enable the DMA In DMA Stream */
  1027. HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (Size%4 ? (Size+3)/4:Size/4));
  1028. /* Enable DMA requests */
  1029. HASH->CR |= (HASH_CR_DMAE);
  1030. /* Process Unlocked */
  1031. __HAL_UNLOCK(hhash);
  1032. /* Return function status */
  1033. return HAL_OK;
  1034. }
  1035. /**
  1036. * @brief Returns the computed digest in MD5 mode
  1037. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  1038. * the configuration information for HASH module
  1039. * @param pOutBuffer: Pointer to the computed digest. Its size must be 16 bytes.
  1040. * @param Timeout: Timeout value
  1041. * @retval HAL status
  1042. */
  1043. HAL_StatusTypeDef HAL_HASH_MD5_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout)
  1044. {
  1045. uint32_t tickstart = 0;
  1046. /* Process Locked */
  1047. __HAL_LOCK(hhash);
  1048. /* Change HASH peripheral state */
  1049. hhash->State = HAL_HASH_STATE_BUSY;
  1050. /* Get tick */
  1051. tickstart = HAL_GetTick();
  1052. while(HAL_IS_BIT_CLR(HASH->SR, HASH_FLAG_DCIS))
  1053. {
  1054. /* Check for the Timeout */
  1055. if(Timeout != HAL_MAX_DELAY)
  1056. {
  1057. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  1058. {
  1059. /* Change state */
  1060. hhash->State = HAL_HASH_STATE_TIMEOUT;
  1061. /* Process Unlocked */
  1062. __HAL_UNLOCK(hhash);
  1063. return HAL_TIMEOUT;
  1064. }
  1065. }
  1066. }
  1067. /* Read the message digest */
  1068. HASH_GetDigest(pOutBuffer, 16);
  1069. /* Change HASH peripheral state */
  1070. hhash->State = HAL_HASH_STATE_READY;
  1071. /* Process Unlocked */
  1072. __HAL_UNLOCK(hhash);
  1073. /* Return function status */
  1074. return HAL_OK;
  1075. }
  1076. /**
  1077. * @brief Initializes the HASH peripheral in SHA1 mode then enables DMA to
  1078. control data transfer. Use HAL_HASH_SHA1_Finish() to get the digest.
  1079. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  1080. * the configuration information for HASH module
  1081. * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
  1082. * @param Size: Length of the input buffer in bytes.
  1083. * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
  1084. * @retval HAL status
  1085. */
  1086. HAL_StatusTypeDef HAL_HASH_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
  1087. {
  1088. uint32_t inputaddr = (uint32_t)pInBuffer;
  1089. /* Process Locked */
  1090. __HAL_LOCK(hhash);
  1091. /* Change the HASH state */
  1092. hhash->State = HAL_HASH_STATE_BUSY;
  1093. /* Check if initialization phase has already been performed */
  1094. if(hhash->Phase == HAL_HASH_PHASE_READY)
  1095. {
  1096. /* Select the SHA1 mode and reset the HASH processor core, so that the HASH will be ready to compute
  1097. the message digest of a new message */
  1098. HASH->CR |= HASH_ALGOSELECTION_SHA1;
  1099. HASH->CR |= HASH_CR_INIT;
  1100. }
  1101. /* Configure the number of valid bits in last word of the message */
  1102. __HAL_HASH_SET_NBVALIDBITS(Size);
  1103. /* Set the phase */
  1104. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  1105. /* Set the HASH DMA transfer complete callback */
  1106. hhash->hdmain->XferCpltCallback = HASH_DMAXferCplt;
  1107. /* Set the DMA error callback */
  1108. hhash->hdmain->XferErrorCallback = HASH_DMAError;
  1109. /* Enable the DMA In DMA Stream */
  1110. HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (Size%4 ? (Size+3)/4:Size/4));
  1111. /* Enable DMA requests */
  1112. HASH->CR |= (HASH_CR_DMAE);
  1113. /* Process Unlocked */
  1114. __HAL_UNLOCK(hhash);
  1115. /* Return function status */
  1116. return HAL_OK;
  1117. }
  1118. /**
  1119. * @brief Returns the computed digest in SHA1 mode.
  1120. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  1121. * the configuration information for HASH module
  1122. * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
  1123. * @param Timeout: Timeout value
  1124. * @retval HAL status
  1125. */
  1126. HAL_StatusTypeDef HAL_HASH_SHA1_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout)
  1127. {
  1128. uint32_t tickstart = 0;
  1129. /* Process Locked */
  1130. __HAL_LOCK(hhash);
  1131. /* Change HASH peripheral state */
  1132. hhash->State = HAL_HASH_STATE_BUSY;
  1133. /* Get tick */
  1134. tickstart = HAL_GetTick();
  1135. while(HAL_IS_BIT_CLR(HASH->SR, HASH_FLAG_DCIS))
  1136. {
  1137. /* Check for the Timeout */
  1138. if(Timeout != HAL_MAX_DELAY)
  1139. {
  1140. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  1141. {
  1142. /* Change state */
  1143. hhash->State = HAL_HASH_STATE_TIMEOUT;
  1144. /* Process Unlocked */
  1145. __HAL_UNLOCK(hhash);
  1146. return HAL_TIMEOUT;
  1147. }
  1148. }
  1149. }
  1150. /* Read the message digest */
  1151. HASH_GetDigest(pOutBuffer, 20);
  1152. /* Change HASH peripheral state */
  1153. hhash->State = HAL_HASH_STATE_READY;
  1154. /* Process UnLock */
  1155. __HAL_UNLOCK(hhash);
  1156. /* Return function status */
  1157. return HAL_OK;
  1158. }
  1159. /**
  1160. * @}
  1161. */
  1162. /** @defgroup HASH_Exported_Functions_Group5 HASH-MAC (HMAC) processing functions using polling mode
  1163. * @brief HMAC processing functions using polling mode .
  1164. *
  1165. @verbatim
  1166. ===============================================================================
  1167. ##### HMAC processing using polling mode functions #####
  1168. ===============================================================================
  1169. [..] This section provides functions allowing to calculate in polling mode
  1170. the HMAC value using one of the following algorithms:
  1171. (+) MD5
  1172. (+) SHA1
  1173. @endverbatim
  1174. * @{
  1175. */
  1176. /**
  1177. * @brief Initializes the HASH peripheral in HMAC MD5 mode
  1178. * then processes pInBuffer. The digest is available in pOutBuffer
  1179. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  1180. * the configuration information for HASH module
  1181. * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
  1182. * @param Size: Length of the input buffer in bytes.
  1183. * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
  1184. * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
  1185. * @param Timeout: Timeout value
  1186. * @retval HAL status
  1187. */
  1188. HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
  1189. {
  1190. uint32_t tickstart = 0;
  1191. /* Process Locked */
  1192. __HAL_LOCK(hhash);
  1193. /* Change the HASH state */
  1194. hhash->State = HAL_HASH_STATE_BUSY;
  1195. /* Check if initialization phase has already been performed */
  1196. if(hhash->Phase == HAL_HASH_PHASE_READY)
  1197. {
  1198. /* Check if key size is greater than 64 bytes */
  1199. if(hhash->Init.KeySize > 64)
  1200. {
  1201. /* Select the HMAC MD5 mode */
  1202. HASH->CR |= (HASH_ALGOSELECTION_MD5 | HASH_ALGOMODE_HMAC | HASH_HMAC_KEYTYPE_LONGKEY | HASH_CR_INIT);
  1203. }
  1204. else
  1205. {
  1206. /* Select the HMAC MD5 mode */
  1207. HASH->CR |= (HASH_ALGOSELECTION_MD5 | HASH_ALGOMODE_HMAC | HASH_CR_INIT);
  1208. }
  1209. }
  1210. /* Set the phase */
  1211. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  1212. /************************** STEP 1 ******************************************/
  1213. /* Configure the number of valid bits in last word of the message */
  1214. __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
  1215. /* Write input buffer in data register */
  1216. HASH_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
  1217. /* Start the digest calculation */
  1218. __HAL_HASH_START_DIGEST();
  1219. /* Get tick */
  1220. tickstart = HAL_GetTick();
  1221. while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
  1222. {
  1223. /* Check for the Timeout */
  1224. if(Timeout != HAL_MAX_DELAY)
  1225. {
  1226. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  1227. {
  1228. /* Change state */
  1229. hhash->State = HAL_HASH_STATE_TIMEOUT;
  1230. /* Process Unlocked */
  1231. __HAL_UNLOCK(hhash);
  1232. return HAL_TIMEOUT;
  1233. }
  1234. }
  1235. }
  1236. /************************** STEP 2 ******************************************/
  1237. /* Configure the number of valid bits in last word of the message */
  1238. __HAL_HASH_SET_NBVALIDBITS(Size);
  1239. /* Write input buffer in data register */
  1240. HASH_WriteData(pInBuffer, Size);
  1241. /* Start the digest calculation */
  1242. __HAL_HASH_START_DIGEST();
  1243. /* Get tick */
  1244. tickstart = HAL_GetTick();
  1245. while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
  1246. {
  1247. /* Check for the Timeout */
  1248. if(Timeout != HAL_MAX_DELAY)
  1249. {
  1250. if((HAL_GetTick() - tickstart ) > Timeout)
  1251. {
  1252. /* Change state */
  1253. hhash->State = HAL_HASH_STATE_TIMEOUT;
  1254. /* Process Unlocked */
  1255. __HAL_UNLOCK(hhash);
  1256. return HAL_TIMEOUT;
  1257. }
  1258. }
  1259. }
  1260. /************************** STEP 3 ******************************************/
  1261. /* Configure the number of valid bits in last word of the message */
  1262. __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
  1263. /* Write input buffer in data register */
  1264. HASH_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
  1265. /* Start the digest calculation */
  1266. __HAL_HASH_START_DIGEST();
  1267. /* Get tick */
  1268. tickstart = HAL_GetTick();
  1269. while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
  1270. {
  1271. /* Check for the Timeout */
  1272. if(Timeout != HAL_MAX_DELAY)
  1273. {
  1274. if((HAL_GetTick() - tickstart ) > Timeout)
  1275. {
  1276. /* Change state */
  1277. hhash->State = HAL_HASH_STATE_TIMEOUT;
  1278. /* Process Unlocked */
  1279. __HAL_UNLOCK(hhash);
  1280. return HAL_TIMEOUT;
  1281. }
  1282. }
  1283. }
  1284. /* Read the message digest */
  1285. HASH_GetDigest(pOutBuffer, 16);
  1286. /* Change the HASH state */
  1287. hhash->State = HAL_HASH_STATE_READY;
  1288. /* Process Unlocked */
  1289. __HAL_UNLOCK(hhash);
  1290. /* Return function status */
  1291. return HAL_OK;
  1292. }
  1293. /**
  1294. * @brief Initializes the HASH peripheral in HMAC SHA1 mode
  1295. * then processes pInBuffer. The digest is available in pOutBuffer.
  1296. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  1297. * the configuration information for HASH module
  1298. * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
  1299. * @param Size: Length of the input buffer in bytes.
  1300. * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
  1301. * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
  1302. * @param Timeout: Timeout value
  1303. * @retval HAL status
  1304. */
  1305. HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
  1306. {
  1307. uint32_t tickstart = 0;
  1308. /* Process Locked */
  1309. __HAL_LOCK(hhash);
  1310. /* Change the HASH state */
  1311. hhash->State = HAL_HASH_STATE_BUSY;
  1312. /* Check if initialization phase has already been performed */
  1313. if(hhash->Phase == HAL_HASH_PHASE_READY)
  1314. {
  1315. /* Check if key size is greater than 64 bytes */
  1316. if(hhash->Init.KeySize > 64)
  1317. {
  1318. /* Select the HMAC SHA1 mode */
  1319. HASH->CR |= (HASH_ALGOSELECTION_SHA1 | HASH_ALGOMODE_HMAC | HASH_HMAC_KEYTYPE_LONGKEY | HASH_CR_INIT);
  1320. }
  1321. else
  1322. {
  1323. /* Select the HMAC SHA1 mode */
  1324. HASH->CR |= (HASH_ALGOSELECTION_SHA1 | HASH_ALGOMODE_HMAC | HASH_CR_INIT);
  1325. }
  1326. }
  1327. /* Set the phase */
  1328. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  1329. /************************** STEP 1 ******************************************/
  1330. /* Configure the number of valid bits in last word of the message */
  1331. __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
  1332. /* Write input buffer in data register */
  1333. HASH_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
  1334. /* Start the digest calculation */
  1335. __HAL_HASH_START_DIGEST();
  1336. /* Get tick */
  1337. tickstart = HAL_GetTick();
  1338. while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
  1339. {
  1340. /* Check for the Timeout */
  1341. if(Timeout != HAL_MAX_DELAY)
  1342. {
  1343. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  1344. {
  1345. /* Change state */
  1346. hhash->State = HAL_HASH_STATE_TIMEOUT;
  1347. /* Process Unlocked */
  1348. __HAL_UNLOCK(hhash);
  1349. return HAL_TIMEOUT;
  1350. }
  1351. }
  1352. }
  1353. /************************** STEP 2 ******************************************/
  1354. /* Configure the number of valid bits in last word of the message */
  1355. __HAL_HASH_SET_NBVALIDBITS(Size);
  1356. /* Write input buffer in data register */
  1357. HASH_WriteData(pInBuffer, Size);
  1358. /* Start the digest calculation */
  1359. __HAL_HASH_START_DIGEST();
  1360. /* Get tick */
  1361. tickstart = HAL_GetTick();
  1362. while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
  1363. {
  1364. /* Check for the Timeout */
  1365. if(Timeout != HAL_MAX_DELAY)
  1366. {
  1367. if((HAL_GetTick() - tickstart ) > Timeout)
  1368. {
  1369. /* Change state */
  1370. hhash->State = HAL_HASH_STATE_TIMEOUT;
  1371. /* Process Unlocked */
  1372. __HAL_UNLOCK(hhash);
  1373. return HAL_TIMEOUT;
  1374. }
  1375. }
  1376. }
  1377. /************************** STEP 3 ******************************************/
  1378. /* Configure the number of valid bits in last word of the message */
  1379. __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
  1380. /* Write input buffer in data register */
  1381. HASH_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
  1382. /* Start the digest calculation */
  1383. __HAL_HASH_START_DIGEST();
  1384. /* Get tick */
  1385. tickstart = HAL_GetTick();
  1386. while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
  1387. {
  1388. /* Check for the Timeout */
  1389. if(Timeout != HAL_MAX_DELAY)
  1390. {
  1391. if((HAL_GetTick() - tickstart ) > Timeout)
  1392. {
  1393. /* Change state */
  1394. hhash->State = HAL_HASH_STATE_TIMEOUT;
  1395. /* Process Unlocked */
  1396. __HAL_UNLOCK(hhash);
  1397. return HAL_TIMEOUT;
  1398. }
  1399. }
  1400. }
  1401. /* Read the message digest */
  1402. HASH_GetDigest(pOutBuffer, 20);
  1403. /* Change the HASH state */
  1404. hhash->State = HAL_HASH_STATE_READY;
  1405. /* Process Unlocked */
  1406. __HAL_UNLOCK(hhash);
  1407. /* Return function status */
  1408. return HAL_OK;
  1409. }
  1410. /**
  1411. * @}
  1412. */
  1413. /** @defgroup HASH_Exported_Functions_Group6 HASH-MAC (HMAC) processing functions using DMA mode
  1414. * @brief HMAC processing functions using DMA mode .
  1415. *
  1416. @verbatim
  1417. ===============================================================================
  1418. ##### HMAC processing using DMA mode functions #####
  1419. ===============================================================================
  1420. [..] This section provides functions allowing to calculate in DMA mode
  1421. the HMAC value using one of the following algorithms:
  1422. (+) MD5
  1423. (+) SHA1
  1424. @endverbatim
  1425. * @{
  1426. */
  1427. /**
  1428. * @brief Initializes the HASH peripheral in HMAC MD5 mode
  1429. * then enables DMA to control data transfer.
  1430. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  1431. * the configuration information for HASH module
  1432. * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
  1433. * @param Size: Length of the input buffer in bytes.
  1434. * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
  1435. * @retval HAL status
  1436. */
  1437. HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
  1438. {
  1439. uint32_t inputaddr = 0;
  1440. /* Process Locked */
  1441. __HAL_LOCK(hhash);
  1442. /* Change the HASH state */
  1443. hhash->State = HAL_HASH_STATE_BUSY;
  1444. /* Save buffer pointer and size in handle */
  1445. hhash->pHashInBuffPtr = pInBuffer;
  1446. hhash->HashBuffSize = Size;
  1447. hhash->HashInCount = 0;
  1448. /* Check if initialization phase has already been performed */
  1449. if(hhash->Phase == HAL_HASH_PHASE_READY)
  1450. {
  1451. /* Check if key size is greater than 64 bytes */
  1452. if(hhash->Init.KeySize > 64)
  1453. {
  1454. /* Select the HMAC MD5 mode */
  1455. HASH->CR |= (HASH_ALGOSELECTION_MD5 | HASH_ALGOMODE_HMAC | HASH_HMAC_KEYTYPE_LONGKEY | HASH_CR_INIT);
  1456. }
  1457. else
  1458. {
  1459. /* Select the HMAC MD5 mode */
  1460. HASH->CR |= (HASH_ALGOSELECTION_MD5 | HASH_ALGOMODE_HMAC | HASH_CR_INIT);
  1461. }
  1462. }
  1463. /* Set the phase */
  1464. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  1465. /* Configure the number of valid bits in last word of the message */
  1466. __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
  1467. /* Get the key address */
  1468. inputaddr = (uint32_t)(hhash->Init.pKey);
  1469. /* Set the HASH DMA transfer complete callback */
  1470. hhash->hdmain->XferCpltCallback = HASH_DMAXferCplt;
  1471. /* Set the DMA error callback */
  1472. hhash->hdmain->XferErrorCallback = HASH_DMAError;
  1473. /* Enable the DMA In DMA Stream */
  1474. HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (hhash->Init.KeySize%4 ? (hhash->Init.KeySize+3)/4:hhash->Init.KeySize/4));
  1475. /* Enable DMA requests */
  1476. HASH->CR |= (HASH_CR_DMAE);
  1477. /* Process Unlocked */
  1478. __HAL_UNLOCK(hhash);
  1479. /* Return function status */
  1480. return HAL_OK;
  1481. }
  1482. /**
  1483. * @brief Initializes the HASH peripheral in HMAC SHA1 mode
  1484. * then enables DMA to control data transfer.
  1485. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  1486. * the configuration information for HASH module
  1487. * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
  1488. * @param Size: Length of the input buffer in bytes.
  1489. * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
  1490. * @retval HAL status
  1491. */
  1492. HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
  1493. {
  1494. uint32_t inputaddr = 0;
  1495. /* Process Locked */
  1496. __HAL_LOCK(hhash);
  1497. /* Change the HASH state */
  1498. hhash->State = HAL_HASH_STATE_BUSY;
  1499. /* Save buffer pointer and size in handle */
  1500. hhash->pHashInBuffPtr = pInBuffer;
  1501. hhash->HashBuffSize = Size;
  1502. hhash->HashInCount = 0;
  1503. /* Check if initialization phase has already been performed */
  1504. if(hhash->Phase == HAL_HASH_PHASE_READY)
  1505. {
  1506. /* Check if key size is greater than 64 bytes */
  1507. if(hhash->Init.KeySize > 64)
  1508. {
  1509. /* Select the HMAC SHA1 mode */
  1510. HASH->CR |= (HASH_ALGOSELECTION_SHA1 | HASH_ALGOMODE_HMAC | HASH_HMAC_KEYTYPE_LONGKEY | HASH_CR_INIT);
  1511. }
  1512. else
  1513. {
  1514. /* Select the HMAC SHA1 mode */
  1515. HASH->CR |= (HASH_ALGOSELECTION_SHA1 | HASH_ALGOMODE_HMAC | HASH_CR_INIT);
  1516. }
  1517. }
  1518. /* Set the phase */
  1519. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  1520. /* Configure the number of valid bits in last word of the message */
  1521. __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
  1522. /* Get the key address */
  1523. inputaddr = (uint32_t)(hhash->Init.pKey);
  1524. /* Set the HASH DMA transfer complete callback */
  1525. hhash->hdmain->XferCpltCallback = HASH_DMAXferCplt;
  1526. /* Set the DMA error callback */
  1527. hhash->hdmain->XferErrorCallback = HASH_DMAError;
  1528. /* Enable the DMA In DMA Stream */
  1529. HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (hhash->Init.KeySize%4 ? (hhash->Init.KeySize+3)/4:hhash->Init.KeySize/4));
  1530. /* Enable DMA requests */
  1531. HASH->CR |= (HASH_CR_DMAE);
  1532. /* Process Unlocked */
  1533. __HAL_UNLOCK(hhash);
  1534. /* Return function status */
  1535. return HAL_OK;
  1536. }
  1537. /**
  1538. * @}
  1539. */
  1540. /** @defgroup HASH_Exported_Functions_Group7 Peripheral State functions
  1541. * @brief Peripheral State functions.
  1542. *
  1543. @verbatim
  1544. ===============================================================================
  1545. ##### Peripheral State functions #####
  1546. ===============================================================================
  1547. [..]
  1548. This subsection permits to get in run-time the status of the peripheral.
  1549. @endverbatim
  1550. * @{
  1551. */
  1552. /**
  1553. * @brief return the HASH state
  1554. * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
  1555. * the configuration information for HASH module
  1556. * @retval HAL state
  1557. */
  1558. HAL_HASH_STATETypeDef HAL_HASH_GetState(HASH_HandleTypeDef *hhash)
  1559. {
  1560. return hhash->State;
  1561. }
  1562. /**
  1563. * @}
  1564. */
  1565. /**
  1566. * @}
  1567. */
  1568. #endif /* HAL_HASH_MODULE_ENABLED */
  1569. /**
  1570. * @}
  1571. */
  1572. #endif /* STM32F756xx */
  1573. /**
  1574. * @}
  1575. */
  1576. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/