at32f415_misc.c 4.5 KB

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  1. /**
  2. **************************************************************************
  3. * @file at32f415_misc.c
  4. * @version v2.0.5
  5. * @date 2022-05-20
  6. * @brief contains all the functions for the misc firmware library
  7. **************************************************************************
  8. * Copyright notice & Disclaimer
  9. *
  10. * The software Board Support Package (BSP) that is made available to
  11. * download from Artery official website is the copyrighted work of Artery.
  12. * Artery authorizes customers to use, copy, and distribute the BSP
  13. * software and its related documentation for the purpose of design and
  14. * development in conjunction with Artery microcontrollers. Use of the
  15. * software is governed by this copyright notice and the following disclaimer.
  16. *
  17. * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
  18. * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
  19. * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
  20. * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
  21. * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
  22. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
  23. *
  24. **************************************************************************
  25. */
  26. /* includes ------------------------------------------------------------------*/
  27. #include "at32f415_conf.h"
  28. /** @addtogroup AT32F415_periph_driver
  29. * @{
  30. */
  31. /** @defgroup MISC
  32. * @brief MISC driver modules
  33. * @{
  34. */
  35. #ifdef MISC_MODULE_ENABLED
  36. /** @defgroup MISC_private_functions
  37. * @{
  38. */
  39. #define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000)
  40. /**
  41. * @brief system reset
  42. * @param none
  43. * @retval none
  44. */
  45. void nvic_system_reset(void)
  46. {
  47. NVIC_SystemReset();
  48. }
  49. /**
  50. * @brief enable nvic irq
  51. * @param irqn (IRQn_Type number)
  52. * @param preempt_priority: preemptive priority value (starting from 0)
  53. * @param sub_priority: subpriority value (starting from 0)
  54. * @retval none
  55. */
  56. void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
  57. {
  58. uint32_t temp_priority = 0;
  59. /* encode priority */
  60. temp_priority = NVIC_EncodePriority(NVIC_GetPriorityGrouping(), preempt_priority, sub_priority);
  61. /* set priority */
  62. NVIC_SetPriority(irqn, temp_priority);
  63. /* enable irqn */
  64. NVIC_EnableIRQ(irqn);
  65. }
  66. /**
  67. * @brief disable nvic irq number
  68. * @param irqn (IRQn_Type number)
  69. * @retval none
  70. */
  71. void nvic_irq_disable(IRQn_Type irqn)
  72. {
  73. NVIC_DisableIRQ(irqn);
  74. }
  75. /**
  76. * @brief config nvic priority group
  77. * @param priority_group
  78. * this parameter can be one of the following values:
  79. * - NVIC_PRIORITY_GROUP_0
  80. * - NVIC_PRIORITY_GROUP_1
  81. * - NVIC_PRIORITY_GROUP_2
  82. * - NVIC_PRIORITY_GROUP_3
  83. * - NVIC_PRIORITY_GROUP_4
  84. * @retval none
  85. */
  86. void nvic_priority_group_config(nvic_priority_group_type priority_group)
  87. {
  88. /* set the prigroup[10:8] bits according to nvic_prioritygroup value */
  89. NVIC_SetPriorityGrouping(priority_group);
  90. }
  91. /**
  92. * @brief set the vector table location and offset.
  93. * @param base
  94. * this parameter can be one of the following values:
  95. * - NVIC_VECTTAB_RAM
  96. * - NVIC_VECTTAB_FLASH
  97. * @param offset (vector table base offset field. this value must be a multiple of 0x200)
  98. * @retval none
  99. */
  100. void nvic_vector_table_set(uint32_t base, uint32_t offset)
  101. {
  102. SCB->VTOR = base | (offset & (uint32_t)0x1FFFFF80);
  103. }
  104. /**
  105. * @brief config nvic lowpower mode
  106. * @param lp_mode
  107. * this parameter can be one of the following values:
  108. * - NVIC_LP_SEVONPEND
  109. * - NVIC_LP_SLEEPDEEP
  110. * - NVIC_LP_SLEEPONEXIT
  111. * @param new_state (new state of lp condition. ENABLE or DISABLE)
  112. * @retval none
  113. */
  114. void nvic_lowpower_mode_config(nvic_lowpower_mode_type lp_mode, confirm_state new_state)
  115. {
  116. if(new_state != FALSE)
  117. {
  118. SCB->SCR |= lp_mode;
  119. }
  120. else
  121. {
  122. SCB->SCR &= (uint32_t)(~(uint32_t)lp_mode);
  123. }
  124. }
  125. /**
  126. * @brief config systick clock source
  127. * @param source
  128. * this parameter can be one of the following values:
  129. * - SYSTICK_CLOCK_SOURCE_AHBCLK_DIV8
  130. * - SYSTICK_CLOCK_SOURCE_AHBCLK_NODIV
  131. * @retval none
  132. */
  133. void systick_clock_source_config(systick_clock_source_type source)
  134. {
  135. if(source == SYSTICK_CLOCK_SOURCE_AHBCLK_NODIV)
  136. {
  137. SysTick->CTRL |= SYSTICK_CLOCK_SOURCE_AHBCLK_NODIV;
  138. }
  139. else
  140. {
  141. SysTick->CTRL &= ~(uint32_t)SYSTICK_CLOCK_SOURCE_AHBCLK_NODIV;
  142. }
  143. }
  144. /**
  145. * @}
  146. */
  147. #endif
  148. /**
  149. * @}
  150. */
  151. /**
  152. * @}
  153. */