drv_usart.c 20 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-10-30 SummerGift first version
  9. */
  10. #include "board.h"
  11. #include "drv_usart.h"
  12. #include "drv_config.h"
  13. #ifdef RT_USING_SERIAL
  14. //#define DRV_DEBUG
  15. #define LOG_TAG "drv.usart"
  16. #include <drv_log.h>
  17. #if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && !defined(BSP_USING_UART3) \
  18. && !defined(BSP_USING_UART4) && !defined(BSP_USING_UART5) && !defined(BSP_USING_LPUART1)
  19. #error "Please define at least one BSP_USING_UARTx"
  20. /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */
  21. #endif
  22. #ifdef RT_SERIAL_USING_DMA
  23. static void stm32_dma_config(struct rt_serial_device *serial);
  24. #endif
  25. enum
  26. {
  27. #ifdef BSP_USING_UART1
  28. UART1_INDEX,
  29. #endif
  30. #ifdef BSP_USING_UART2
  31. UART2_INDEX,
  32. #endif
  33. #ifdef BSP_USING_UART3
  34. UART3_INDEX,
  35. #endif
  36. #ifdef BSP_USING_UART4
  37. UART4_INDEX,
  38. #endif
  39. #ifdef BSP_USING_UART5
  40. UART5_INDEX,
  41. #endif
  42. #ifdef BSP_USING_UART6
  43. UART6_INDEX,
  44. #endif
  45. #ifdef BSP_USING_LPUART1
  46. LPUART1_INDEX,
  47. #endif
  48. };
  49. static struct stm32_uart_config uart_config[] =
  50. {
  51. #ifdef BSP_USING_UART1
  52. UART1_CONFIG,
  53. #endif
  54. #ifdef BSP_USING_UART2
  55. UART2_CONFIG,
  56. #endif
  57. #ifdef BSP_USING_UART3
  58. UART3_CONFIG,
  59. #endif
  60. #ifdef BSP_USING_UART4
  61. UART4_CONFIG,
  62. #endif
  63. #ifdef BSP_USING_UART5
  64. UART5_CONFIG,
  65. #endif
  66. #ifdef BSP_USING_UART6
  67. UART6_CONFIG,
  68. #endif
  69. #ifdef BSP_USING_LPUART1
  70. LPUART1_CONFIG,
  71. #endif
  72. };
  73. static struct stm32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
  74. static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  75. {
  76. struct stm32_uart *uart;
  77. RT_ASSERT(serial != RT_NULL);
  78. RT_ASSERT(cfg != RT_NULL);
  79. uart = (struct stm32_uart *)serial->parent.user_data;
  80. RT_ASSERT(uart != RT_NULL);
  81. uart->handle.Instance = uart->config->Instance;
  82. uart->handle.Init.BaudRate = cfg->baud_rate;
  83. uart->handle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
  84. uart->handle.Init.Mode = UART_MODE_TX_RX;
  85. uart->handle.Init.OverSampling = UART_OVERSAMPLING_16;
  86. switch (cfg->data_bits)
  87. {
  88. case DATA_BITS_8:
  89. uart->handle.Init.WordLength = UART_WORDLENGTH_8B;
  90. break;
  91. case DATA_BITS_9:
  92. uart->handle.Init.WordLength = UART_WORDLENGTH_9B;
  93. break;
  94. default:
  95. uart->handle.Init.WordLength = UART_WORDLENGTH_8B;
  96. break;
  97. }
  98. switch (cfg->stop_bits)
  99. {
  100. case STOP_BITS_1:
  101. uart->handle.Init.StopBits = UART_STOPBITS_1;
  102. break;
  103. case STOP_BITS_2:
  104. uart->handle.Init.StopBits = UART_STOPBITS_2;
  105. break;
  106. default:
  107. uart->handle.Init.StopBits = UART_STOPBITS_1;
  108. break;
  109. }
  110. switch (cfg->parity)
  111. {
  112. case PARITY_NONE:
  113. uart->handle.Init.Parity = UART_PARITY_NONE;
  114. break;
  115. case PARITY_ODD:
  116. uart->handle.Init.Parity = UART_PARITY_ODD;
  117. break;
  118. case PARITY_EVEN:
  119. uart->handle.Init.Parity = UART_PARITY_EVEN;
  120. break;
  121. default:
  122. uart->handle.Init.Parity = UART_PARITY_NONE;
  123. break;
  124. }
  125. if (HAL_UART_Init(&uart->handle) != HAL_OK)
  126. {
  127. return -RT_ERROR;
  128. }
  129. return RT_EOK;
  130. }
  131. static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg)
  132. {
  133. struct stm32_uart *uart;
  134. #ifdef RT_SERIAL_USING_DMA
  135. rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
  136. #endif
  137. RT_ASSERT(serial != RT_NULL);
  138. uart = (struct stm32_uart *)serial->parent.user_data;
  139. RT_ASSERT(uart != RT_NULL);
  140. switch (cmd)
  141. {
  142. /* disable interrupt */
  143. case RT_DEVICE_CTRL_CLR_INT:
  144. /* disable rx irq */
  145. NVIC_DisableIRQ(uart->config->irq_type);
  146. /* disable interrupt */
  147. __HAL_UART_DISABLE_IT(&(uart->handle), UART_IT_RXNE);
  148. break;
  149. /* enable interrupt */
  150. case RT_DEVICE_CTRL_SET_INT:
  151. /* enable rx irq */
  152. NVIC_EnableIRQ(uart->config->irq_type);
  153. /* enable interrupt */
  154. __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_RXNE);
  155. break;
  156. #ifdef RT_SERIAL_USING_DMA
  157. case RT_DEVICE_CTRL_CONFIG:
  158. if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX)
  159. {
  160. stm32_dma_config(serial);
  161. }
  162. break;
  163. #endif
  164. }
  165. return RT_EOK;
  166. }
  167. static int stm32_putc(struct rt_serial_device *serial, char c)
  168. {
  169. struct stm32_uart *uart;
  170. RT_ASSERT(serial != RT_NULL);
  171. uart = (struct stm32_uart *)serial->parent.user_data;
  172. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
  173. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
  174. || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7)
  175. uart->handle.Instance->TDR = c;
  176. #else
  177. uart->handle.Instance->DR = c;
  178. #endif
  179. while (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) == RESET);
  180. return 1;
  181. }
  182. static int stm32_getc(struct rt_serial_device *serial)
  183. {
  184. int ch;
  185. struct stm32_uart *uart;
  186. RT_ASSERT(serial != RT_NULL);
  187. uart = (struct stm32_uart *)serial->parent.user_data;
  188. RT_ASSERT(uart != RT_NULL);
  189. ch = -1;
  190. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
  191. {
  192. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
  193. || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7)
  194. ch = uart->handle.Instance->RDR & 0xff;
  195. #else
  196. ch = uart->handle.Instance->DR & 0xff;
  197. #endif
  198. }
  199. return ch;
  200. }
  201. static const struct rt_uart_ops stm32_uart_ops =
  202. {
  203. .configure = stm32_configure,
  204. .control = stm32_control,
  205. .putc = stm32_putc,
  206. .getc = stm32_getc,
  207. };
  208. /**
  209. * Uart common interrupt process. This need add to uart ISR.
  210. *
  211. * @param serial serial device
  212. */
  213. static void uart_isr(struct rt_serial_device *serial)
  214. {
  215. struct stm32_uart *uart;
  216. #ifdef RT_SERIAL_USING_DMA
  217. rt_size_t recv_total_index, recv_len;
  218. rt_base_t level;
  219. #endif
  220. RT_ASSERT(serial != RT_NULL);
  221. uart = (struct stm32_uart *) serial->parent.user_data;
  222. RT_ASSERT(uart != RT_NULL);
  223. /* UART in mode Receiver -------------------------------------------------*/
  224. if ((__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET) &&
  225. (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_RXNE) != RESET))
  226. {
  227. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  228. }
  229. #ifdef RT_SERIAL_USING_DMA
  230. else if ((uart->uart_dma_flag) && (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_IDLE) != RESET) &&
  231. (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_IDLE) != RESET))
  232. {
  233. level = rt_hw_interrupt_disable();
  234. recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma.handle));
  235. recv_len = recv_total_index - uart->dma.last_index;
  236. uart->dma.last_index = recv_total_index;
  237. rt_hw_interrupt_enable(level);
  238. if (recv_len)
  239. {
  240. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
  241. }
  242. __HAL_UART_CLEAR_IDLEFLAG(&uart->handle);
  243. }
  244. #endif
  245. else
  246. {
  247. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_ORE) != RESET)
  248. {
  249. __HAL_UART_CLEAR_OREFLAG(&uart->handle);
  250. }
  251. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_NE) != RESET)
  252. {
  253. __HAL_UART_CLEAR_NEFLAG(&uart->handle);
  254. }
  255. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_FE) != RESET)
  256. {
  257. __HAL_UART_CLEAR_FEFLAG(&uart->handle);
  258. }
  259. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_PE) != RESET)
  260. {
  261. __HAL_UART_CLEAR_PEFLAG(&uart->handle);
  262. }
  263. #if !defined(SOC_SERIES_STM32L4) && !defined(SOC_SERIES_STM32F7) && !defined(SOC_SERIES_STM32F0) \
  264. && !defined(SOC_SERIES_STM32L0) && !defined(SOC_SERIES_STM32G0) && !defined(SOC_SERIES_STM32H7)
  265. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_LBD) != RESET)
  266. {
  267. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_LBD);
  268. }
  269. #endif
  270. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_CTS) != RESET)
  271. {
  272. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_CTS);
  273. }
  274. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TXE) != RESET)
  275. {
  276. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TXE);
  277. }
  278. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) != RESET)
  279. {
  280. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
  281. }
  282. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
  283. {
  284. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_RXNE);
  285. }
  286. }
  287. }
  288. #if defined(BSP_USING_UART1)
  289. void USART1_IRQHandler(void)
  290. {
  291. /* enter interrupt */
  292. rt_interrupt_enter();
  293. uart_isr(&(uart_obj[UART1_INDEX].serial));
  294. /* leave interrupt */
  295. rt_interrupt_leave();
  296. }
  297. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA)
  298. void UART1_DMA_RX_IRQHandler(void)
  299. {
  300. /* enter interrupt */
  301. rt_interrupt_enter();
  302. HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma.handle);
  303. /* leave interrupt */
  304. rt_interrupt_leave();
  305. }
  306. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA) */
  307. #endif /* BSP_USING_UART1 */
  308. #if defined(BSP_USING_UART2)
  309. void USART2_IRQHandler(void)
  310. {
  311. /* enter interrupt */
  312. rt_interrupt_enter();
  313. uart_isr(&(uart_obj[UART2_INDEX].serial));
  314. /* leave interrupt */
  315. rt_interrupt_leave();
  316. }
  317. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA)
  318. void UART2_DMA_RX_IRQHandler(void)
  319. {
  320. /* enter interrupt */
  321. rt_interrupt_enter();
  322. HAL_DMA_IRQHandler(&uart_obj[UART2_INDEX].dma.handle);
  323. /* leave interrupt */
  324. rt_interrupt_leave();
  325. }
  326. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA) */
  327. #endif /* BSP_USING_UART2 */
  328. #if defined(BSP_USING_UART3)
  329. void USART3_IRQHandler(void)
  330. {
  331. /* enter interrupt */
  332. rt_interrupt_enter();
  333. uart_isr(&(uart_obj[UART3_INDEX].serial));
  334. /* leave interrupt */
  335. rt_interrupt_leave();
  336. }
  337. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_RX_USING_DMA)
  338. void UART3_DMA_RX_IRQHandler(void)
  339. {
  340. /* enter interrupt */
  341. rt_interrupt_enter();
  342. HAL_DMA_IRQHandler(&uart_obj[UART3_INDEX].dma.handle);
  343. /* leave interrupt */
  344. rt_interrupt_leave();
  345. }
  346. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART3_RX_USING_DMA) */
  347. #endif /* BSP_USING_UART3*/
  348. #if defined(BSP_USING_UART4)
  349. void UART4_IRQHandler(void)
  350. {
  351. /* enter interrupt */
  352. rt_interrupt_enter();
  353. uart_isr(&(uart_obj[UART4_INDEX].serial));
  354. /* leave interrupt */
  355. rt_interrupt_leave();
  356. }
  357. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_RX_USING_DMA)
  358. void UART4_DMA_RX_IRQHandler(void)
  359. {
  360. /* enter interrupt */
  361. rt_interrupt_enter();
  362. HAL_DMA_IRQHandler(&uart_obj[UART4_INDEX].dma.handle);
  363. /* leave interrupt */
  364. rt_interrupt_leave();
  365. }
  366. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART4_RX_USING_DMA) */
  367. #endif /* BSP_USING_UART4*/
  368. #if defined(BSP_USING_UART5)
  369. void UART5_IRQHandler(void)
  370. {
  371. /* enter interrupt */
  372. rt_interrupt_enter();
  373. uart_isr(&(uart_obj[UART5_INDEX].serial));
  374. /* leave interrupt */
  375. rt_interrupt_leave();
  376. }
  377. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA)
  378. void UART5_DMA_RX_IRQHandler(void)
  379. {
  380. /* enter interrupt */
  381. rt_interrupt_enter();
  382. HAL_DMA_IRQHandler(&uart_obj[UART5_INDEX].dma.handle);
  383. /* leave interrupt */
  384. rt_interrupt_leave();
  385. }
  386. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA) */
  387. #endif /* BSP_USING_UART5*/
  388. #if defined(BSP_USING_UART6)
  389. void USART6_IRQHandler(void)
  390. {
  391. /* enter interrupt */
  392. rt_interrupt_enter();
  393. uart_isr(&(uart_obj[UART6_INDEX].serial));
  394. /* leave interrupt */
  395. rt_interrupt_leave();
  396. }
  397. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA)
  398. void UART6_DMA_RX_IRQHandler(void)
  399. {
  400. /* enter interrupt */
  401. rt_interrupt_enter();
  402. HAL_DMA_IRQHandler(&uart_obj[UART6_INDEX].dma.handle);
  403. /* leave interrupt */
  404. rt_interrupt_leave();
  405. }
  406. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA) */
  407. #endif /* BSP_USING_UART6*/
  408. #if defined(BSP_USING_LPUART1)
  409. void LPUART1_IRQHandler(void)
  410. {
  411. /* enter interrupt */
  412. rt_interrupt_enter();
  413. uart_isr(&(uart_obj[LPUART1_INDEX].serial));
  414. /* leave interrupt */
  415. rt_interrupt_leave();
  416. }
  417. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA)
  418. void LPUART1_DMA_RX_IRQHandler(void)
  419. {
  420. /* enter interrupt */
  421. rt_interrupt_enter();
  422. HAL_DMA_IRQHandler(&uart_obj[LPUART1_INDEX].dma.handle);
  423. /* leave interrupt */
  424. rt_interrupt_leave();
  425. }
  426. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA) */
  427. #endif /* BSP_USING_LPUART1*/
  428. #ifdef RT_SERIAL_USING_DMA
  429. static void stm32_dma_config(struct rt_serial_device *serial)
  430. {
  431. RT_ASSERT(serial != RT_NULL);
  432. struct stm32_uart *uart = (struct stm32_uart *)serial->parent.user_data;
  433. RT_ASSERT(uart != RT_NULL);
  434. struct rt_serial_rx_fifo *rx_fifo;
  435. LOG_D("%s dma config start", uart->config->name);
  436. {
  437. rt_uint32_t tmpreg= 0x00U;
  438. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) \
  439. || defined(SOC_SERIES_STM32L0)
  440. /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
  441. SET_BIT(RCC->AHBENR, uart->config->dma_rx->dma_rcc);
  442. tmpreg = READ_BIT(RCC->AHBENR, uart->config->dma_rx->dma_rcc);
  443. #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4)
  444. /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
  445. SET_BIT(RCC->AHB1ENR, uart->config->dma_rx->dma_rcc);
  446. tmpreg = READ_BIT(RCC->AHB1ENR, uart->config->dma_rx->dma_rcc);
  447. #endif
  448. UNUSED(tmpreg); /* To avoid compiler warnings */
  449. }
  450. __HAL_LINKDMA(&(uart->handle), hdmarx, uart->dma.handle);
  451. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L0)
  452. uart->dma.handle.Instance = uart->config->dma_rx->Instance;
  453. #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  454. uart->dma.handle.Instance = uart->config->dma_rx->Instance;
  455. uart->dma.handle.Init.Channel = uart->config->dma_rx->channel;
  456. #elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
  457. uart->dma.handle.Instance = uart->config->dma_rx->Instance;
  458. uart->dma.handle.Init.Request = uart->config->dma_rx->request;
  459. #endif
  460. uart->dma.handle.Init.Direction = DMA_PERIPH_TO_MEMORY;
  461. uart->dma.handle.Init.PeriphInc = DMA_PINC_DISABLE;
  462. uart->dma.handle.Init.MemInc = DMA_MINC_ENABLE;
  463. uart->dma.handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
  464. uart->dma.handle.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
  465. uart->dma.handle.Init.Mode = DMA_CIRCULAR;
  466. uart->dma.handle.Init.Priority = DMA_PRIORITY_MEDIUM;
  467. #if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  468. uart->dma.handle.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
  469. #endif
  470. if (HAL_DMA_DeInit(&(uart->dma.handle)) != HAL_OK)
  471. {
  472. RT_ASSERT(0);
  473. }
  474. if (HAL_DMA_Init(&(uart->dma.handle)) != HAL_OK)
  475. {
  476. RT_ASSERT(0);
  477. }
  478. rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
  479. /* Start DMA transfer */
  480. if (HAL_UART_Receive_DMA(&(uart->handle), rx_fifo->buffer, serial->config.bufsz) != HAL_OK)
  481. {
  482. /* Transfer error in reception process */
  483. RT_ASSERT(0);
  484. }
  485. /* enable interrupt */
  486. __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_IDLE);
  487. /* enable rx irq */
  488. HAL_NVIC_SetPriority(uart->config->dma_rx->dma_irq, 0, 0);
  489. HAL_NVIC_EnableIRQ(uart->config->dma_rx->dma_irq);
  490. HAL_NVIC_SetPriority(uart->config->irq_type, 1, 0);
  491. HAL_NVIC_EnableIRQ(uart->config->irq_type);
  492. LOG_D("%s dma RX instance: %x", uart->config->name, uart->dma.handle.Instance);
  493. LOG_D("%s dma config done", uart->config->name);
  494. }
  495. /**
  496. * @brief UART error callbacks
  497. * @param huart: UART handle
  498. * @note This example shows a simple way to report transfer error, and you can
  499. * add your own implementation.
  500. * @retval None
  501. */
  502. void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
  503. {
  504. RT_ASSERT(huart != NULL);
  505. struct stm32_uart *uart = (struct stm32_uart *)huart;
  506. LOG_D("%s: %s %d\n", __FUNCTION__, uart->config->name, huart->ErrorCode);
  507. UNUSED(uart);
  508. }
  509. /**
  510. * @brief Rx Transfer completed callback
  511. * @param huart: UART handle
  512. * @note This example shows a simple way to report end of DMA Rx transfer, and
  513. * you can add your own implementation.
  514. * @retval None
  515. */
  516. void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
  517. {
  518. struct rt_serial_device *serial;
  519. struct stm32_uart *uart;
  520. rt_size_t recv_len;
  521. rt_base_t level;
  522. RT_ASSERT(huart != NULL);
  523. uart = (struct stm32_uart *)huart;
  524. serial = &uart->serial;
  525. level = rt_hw_interrupt_disable();
  526. recv_len = serial->config.bufsz - uart->dma.last_index;
  527. uart->dma.last_index = 0;
  528. rt_hw_interrupt_enable(level);
  529. if (recv_len)
  530. {
  531. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
  532. }
  533. }
  534. #endif /* RT_SERIAL_USING_DMA */
  535. static void stm32_uart_get_dma_config(void)
  536. {
  537. #ifdef BSP_UART1_RX_USING_DMA
  538. uart_obj[UART1_INDEX].uart_dma_flag = 1;
  539. static struct dma_config uart1_dma_rx = UART1_DMA_CONFIG;
  540. uart_config[UART1_INDEX].dma_rx = &uart1_dma_rx;
  541. #endif
  542. #ifdef BSP_UART2_RX_USING_DMA
  543. uart_obj[UART2_INDEX].uart_dma_flag = 1;
  544. static struct dma_config uart2_dma_rx = UART2_DMA_CONFIG;
  545. uart_config[UART2_INDEX].dma_rx = &uart2_dma_rx;
  546. #endif
  547. #ifdef BSP_UART3_RX_USING_DMA
  548. uart_obj[UART3_INDEX].uart_dma_flag = 1;
  549. static struct dma_config uart3_dma_rx = UART3_DMA_CONFIG;
  550. uart_config[UART3_INDEX].dma_rx = &uart3_dma_rx;
  551. #endif
  552. #ifdef BSP_UART4_RX_USING_DMA
  553. uart_obj[UART4_INDEX].uart_dma_flag = 1;
  554. static struct dma_config uart4_dma_rx = UART4_DMA_CONFIG;
  555. uart_config[UART4_INDEX].dma_rx = &uart4_dma_rx;
  556. #endif
  557. #ifdef BSP_UART5_RX_USING_DMA
  558. uart_obj[UART5_INDEX].uart_dma_flag = 1;
  559. static struct dma_config uart5_dma_rx = UART5_DMA_CONFIG;
  560. uart_config[UART5_INDEX].dma_rx = &uart5_dma_rx;
  561. #endif
  562. #ifdef BSP_UART6_RX_USING_DMA
  563. uart_obj[UART6_INDEX].uart_dma_flag = 1;
  564. static struct dma_config uart6_dma_rx = UART6_DMA_CONFIG;
  565. uart_config[UART6_INDEX].dma_rx = &uart6_dma_rx;
  566. #endif
  567. #ifdef BSP_LPUART1_RX_USING_DMA
  568. uart_obj[LPUART1_INDEX].uart_dma_flag = 1;
  569. static struct dma_config lpuart1_dma_rx = LPUART1_DMA_CONFIG;
  570. uart_config[LPUART1_INDEX].dma_rx = &lpuart1_dma_rx;
  571. #endif
  572. }
  573. int rt_hw_usart_init(void)
  574. {
  575. rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct stm32_uart);
  576. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  577. rt_err_t result = 0;
  578. stm32_uart_get_dma_config();
  579. for (int i = 0; i < obj_num; i++)
  580. {
  581. uart_obj[i].config = &uart_config[i];
  582. uart_obj[i].serial.ops = &stm32_uart_ops;
  583. uart_obj[i].serial.config = config;
  584. #if defined(RT_SERIAL_USING_DMA)
  585. if(uart_obj[i].uart_dma_flag)
  586. {
  587. /* register UART device */
  588. result = rt_hw_serial_register(&uart_obj[i].serial,uart_obj[i].config->name,
  589. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX| RT_DEVICE_FLAG_DMA_RX
  590. ,&uart_obj[i]);
  591. }
  592. else
  593. #endif
  594. {
  595. /* register UART device */
  596. result = rt_hw_serial_register(&uart_obj[i].serial,uart_obj[i].config->name,
  597. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX
  598. ,&uart_obj[i]);
  599. }
  600. RT_ASSERT(result == RT_EOK);
  601. }
  602. return result;
  603. }
  604. #endif /* RT_USING_SERIAL */