drv_uart.c 11 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-11-16 bluebear233 first version
  9. */
  10. #include <rtconfig.h>
  11. #include <rtdevice.h>
  12. #include <drv_uart.h>
  13. #include "NuMicro.h"
  14. /* Private Define ---------------------------------------------------------------*/
  15. #define USEING_UART0 //Tx:PB13 Rx:PB12
  16. /* Private Typedef --------------------------------------------------------------*/
  17. struct usart
  18. {
  19. rt_serial_t dev;
  20. UART_T *usart_base;
  21. };
  22. typedef struct usart* usart_t;
  23. /* Private functions ------------------------------------------------------------*/
  24. static rt_err_t usart_gpio_configure(struct rt_serial_device *serial);
  25. static rt_err_t usart_configure(struct rt_serial_device *serial, struct serial_configure *cfg);
  26. static rt_err_t usart_control(struct rt_serial_device *serial, int cmd, void *arg);
  27. static int usart_send(struct rt_serial_device *serial, char c);
  28. static int usart_receive(struct rt_serial_device *serial);
  29. static void rt_hw_uart_register(usart_t uart, UART_T *uart_base,
  30. char *name);
  31. static void uart_isr(usart_t serial);
  32. /* Private Variables ------------------------------------------------------------*/
  33. static const struct rt_uart_ops m487_uart_ops =
  34. { usart_configure, usart_control, usart_send, usart_receive,
  35. RT_NULL };
  36. static const struct serial_configure m487_uart_default_config =
  37. RT_SERIAL_CONFIG_DEFAULT;
  38. #ifdef USEING_UART0
  39. struct usart uart0;
  40. #endif
  41. /* Interrupt Handle Funtion ----------------------------------------------------*/
  42. #ifdef USEING_UART0
  43. /* 串口0 中断入口 */
  44. void UART0_IRQHandler(void)
  45. {
  46. uart_isr(&uart0);
  47. }
  48. #endif
  49. /**
  50. * 中断处理函数
  51. */
  52. static void uart_isr(usart_t serial)
  53. {
  54. // 获取串口基地址
  55. UART_T *uart_base = ((usart_t)serial)->usart_base;
  56. // 获取中断事件
  57. uint32_t u32IntSts= uart_base->INTSTS;
  58. // 接收中断
  59. if(u32IntSts & (UART_INTSTS_RDAINT_Msk | UART_INTSTS_RXTOINT_Msk))
  60. {
  61. rt_hw_serial_isr(&serial->dev, RT_SERIAL_EVENT_RX_IND);
  62. }
  63. }
  64. /**
  65. * 串口端口配置
  66. */
  67. static rt_err_t usart_gpio_configure(struct rt_serial_device *serial)
  68. {
  69. // 获取串口基地址
  70. UART_T *uart_base = ((usart_t)serial)->usart_base;
  71. switch((uint32_t)uart_base)
  72. {
  73. case UART0_BASE:
  74. SYS->GPB_MFPH &= ~(SYS_GPB_MFPH_PB12MFP_Msk | SYS_GPB_MFPH_PB13MFP_Msk);
  75. SYS->GPB_MFPH |= (SYS_GPB_MFPH_PB12MFP_UART0_RXD | SYS_GPB_MFPH_PB13MFP_UART0_TXD);
  76. break;
  77. default:
  78. rt_kprintf("unknow uart module\n");
  79. RT_ASSERT(0);
  80. }
  81. return RT_EOK;
  82. }
  83. /**
  84. * 串口配置
  85. */
  86. static rt_err_t usart_configure(struct rt_serial_device *serial,
  87. struct serial_configure *cfg)
  88. {
  89. // 获取串口基地址
  90. UART_T *uart_base = ((usart_t)serial)->usart_base;
  91. uint32_t uart_module = 0;
  92. uint32_t uart_word_len = 0;
  93. uint32_t uart_stop_bit = 0;
  94. uint32_t uart_parity = 0;
  95. IRQn_Type uart_irq_channel = 0;
  96. switch((uint32_t)uart_base)
  97. {
  98. case UART0_BASE:
  99. uart_module = UART0_MODULE;
  100. uart_irq_channel = UART0_IRQn;
  101. break;
  102. default:
  103. rt_kprintf("unknow uart module\n");
  104. RT_ASSERT(0);
  105. }
  106. /* Enable IP clock */
  107. CLK_EnableModuleClock(uart_module);
  108. /* Select IP clock source */
  109. CLK_SetModuleClock(uart_module, CLK_CLKSEL1_UART0SEL_HXT, CLK_CLKDIV0_UART0(1));
  110. /* check baudrate */
  111. RT_ASSERT(cfg->baud_rate != 0);
  112. /* check word len */
  113. switch(cfg->data_bits)
  114. {
  115. case DATA_BITS_5:
  116. uart_word_len = UART_WORD_LEN_5;
  117. break;
  118. case DATA_BITS_6:
  119. uart_word_len = UART_WORD_LEN_6;
  120. break;
  121. case DATA_BITS_7:
  122. uart_word_len = UART_WORD_LEN_7;
  123. break;
  124. case DATA_BITS_8:
  125. uart_word_len = UART_WORD_LEN_8;
  126. break;
  127. default:
  128. rt_kprintf("unsupose data len");
  129. RT_ASSERT(0);
  130. }
  131. /* check stop bit */
  132. switch(cfg->stop_bits)
  133. {
  134. case STOP_BITS_1:
  135. uart_stop_bit = UART_STOP_BIT_1;
  136. break;
  137. case STOP_BITS_2:
  138. uart_stop_bit = UART_STOP_BIT_2;
  139. break;
  140. default:
  141. rt_kprintf("unsupose stop bit");
  142. RT_ASSERT(0);
  143. }
  144. /* check stop bit */
  145. switch(cfg->parity)
  146. {
  147. case PARITY_NONE:
  148. uart_parity = UART_PARITY_NONE;
  149. break;
  150. case PARITY_ODD:
  151. uart_parity = UART_PARITY_ODD;
  152. break;
  153. case PARITY_EVEN:
  154. uart_parity = UART_PARITY_EVEN;
  155. break;
  156. default:
  157. rt_kprintf("unsupose parity");
  158. RT_ASSERT(0);
  159. }
  160. /* Open uart */
  161. {
  162. uint32_t u32UartClkSrcSel=0ul, u32UartClkDivNum=0ul;
  163. uint32_t u32ClkTbl[4] = {__HXT, 0ul, __LXT, __HIRC};
  164. uint32_t u32Baud_Div = 0ul;
  165. if(uart_base == (UART_T*)UART0 )
  166. {
  167. /* Get UART clock source selection */
  168. u32UartClkSrcSel = ((uint32_t)(CLK->CLKSEL1 & CLK_CLKSEL1_UART0SEL_Msk)) >> CLK_CLKSEL1_UART0SEL_Pos;
  169. /* Get UART clock divider number */
  170. u32UartClkDivNum = (CLK->CLKDIV0 & CLK_CLKDIV0_UART0DIV_Msk) >> CLK_CLKDIV0_UART0DIV_Pos;
  171. }
  172. else if(uart_base == (UART_T*)UART1 )
  173. {
  174. /* Get UART clock source selection */
  175. u32UartClkSrcSel = (CLK->CLKSEL1 & CLK_CLKSEL1_UART1SEL_Msk) >> CLK_CLKSEL1_UART1SEL_Pos;
  176. /* Get UART clock divider number */
  177. u32UartClkDivNum = (CLK->CLKDIV0 & CLK_CLKDIV0_UART1DIV_Msk) >> CLK_CLKDIV0_UART1DIV_Pos;
  178. }
  179. else if(uart_base == (UART_T*)UART2 )
  180. {
  181. /* Get UART clock source selection */
  182. u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART2SEL_Msk) >> CLK_CLKSEL3_UART2SEL_Pos;
  183. /* Get UART clock divider number */
  184. u32UartClkDivNum = (CLK->CLKDIV4 & CLK_CLKDIV4_UART2DIV_Msk) >> CLK_CLKDIV4_UART2DIV_Pos;
  185. }
  186. else if(uart_base == (UART_T*)UART3 )
  187. {
  188. /* Get UART clock source selection */
  189. u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART3SEL_Msk) >> CLK_CLKSEL3_UART3SEL_Pos;
  190. /* Get UART clock divider number */
  191. u32UartClkDivNum = (CLK->CLKDIV4 & CLK_CLKDIV4_UART3DIV_Msk) >> CLK_CLKDIV4_UART3DIV_Pos;
  192. }
  193. else if(uart_base == (UART_T*)UART4 )
  194. {
  195. /* Get UART clock source selection */
  196. u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART4SEL_Msk) >> CLK_CLKSEL3_UART4SEL_Pos;
  197. /* Get UART clock divider number */
  198. u32UartClkDivNum = (CLK->CLKDIV4 & CLK_CLKDIV4_UART4DIV_Msk) >> CLK_CLKDIV4_UART4DIV_Pos;
  199. }
  200. else if(uart_base == (UART_T*)UART5 )
  201. {
  202. /* Get UART clock source selection */
  203. u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART5SEL_Msk) >> CLK_CLKSEL3_UART5SEL_Pos;
  204. /* Get UART clock divider number */
  205. u32UartClkDivNum = (CLK->CLKDIV4 & CLK_CLKDIV4_UART5DIV_Msk) >> CLK_CLKDIV4_UART5DIV_Pos;
  206. }
  207. /* Select UART function */
  208. uart_base->FUNCSEL = UART_FUNCSEL_UART;
  209. /* Set UART line configuration */
  210. uart_base->LINE = uart_word_len | uart_stop_bit | uart_parity;
  211. /* Set UART Rx and RTS trigger level */
  212. uart_base->FIFO &= ~(UART_FIFO_RFITL_Msk | UART_FIFO_RTSTRGLV_Msk);
  213. /* Get PLL clock frequency if UART clock source selection is PLL */
  214. if(u32UartClkSrcSel == 1ul)
  215. {
  216. u32ClkTbl[u32UartClkSrcSel] = CLK_GetPLLClockFreq();
  217. }
  218. /* Set UART baud rate */
  219. if(cfg->baud_rate != 0ul)
  220. {
  221. u32Baud_Div = UART_BAUD_MODE2_DIVIDER((u32ClkTbl[u32UartClkSrcSel]) / (u32UartClkDivNum + 1ul), cfg->baud_rate);
  222. if(u32Baud_Div > 0xFFFFul)
  223. {
  224. uart_base->BAUD = (UART_BAUD_MODE0 | UART_BAUD_MODE0_DIVIDER((u32ClkTbl[u32UartClkSrcSel]) / (u32UartClkDivNum + 1ul), cfg->baud_rate));
  225. }
  226. else
  227. {
  228. uart_base->BAUD = (UART_BAUD_MODE2 | u32Baud_Div);
  229. }
  230. }
  231. }
  232. /* config nvic */
  233. NVIC_EnableIRQ(uart_irq_channel);
  234. /* config gpio */
  235. usart_gpio_configure(serial);
  236. return RT_EOK;
  237. }
  238. /**
  239. * 串口中断控制
  240. */
  241. static rt_err_t usart_control(struct rt_serial_device *serial,
  242. int cmd, void *arg)
  243. {
  244. rt_err_t result = RT_EOK;
  245. rt_uint32_t flag;
  246. // 获取串口基地址
  247. UART_T *uart_base = ((usart_t)serial)->usart_base;
  248. switch ((uint32_t) arg)
  249. {
  250. case RT_DEVICE_FLAG_INT_RX:
  251. flag = UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk | UART_INTEN_TOCNTEN_Msk;
  252. switch (cmd)
  253. {
  254. case RT_DEVICE_CTRL_CLR_INT:
  255. UART_DISABLE_INT(uart_base, flag);
  256. break;
  257. case RT_DEVICE_CTRL_SET_INT:
  258. UART_ENABLE_INT(uart_base, flag);
  259. break;
  260. default:
  261. RT_ASSERT(0);
  262. }
  263. break;
  264. // TODO 完善DMA接口
  265. default:
  266. RT_ASSERT(0)
  267. ;
  268. }
  269. return result;
  270. }
  271. /**
  272. * 串口发送函数
  273. */
  274. static int usart_send(struct rt_serial_device *serial, char c)
  275. {
  276. // 获取串口基地址
  277. UART_T *uart_base = ((usart_t)serial)->usart_base;
  278. // 等待FIFO 发送
  279. while(uart_base->FIFOSTS & UART_FIFOSTS_TXFULL_Msk);
  280. // 发送字符
  281. uart_base->DAT = c;
  282. return 1;
  283. }
  284. /**
  285. * 串口接收函数
  286. */
  287. static int usart_receive(struct rt_serial_device *serial)
  288. {
  289. // 获取串口基地址
  290. UART_T *uart_base = ((usart_t)serial)->usart_base;
  291. // 如果FIFO 为空返回
  292. if(uart_base->FIFOSTS & UART_FIFOSTS_RXEMPTY_Msk)
  293. {
  294. return -1;
  295. }
  296. return UART_READ(uart_base);
  297. }
  298. /**
  299. * @brief 串口设备注册
  300. * @param uart : UART设备结构体
  301. * @param uart_base : UART外设基地址
  302. * @param name : UART设备名
  303. * @param tx_dma_channel : UART TX的DMA通道基地址(可选)
  304. */
  305. static void rt_hw_uart_register(usart_t usart, UART_T * uart_base, char *name)
  306. {
  307. rt_uint32_t flag;
  308. RT_ASSERT(usart != RT_NULL);
  309. RT_ASSERT(uart_base != RT_NULL);
  310. // 没有定义对应的硬件I2C
  311. if (!(uart_base == UART0 || uart_base == UART1 || uart_base == UART2
  312. || uart_base == UART3 || uart_base == UART4 || uart_base == UART5))
  313. {
  314. RT_ASSERT(0);
  315. }
  316. usart->usart_base = uart_base;
  317. usart->dev.ops = &m487_uart_ops;
  318. usart->dev.config = m487_uart_default_config;
  319. flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX;
  320. rt_hw_serial_register(&usart->dev, name,
  321. flag, RT_NULL);
  322. }
  323. /**
  324. * 硬件串口注册
  325. */
  326. int rt_hw_uart_init(void)
  327. {
  328. #ifdef USEING_UART0
  329. rt_hw_uart_register(&uart0, UART0, "uart0");
  330. #endif
  331. return 0;
  332. }