drv_uart.c 8.5 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-02-08 RT-Thread the first version
  9. */
  10. #include <rthw.h>
  11. #include <rtthread.h>
  12. #include <rtdevice.h>
  13. #include "drv_uart.h"
  14. #include "interrupt.h"
  15. #include "drv_gpio.h"
  16. #include "drv_clock.h"
  17. #define readl(addr) (*(volatile unsigned int *)(addr))
  18. #define writel(value,addr) (*(volatile unsigned int *)(addr) = (value))
  19. #ifdef RT_USING_SERIAL
  20. struct device_uart
  21. {
  22. rt_uint32_t hw_base;
  23. rt_uint32_t irqno;
  24. char name[RT_NAME_MAX];
  25. rt_uint32_t gpio_rx_port;
  26. rt_uint32_t gpio_tx_port;
  27. rt_uint32_t gpio_rx_pin;
  28. rt_uint32_t gpio_tx_pin;
  29. rt_uint32_t gpio_rx_fun;
  30. rt_uint32_t gpio_tx_fun;
  31. };
  32. static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg);
  33. static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg);
  34. static int uart_putc(struct rt_serial_device *serial, char c);
  35. static int uart_getc(struct rt_serial_device *serial);
  36. static rt_size_t uart_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction);
  37. void uart_irq_handler(int irqno, void *param);
  38. const struct rt_uart_ops _uart_ops =
  39. {
  40. uart_configure,
  41. uart_control,
  42. uart_putc,
  43. uart_getc,
  44. uart_dma_transmit
  45. };
  46. /*
  47. * UART Initiation
  48. */
  49. int rt_hw_uart_init(void)
  50. {
  51. struct rt_serial_device *serial;
  52. struct device_uart *uart;
  53. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  54. #ifdef TINA_USING_UART0
  55. {
  56. static struct rt_serial_device serial0;
  57. static struct device_uart uart0;
  58. serial = &serial0;
  59. uart = &uart0;
  60. serial->ops = &_uart_ops;
  61. serial->config = config;
  62. serial->config.baud_rate = 115200;
  63. uart->hw_base = UART0_BASE_ADDR; // UART0_BASE;
  64. uart->irqno = UART0_INTERRUPT; // IRQ_UART0;
  65. uart->gpio_rx_port = GPIO_PORT_E;
  66. uart->gpio_tx_port = GPIO_PORT_E;
  67. uart->gpio_rx_pin = GPIO_PIN_0;
  68. uart->gpio_tx_pin = GPIO_PIN_1;
  69. uart->gpio_rx_fun = IO_FUN_4;
  70. uart->gpio_tx_fun = IO_FUN_4;
  71. rt_hw_serial_register(serial,
  72. "uart0",
  73. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  74. uart);
  75. }
  76. #endif
  77. #ifdef TINA_USING_UART1
  78. {
  79. static struct rt_serial_device serial1;
  80. static struct device_uart uart1;
  81. serial = &serial1;
  82. uart = &uart1;
  83. serial->ops = &_uart_ops;
  84. serial->config = config;
  85. serial->config.baud_rate = 115200;
  86. uart->hw_base = UART1_BASE_ADDR; // UART1_BASE;
  87. uart->irqno = UART1_INTERRUPT; // IRQ_UART1;
  88. uart->gpio_rx_port = GPIO_PORT_A;
  89. uart->gpio_tx_port = GPIO_PORT_A;
  90. uart->gpio_rx_pin = GPIO_PIN_2;
  91. uart->gpio_tx_pin = GPIO_PIN_3;
  92. uart->gpio_rx_fun = IO_FUN_4;
  93. uart->gpio_tx_fun = IO_FUN_4;
  94. rt_hw_serial_register(serial,
  95. "uart1",
  96. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  97. uart);
  98. }
  99. #endif
  100. #ifdef TINA_USING_UART2
  101. {
  102. static struct rt_serial_device serial2;
  103. static struct device_uart uart2;
  104. serial = &serial2;
  105. uart = &uart2;
  106. serial->ops = &_uart_ops;
  107. serial->config = config;
  108. serial->config.baud_rate = 115200;
  109. uart->hw_base = UART2_BASE_ADDR; // UART1_BASE;
  110. uart->irqno = UART2_INTERRUPT; // IRQ_UART1;
  111. uart->gpio_rx_port = GPIO_PORT_E;
  112. uart->gpio_tx_port = GPIO_PORT_E;
  113. uart->gpio_rx_pin = GPIO_PIN_8;
  114. uart->gpio_tx_pin = GPIO_PIN_7;
  115. uart->gpio_rx_fun = IO_FUN_2;
  116. uart->gpio_tx_fun = IO_FUN_2;
  117. rt_hw_serial_register(serial,
  118. "uart2",
  119. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  120. uart);
  121. }
  122. #endif
  123. return 0;
  124. }
  125. /*
  126. * UART interface
  127. */
  128. static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  129. {
  130. rt_uint32_t addr, val;
  131. struct device_uart *uart;
  132. RT_ASSERT(serial != RT_NULL);
  133. serial->config = *cfg;
  134. uart = serial->parent.user_data;
  135. RT_ASSERT(uart != RT_NULL);
  136. /* config gpio port */
  137. gpio_set_func(uart->gpio_rx_port, uart->gpio_rx_pin, uart->gpio_rx_fun);
  138. gpio_set_func(uart->gpio_tx_port, uart->gpio_tx_pin, uart->gpio_tx_fun);
  139. /* Enable UART clock */
  140. /* Open the clock gate for uart */
  141. if ((rt_uint32_t)(uart->hw_base) == UART0_BASE_ADDR)
  142. {
  143. bus_gate_clk_enalbe(UART0_GATING);
  144. bus_software_reset_enalbe(UART0_GATING);
  145. bus_software_reset_disalbe(UART0_GATING);
  146. }
  147. else if ((rt_uint32_t)(uart->hw_base) == UART1_BASE_ADDR)
  148. {
  149. bus_gate_clk_enalbe(UART1_GATING);
  150. bus_software_reset_enalbe(UART1_GATING);
  151. bus_software_reset_disalbe(UART1_GATING);
  152. }
  153. else if ((rt_uint32_t)(uart->hw_base) == UART2_BASE_ADDR)
  154. {
  155. bus_gate_clk_enalbe(UART2_GATING);
  156. bus_software_reset_enalbe(UART2_GATING);
  157. bus_software_reset_disalbe(UART2_GATING);
  158. }
  159. else
  160. RT_ASSERT(0);
  161. /* Config uart0 to 115200-8-1-0 */
  162. addr = uart->hw_base;
  163. /* close uart irq */
  164. writel(0x0, addr + UART_IER);
  165. /* config fifo */
  166. writel(0x37, addr + UART_FCR);
  167. /* config modem */
  168. writel(0x0, addr + UART_MCR);
  169. /* config baud */
  170. val = readl(addr + UART_LCR);
  171. val |= (1 << 7);
  172. writel(val, addr + UART_LCR);
  173. val = apb_get_clk() / 16 / serial->config.baud_rate;
  174. writel(val & 0xff, addr + UART_DLL);
  175. writel((val >> 8) & 0xff, addr + UART_DLH);
  176. val = readl(addr + UART_LCR);
  177. val &= ~(1 << 7);
  178. writel(val, addr + UART_LCR);
  179. val = readl(addr + UART_LCR);
  180. val &= ~0x1f;
  181. val |= ((serial->config.data_bits - DATA_BITS_5) << 0) | (0 << 2) | (0x0 << 3);
  182. writel(val, addr + UART_LCR);
  183. writel(0xf, addr + UART_TFL);
  184. writel(0x3F, addr + UART_RFL);
  185. writel(0x1, addr + UART_IER);
  186. return RT_EOK;
  187. }
  188. static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg)
  189. {
  190. struct device_uart *uart;
  191. uart = serial->parent.user_data;
  192. RT_ASSERT(uart != RT_NULL);
  193. switch (cmd)
  194. {
  195. case RT_DEVICE_CTRL_CLR_INT:
  196. /* Disable the UART Interrupt */
  197. rt_hw_interrupt_mask(uart->irqno);
  198. writel(0x00, uart->hw_base + UART_IER);
  199. break;
  200. case RT_DEVICE_CTRL_SET_INT:
  201. /* install interrupt */
  202. rt_hw_interrupt_install(uart->irqno, uart_irq_handler,
  203. serial, uart->name);
  204. rt_hw_interrupt_umask(uart->irqno);
  205. writel(0x01, uart->hw_base + UART_IER);
  206. /* Enable the UART Interrupt */
  207. break;
  208. }
  209. return (RT_EOK);
  210. }
  211. static int uart_putc(struct rt_serial_device *serial, char c)
  212. {
  213. struct device_uart *uart;
  214. volatile rt_uint32_t *sed_buf;
  215. volatile rt_uint32_t *sta;
  216. uart = serial->parent.user_data;
  217. sed_buf = (rt_uint32_t *)(uart->hw_base + UART_THR);
  218. sta = (rt_uint32_t *)(uart->hw_base + UART_USR);
  219. /* FIFO status, contain valid data */
  220. while (!(*sta & 0x02));
  221. *sed_buf = c;
  222. return (1);
  223. }
  224. static int uart_getc(struct rt_serial_device *serial)
  225. {
  226. int ch = -1;
  227. volatile rt_uint32_t *rec_buf;
  228. volatile rt_uint32_t *sta;
  229. struct device_uart *uart = serial->parent.user_data;
  230. RT_ASSERT(serial != RT_NULL);
  231. rec_buf = (rt_uint32_t *)(uart->hw_base + UART_RHB);
  232. sta = (rt_uint32_t *)(uart->hw_base + UART_USR);
  233. /* Receive Data Available */
  234. if (*sta & 0x08)
  235. {
  236. ch = *rec_buf & 0xff;
  237. }
  238. return ch;
  239. }
  240. static rt_size_t uart_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
  241. {
  242. return (0);
  243. }
  244. /* UART ISR */
  245. void uart_irq_handler(int irqno, void *param)
  246. {
  247. rt_uint32_t val;
  248. struct rt_serial_device *serial = (struct rt_serial_device *)param;
  249. struct device_uart *uart = serial->parent.user_data;
  250. val = readl(uart->hw_base + 0x08) & 0x0F;
  251. /* read interrupt status and clear it */
  252. if (val & 0x4) /* rx ind */
  253. {
  254. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  255. }
  256. if (0) /* tx done */
  257. {
  258. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DONE);
  259. }
  260. }
  261. #endif