drv_adc.c 5.0 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2021-08-20 breo.com first version
  9. */
  10. #include <board.h>
  11. #include "drv_adc.h"
  12. #if defined(BSP_USING_ADC1) || defined(BSP_USING_ADC2) || defined(BSP_USING_ADC3)
  13. #define DRV_DEBUG
  14. #define LOG_TAG "drv.adc"
  15. #include <drv_log.h>
  16. struct n32_adc
  17. {
  18. struct rt_adc_device n32_adc_device;
  19. ADC_Module *ADC_Handler;
  20. char *name;
  21. };
  22. static struct n32_adc n32_adc_obj[] =
  23. {
  24. #ifdef BSP_USING_ADC1
  25. ADC1_CONFIG,
  26. #endif
  27. #ifdef BSP_USING_ADC2
  28. ADC2_CONFIG,
  29. #endif
  30. #ifdef BSP_USING_ADC3
  31. ADC3_CONFIG,
  32. #endif
  33. };
  34. static rt_uint32_t n32_adc_get_channel(rt_uint32_t channel)
  35. {
  36. rt_uint32_t n32_channel = 0;
  37. switch (channel)
  38. {
  39. case 0:
  40. n32_channel = ADC_CH_0;
  41. break;
  42. case 1:
  43. n32_channel = ADC_CH_1;
  44. break;
  45. case 2:
  46. n32_channel = ADC_CH_2;
  47. break;
  48. case 3:
  49. n32_channel = ADC_CH_3;
  50. break;
  51. case 4:
  52. n32_channel = ADC_CH_4;
  53. break;
  54. case 5:
  55. n32_channel = ADC_CH_5;
  56. break;
  57. case 6:
  58. n32_channel = ADC_CH_6;
  59. break;
  60. case 7:
  61. n32_channel = ADC_CH_7;
  62. break;
  63. case 8:
  64. n32_channel = ADC_CH_8;
  65. break;
  66. case 9:
  67. n32_channel = ADC_CH_9;
  68. break;
  69. case 10:
  70. n32_channel = ADC_CH_10;
  71. break;
  72. case 11:
  73. n32_channel = ADC_CH_11;
  74. break;
  75. case 12:
  76. n32_channel = ADC_CH_12;
  77. break;
  78. case 13:
  79. n32_channel = ADC_CH_13;
  80. break;
  81. case 14:
  82. n32_channel = ADC_CH_14;
  83. break;
  84. case 15:
  85. n32_channel = ADC_CH_15;
  86. break;
  87. case 16:
  88. n32_channel = ADC_CH_16;
  89. break;
  90. case 17:
  91. n32_channel = ADC_CH_17;
  92. break;
  93. case 18:
  94. n32_channel = ADC_CH_18;
  95. break;
  96. }
  97. return n32_channel;
  98. }
  99. static rt_err_t n32_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
  100. {
  101. ADC_Module *n32_adc_handler;
  102. ADC_InitType ADC_InitStructure;
  103. RT_ASSERT(device != RT_NULL);
  104. n32_adc_handler = device->parent.user_data;
  105. n32_msp_adc_init(n32_adc_handler);
  106. ADC_InitStruct(&ADC_InitStructure);
  107. ADC_InitStructure.WorkMode = ADC_WORKMODE_INDEPENDENT;
  108. ADC_InitStructure.MultiChEn = DISABLE;
  109. ADC_InitStructure.ContinueConvEn = DISABLE;
  110. ADC_InitStructure.ExtTrigSelect = ADC_EXT_TRIGCONV_NONE;
  111. ADC_InitStructure.DatAlign = ADC_DAT_ALIGN_R;
  112. ADC_InitStructure.ChsNumber = 1;
  113. ADC_Init(n32_adc_handler, &ADC_InitStructure);
  114. if (((n32_adc_handler == ADC1) || (n32_adc_handler == ADC2))
  115. && ((n32_adc_get_channel(channel) == ADC_CH_16)
  116. || (n32_adc_get_channel(channel) == ADC_CH_18)))
  117. {
  118. ADC_EnableTempSensorVrefint(ENABLE);
  119. }
  120. if (enabled)
  121. {
  122. /* Enable ADC1 */
  123. ADC_Enable(n32_adc_handler, ENABLE);
  124. /*Check ADC Ready*/
  125. while (ADC_GetFlagStatusNew(n32_adc_handler, ADC_FLAG_RDY) == RESET);
  126. /* Start ADCx calibration */
  127. ADC_StartCalibration(n32_adc_handler);
  128. /* Check the end of ADCx calibration */
  129. while (ADC_GetCalibrationStatus(n32_adc_handler));
  130. }
  131. else
  132. {
  133. /* Enable ADCx */
  134. ADC_Enable(n32_adc_handler, DISABLE);
  135. }
  136. return RT_EOK;
  137. }
  138. static rt_err_t n32_get_adc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
  139. {
  140. ADC_Module *n32_adc_handler;
  141. RT_ASSERT(device != RT_NULL);
  142. RT_ASSERT(value != RT_NULL);
  143. n32_adc_handler = device->parent.user_data;
  144. /* ADCx regular channels configuration */
  145. ADC_ConfigRegularChannel(n32_adc_handler, n32_adc_get_channel(channel), 1, ADC_SAMP_TIME_28CYCLES5);
  146. /* Start ADCx Software Conversion */
  147. ADC_EnableSoftwareStartConv(n32_adc_handler, ENABLE);
  148. /* Wait for the ADC to convert */
  149. while (ADC_GetFlagStatus(n32_adc_handler, ADC_FLAG_ENDC) == RESET);
  150. ADC_ClearFlag(n32_adc_handler, ADC_FLAG_ENDC);
  151. /* get ADC value */
  152. *value = ADC_GetDat(n32_adc_handler);
  153. return RT_EOK;
  154. }
  155. static const struct rt_adc_ops at_adc_ops =
  156. {
  157. .enabled = n32_adc_enabled,
  158. .convert = n32_get_adc_value,
  159. };
  160. static int rt_hw_adc_init(void)
  161. {
  162. int result = RT_EOK;
  163. int i = 0;
  164. for (i = 0; i < sizeof(n32_adc_obj) / sizeof(n32_adc_obj[0]); i++)
  165. {
  166. /* register ADC device */
  167. if (rt_hw_adc_register(&n32_adc_obj[i].n32_adc_device,
  168. n32_adc_obj[i].name, &at_adc_ops,
  169. n32_adc_obj[i].ADC_Handler) == RT_EOK)
  170. {
  171. LOG_D("%s register success", n32_adc_obj[i].name);
  172. }
  173. else
  174. {
  175. LOG_E("%s register failed", n32_adc_obj[i].name);
  176. result = -RT_ERROR;
  177. }
  178. }
  179. return result;
  180. }
  181. INIT_BOARD_EXPORT(rt_hw_adc_init);
  182. #endif /* BSP_USING_ADC */