i2c-bit-ops.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460
  1. /*
  2. * File : i2c-bit-ops.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. *
  20. * Change Logs:
  21. * Date Author Notes
  22. * 2012-04-25 weety first version
  23. */
  24. #include <rtdevice.h>
  25. #ifdef RT_I2C_BIT_DEBUG
  26. #define bit_dbg(fmt, ...) rt_kprintf(fmt, ##__VA_ARGS__)
  27. #else
  28. #define bit_dbg(fmt, ...)
  29. #endif
  30. #define SET_SDA(ops, val) ops->set_sda(ops->data, val)
  31. #define SET_SCL(ops, val) ops->set_scl(ops->data, val)
  32. #define GET_SDA(ops) ops->get_sda(ops->data)
  33. #define GET_SCL(ops) ops->get_scl(ops->data)
  34. rt_inline void i2c_delay(struct rt_i2c_bit_ops *ops)
  35. {
  36. ops->udelay((ops->delay_us + 1) >> 1);
  37. }
  38. rt_inline void i2c_delay2(struct rt_i2c_bit_ops *ops)
  39. {
  40. ops->udelay(ops->delay_us);
  41. }
  42. #define SDA_L(ops) SET_SDA(ops, 0)
  43. #define SDA_H(ops) SET_SDA(ops, 1)
  44. #define SCL_L(ops) SET_SCL(ops, 0)
  45. /**
  46. * release scl line, and wait scl line to high.
  47. */
  48. static rt_err_t SCL_H(struct rt_i2c_bit_ops *ops)
  49. {
  50. rt_tick_t start;
  51. SET_SCL(ops, 1);
  52. if (!ops->get_scl)
  53. goto done;
  54. start = rt_tick_get();
  55. while (!GET_SCL(ops))
  56. {
  57. if ((rt_tick_get() - start) > ops->timeout)
  58. return -RT_ETIMEOUT;
  59. rt_thread_delay((ops->timeout + 1) >> 1);
  60. }
  61. #ifdef RT_I2C_BIT_DEBUG
  62. if (rt_tick_get() != start)
  63. {
  64. bit_dbg("wait %ld tick for SCL line to go high\n",
  65. rt_tick_get() - start);
  66. }
  67. #endif
  68. done:
  69. i2c_delay(ops);
  70. return RT_EOK;
  71. }
  72. static void i2c_start(struct rt_i2c_bit_ops *ops)
  73. {
  74. #ifdef RT_I2C_BIT_DEBUG
  75. if (ops->get_scl && !GET_SCL(ops))
  76. {
  77. bit_dbg("I2C bus error, SCL line low\n");
  78. }
  79. if (ops->get_sda && !GET_SDA(ops))
  80. {
  81. bit_dbg("I2C bus error, SDA line low\n");
  82. }
  83. #endif
  84. SDA_L(ops);
  85. i2c_delay(ops);
  86. SCL_L(ops);
  87. }
  88. static void i2c_restart(struct rt_i2c_bit_ops *ops)
  89. {
  90. SDA_H(ops);
  91. SCL_H(ops);
  92. i2c_delay(ops);
  93. SDA_L(ops);
  94. i2c_delay(ops);
  95. SCL_L(ops);
  96. }
  97. static void i2c_stop(struct rt_i2c_bit_ops *ops)
  98. {
  99. SDA_L(ops);
  100. i2c_delay(ops);
  101. SCL_H(ops);
  102. i2c_delay(ops);
  103. SDA_H(ops);
  104. i2c_delay2(ops);
  105. }
  106. rt_inline rt_bool_t i2c_waitack(struct rt_i2c_bit_ops *ops)
  107. {
  108. rt_bool_t ack;
  109. SDA_H(ops);
  110. i2c_delay(ops);
  111. if (SCL_H(ops) < 0)
  112. {
  113. bit_dbg("wait ack timeout\n");
  114. return -RT_ETIMEOUT;
  115. }
  116. ack = !GET_SDA(ops); /* ACK : SDA pin is pulled low */
  117. bit_dbg("%s\n", ack ? "ACK" : "NACK");
  118. SCL_L(ops);
  119. return ack;
  120. }
  121. static rt_int32_t i2c_writeb(struct rt_i2c_bus_device *bus, rt_uint8_t data)
  122. {
  123. rt_int32_t i;
  124. rt_uint8_t bit;
  125. struct rt_i2c_bit_ops *ops = bus->priv;
  126. for (i = 7; i >= 0; i--)
  127. {
  128. SCL_L(ops);
  129. bit = (data >> i) & 1;
  130. SET_SDA(ops, bit);
  131. i2c_delay(ops);
  132. if (SCL_H(ops) < 0)
  133. {
  134. bit_dbg("i2c_writeb: 0x%02x, "
  135. "wait scl pin high timeout at bit %d\n",
  136. data, i);
  137. return -RT_ETIMEOUT;
  138. }
  139. }
  140. SCL_L(ops);
  141. i2c_delay(ops);
  142. return i2c_waitack(ops);
  143. }
  144. static rt_int32_t i2c_readb(struct rt_i2c_bus_device *bus)
  145. {
  146. rt_uint8_t i;
  147. rt_uint8_t data = 0;
  148. struct rt_i2c_bit_ops *ops = bus->priv;
  149. SDA_H(ops);
  150. i2c_delay(ops);
  151. for (i = 0; i < 8; i++)
  152. {
  153. data <<= 1;
  154. if (SCL_H(ops) < 0)
  155. {
  156. bit_dbg("i2c_readb: wait scl pin high "
  157. "timeout at bit %d\n", 7 - i);
  158. return -RT_ETIMEOUT;
  159. }
  160. if (GET_SDA(ops))
  161. data |= 1;
  162. SCL_L(ops);
  163. i2c_delay2(ops);
  164. }
  165. return data;
  166. }
  167. static rt_size_t i2c_send_bytes(struct rt_i2c_bus_device *bus,
  168. struct rt_i2c_msg *msg)
  169. {
  170. rt_int32_t ret;
  171. rt_size_t bytes = 0;
  172. const rt_uint8_t *ptr = msg->buf;
  173. rt_int32_t count = msg->len;
  174. rt_uint16_t ignore_nack = msg->flags & RT_I2C_IGNORE_NACK;
  175. while (count > 0)
  176. {
  177. ret = i2c_writeb(bus, *ptr);
  178. if ((ret > 0) || (ignore_nack && (ret == 0)))
  179. {
  180. count --;
  181. ptr ++;
  182. bytes ++;
  183. }
  184. else if (ret == 0)
  185. {
  186. i2c_dbg("send bytes: NACK.\n");
  187. return 0;
  188. }
  189. else
  190. {
  191. i2c_dbg("send bytes: error %d\n", ret);
  192. return ret;
  193. }
  194. }
  195. return bytes;
  196. }
  197. static rt_err_t i2c_send_ack_or_nack(struct rt_i2c_bus_device *bus, int ack)
  198. {
  199. struct rt_i2c_bit_ops *ops = bus->priv;
  200. if (ack)
  201. SET_SDA(ops, 0);
  202. i2c_delay(ops);
  203. if (SCL_H(ops) < 0)
  204. {
  205. bit_dbg("ACK or NACK timeout\n");
  206. return -RT_ETIMEOUT;
  207. }
  208. SCL_L(ops);
  209. return RT_EOK;
  210. }
  211. static rt_size_t i2c_recv_bytes(struct rt_i2c_bus_device *bus,
  212. struct rt_i2c_msg *msg)
  213. {
  214. rt_int32_t val;
  215. rt_int32_t bytes = 0; /* actual bytes */
  216. rt_uint8_t *ptr = msg->buf;
  217. rt_int32_t count = msg->len;
  218. const rt_uint32_t flags = msg->flags;
  219. while (count > 0)
  220. {
  221. val = i2c_readb(bus);
  222. if (val >= 0)
  223. {
  224. *ptr = val;
  225. bytes ++;
  226. }
  227. else
  228. {
  229. break;
  230. }
  231. ptr ++;
  232. count --;
  233. bit_dbg("recieve bytes: 0x%02x, %s\n",
  234. val, (flags & RT_I2C_NO_READ_ACK) ?
  235. "(No ACK/NACK)" : (count ? "ACK" : "NACK"));
  236. if (!(flags & RT_I2C_NO_READ_ACK))
  237. {
  238. val = i2c_send_ack_or_nack(bus, count);
  239. if (val < 0)
  240. return val;
  241. }
  242. }
  243. return bytes;
  244. }
  245. static rt_int32_t i2c_send_address(struct rt_i2c_bus_device *bus,
  246. rt_uint8_t addr,
  247. rt_int32_t retries)
  248. {
  249. struct rt_i2c_bit_ops *ops = bus->priv;
  250. rt_int32_t i;
  251. rt_err_t ret = 0;
  252. for (i = 0; i <= retries; i++)
  253. {
  254. ret = i2c_writeb(bus, addr);
  255. if (ret == 1 || i == retries)
  256. break;
  257. bit_dbg("send stop condition\n");
  258. i2c_stop(ops);
  259. i2c_delay2(ops);
  260. bit_dbg("send start condition\n");
  261. i2c_start(ops);
  262. }
  263. return ret;
  264. }
  265. static rt_err_t i2c_bit_send_address(struct rt_i2c_bus_device *bus,
  266. struct rt_i2c_msg *msg)
  267. {
  268. rt_uint16_t flags = msg->flags;
  269. rt_uint16_t ignore_nack = msg->flags & RT_I2C_IGNORE_NACK;
  270. struct rt_i2c_bit_ops *ops = bus->priv;
  271. rt_uint8_t addr1, addr2;
  272. rt_int32_t retries;
  273. rt_err_t ret;
  274. retries = ignore_nack ? 0 : bus->retries;
  275. if (flags & RT_I2C_ADDR_10BIT)
  276. {
  277. addr1 = 0xf0 | ((msg->addr >> 7) & 0x06);
  278. addr2 = msg->addr & 0xff;
  279. bit_dbg("addr1: %d, addr2: %d\n", addr1, addr2);
  280. ret = i2c_send_address(bus, addr1, retries);
  281. if ((ret != 1) && !ignore_nack)
  282. {
  283. bit_dbg("NACK: sending first addr\n");
  284. return -RT_EIO;
  285. }
  286. ret = i2c_writeb(bus, addr2);
  287. if ((ret != 1) && !ignore_nack)
  288. {
  289. bit_dbg("NACK: sending second addr\n");
  290. return -RT_EIO;
  291. }
  292. if (flags & RT_I2C_RD)
  293. {
  294. bit_dbg("send repeated start condition\n");
  295. i2c_restart(ops);
  296. addr1 |= 0x01;
  297. ret = i2c_send_address(bus, addr1, retries);
  298. if ((ret != 1) && !ignore_nack)
  299. {
  300. bit_dbg("NACK: sending repeated addr\n");
  301. return -RT_EIO;
  302. }
  303. }
  304. }
  305. else
  306. {
  307. /* 7-bit addr */
  308. addr1 = msg->addr << 1;
  309. if (flags & RT_I2C_RD)
  310. addr1 |= 1;
  311. ret = i2c_send_address(bus, addr1, retries);
  312. if ((ret != 1) && !ignore_nack)
  313. return -RT_EIO;
  314. }
  315. return RT_EOK;
  316. }
  317. static rt_size_t i2c_bit_xfer(struct rt_i2c_bus_device *bus,
  318. struct rt_i2c_msg msgs[],
  319. rt_uint32_t num)
  320. {
  321. struct rt_i2c_msg *msg;
  322. struct rt_i2c_bit_ops *ops = bus->priv;
  323. rt_int32_t i, ret;
  324. rt_uint16_t ignore_nack;
  325. bit_dbg("send start condition\n");
  326. i2c_start(ops);
  327. for (i = 0; i < num; i++)
  328. {
  329. msg = &msgs[i];
  330. ignore_nack = msg->flags & RT_I2C_IGNORE_NACK;
  331. if (!(msg->flags & RT_I2C_NO_START))
  332. {
  333. if (i)
  334. {
  335. i2c_restart(ops);
  336. }
  337. ret = i2c_bit_send_address(bus, msg);
  338. if ((ret != RT_EOK) && !ignore_nack)
  339. {
  340. bit_dbg("receive NACK from device addr 0x%02x msg %d\n",
  341. msgs[i].addr, i);
  342. goto out;
  343. }
  344. }
  345. if (msg->flags & RT_I2C_RD)
  346. {
  347. ret = i2c_recv_bytes(bus, msg);
  348. if (ret >= 1)
  349. bit_dbg("read %d byte%s\n", ret, ret == 1 ? "" : "s");
  350. if (ret < msg->len)
  351. {
  352. if (ret >= 0)
  353. ret = -RT_EIO;
  354. goto out;
  355. }
  356. }
  357. else
  358. {
  359. ret = i2c_send_bytes(bus, msg);
  360. if (ret >= 1)
  361. bit_dbg("write %d byte%s\n", ret, ret == 1 ? "" : "s");
  362. if (ret < msg->len)
  363. {
  364. if (ret >= 0)
  365. ret = -RT_ERROR;
  366. goto out;
  367. }
  368. }
  369. }
  370. ret = i;
  371. out:
  372. bit_dbg("send stop condition\n");
  373. i2c_stop(ops);
  374. return ret;
  375. }
  376. static const struct rt_i2c_bus_device_ops i2c_bit_bus_ops =
  377. {
  378. i2c_bit_xfer,
  379. RT_NULL,
  380. RT_NULL
  381. };
  382. rt_err_t rt_i2c_bit_add_bus(struct rt_i2c_bus_device *bus,
  383. const char *bus_name)
  384. {
  385. struct rt_i2c_bit_ops *bit_ops = bus->priv;
  386. RT_ASSERT(bit_ops != RT_NULL);
  387. bus->ops = &i2c_bit_bus_ops;
  388. return rt_i2c_bus_device_register(bus, bus_name);
  389. }