drv_pulse_encoder.c 4.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176
  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2019-08-23 balanceTWK first version
  9. */
  10. #include "board.h"
  11. #include "drv_config.h"
  12. #ifdef RT_USING_PULSE_ENCODER
  13. //#define DRV_DEBUG
  14. #define LOG_TAG "drv.pulse_encoder"
  15. #include <drv_log.h>
  16. #if !defined(BSP_USING_PULSE_ENCODER1) && !defined(BSP_USING_PULSE_ENCODER2) && !defined(BSP_USING_PULSE_ENCODER3) \
  17. && !defined(BSP_USING_PULSE_ENCODER4) && !defined(BSP_USING_PULSE_ENCODER5) && !defined(BSP_USING_PULSE_ENCODER6)
  18. #error "Please define at least one BSP_USING_PULSE_ENCODERx"
  19. /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */
  20. #endif
  21. enum
  22. {
  23. #ifdef BSP_USING_PULSE_ENCODER1
  24. PULSE_ENCODER1_INDEX,
  25. #endif
  26. #ifdef BSP_USING_PULSE_ENCODER2
  27. PULSE_ENCODER2_INDEX,
  28. #endif
  29. #ifdef BSP_USING_PULSE_ENCODER3
  30. PULSE_ENCODER3_INDEX,
  31. #endif
  32. #ifdef BSP_USING_PULSE_ENCODER4
  33. PULSE_ENCODER4_INDEX,
  34. #endif
  35. #ifdef BSP_USING_PULSE_ENCODER5
  36. PULSE_ENCODER5_INDEX,
  37. #endif
  38. #ifdef BSP_USING_PULSE_ENCODER6
  39. PULSE_ENCODER6_INDEX,
  40. #endif
  41. };
  42. struct stm32_pulse_encoder_device
  43. {
  44. struct rt_pulse_encoder_device pulse_encoder;
  45. TIM_HandleTypeDef tim_handler;
  46. char *name;
  47. };
  48. static struct stm32_pulse_encoder_device stm32_pulse_encoder_obj[] =
  49. {
  50. #ifdef BSP_USING_PULSE_ENCODER1
  51. PULSE_ENCODER1_CONFIG,
  52. #endif
  53. #ifdef BSP_USING_PULSE_ENCODER2
  54. PULSE_ENCODER2_CONFIG,
  55. #endif
  56. #ifdef BSP_USING_PULSE_ENCODER3
  57. PULSE_ENCODER3_CONFIG,
  58. #endif
  59. #ifdef BSP_USING_PULSE_ENCODER4
  60. PULSE_ENCODER4_CONFIG,
  61. #endif
  62. #ifdef BSP_USING_PULSE_ENCODER5
  63. PULSE_ENCODER5_CONFIG,
  64. #endif
  65. #ifdef BSP_USING_PULSE_ENCODER6
  66. PULSE_ENCODER6_CONFIG,
  67. #endif
  68. };
  69. rt_err_t pulse_encoder_init(struct rt_pulse_encoder_device *pulse_encoder)
  70. {
  71. TIM_Encoder_InitTypeDef sConfig;
  72. TIM_MasterConfigTypeDef sMasterConfig;
  73. TIM_HandleTypeDef *tim_handler = (TIM_HandleTypeDef *)pulse_encoder->parent.user_data;
  74. tim_handler->Init.Prescaler = 0;
  75. tim_handler->Init.CounterMode = TIM_COUNTERMODE_UP;
  76. tim_handler->Init.Period = 0xffff;
  77. tim_handler->Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  78. sConfig.EncoderMode = TIM_ENCODERMODE_TI12;
  79. sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
  80. sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI;
  81. sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
  82. sConfig.IC1Filter = 3;
  83. sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
  84. sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI;
  85. sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
  86. sConfig.IC2Filter = 3;
  87. if (HAL_TIM_Encoder_Init(tim_handler, &sConfig) != HAL_OK)
  88. {
  89. LOG_E("pulse_encoder init failed");
  90. return -RT_ERROR;
  91. }
  92. sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
  93. sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
  94. if (HAL_TIMEx_MasterConfigSynchronization(tim_handler, &sMasterConfig))
  95. {
  96. LOG_E("TIMx master config failed");
  97. return -RT_ERROR;
  98. }
  99. return RT_EOK;
  100. }
  101. rt_int32_t pulse_encoder_get_count(struct rt_pulse_encoder_device *pulse_encoder)
  102. {
  103. TIM_HandleTypeDef *tim_handler = (TIM_HandleTypeDef *)pulse_encoder->parent.user_data;
  104. return (rt_int16_t)__HAL_TIM_GET_COUNTER(tim_handler);
  105. }
  106. rt_err_t pulse_encoder_control(struct rt_pulse_encoder_device *pulse_encoder, rt_uint32_t cmd, void *args)
  107. {
  108. rt_err_t result;
  109. TIM_HandleTypeDef *tim_handler = (TIM_HandleTypeDef *)pulse_encoder->parent.user_data;
  110. result = RT_EOK;
  111. switch (cmd)
  112. {
  113. case PULSE_ENCODER_CMD_ENABLE:
  114. HAL_TIM_Encoder_Start(tim_handler, TIM_CHANNEL_ALL);
  115. break;
  116. case PULSE_ENCODER_CMD_DISABLE:
  117. HAL_TIM_Encoder_Stop(tim_handler, TIM_CHANNEL_ALL);
  118. break;
  119. case PULSE_ENCODER_CMD_CLEAR_COUNT:
  120. __HAL_TIM_SET_COUNTER(tim_handler, 0);
  121. break;
  122. default:
  123. result = -RT_ENOSYS;
  124. break;
  125. }
  126. return result;
  127. }
  128. static const struct rt_pulse_encoder_ops _ops =
  129. {
  130. .init = pulse_encoder_init,
  131. .get_count = pulse_encoder_get_count,
  132. .control = pulse_encoder_control,
  133. };
  134. int hw_pulse_encoder_init(void)
  135. {
  136. int i;
  137. int result;
  138. result = RT_EOK;
  139. for (i = 0; i < sizeof(stm32_pulse_encoder_obj) / sizeof(stm32_pulse_encoder_obj[0]); i++)
  140. {
  141. stm32_pulse_encoder_obj[i].pulse_encoder.type = AB_PHASE_PULSE_ENCODER;
  142. stm32_pulse_encoder_obj[i].pulse_encoder.ops = &_ops;
  143. if (rt_device_pulse_encoder_register(&stm32_pulse_encoder_obj[i].pulse_encoder, stm32_pulse_encoder_obj[i].name, &stm32_pulse_encoder_obj[i].tim_handler) != RT_EOK)
  144. {
  145. LOG_E("%s register failed", stm32_pulse_encoder_obj[i].name);
  146. result = -RT_ERROR;
  147. }
  148. }
  149. return result;
  150. }
  151. INIT_BOARD_EXPORT(hw_pulse_encoder_init);
  152. #endif