drv_usart.c 28 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-10-30 SummerGift first version
  9. */
  10. #include "board.h"
  11. #include "drv_usart.h"
  12. #include "drv_config.h"
  13. #ifdef RT_USING_SERIAL
  14. //#define DRV_DEBUG
  15. #define LOG_TAG "drv.usart"
  16. #include <drv_log.h>
  17. #if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && !defined(BSP_USING_UART3) && \
  18. !defined(BSP_USING_UART4) && !defined(BSP_USING_UART5) && !defined(BSP_USING_UART6) && \
  19. !defined(BSP_USING_UART7) && !defined(BSP_USING_UART8) && !defined(BSP_USING_LPUART1)
  20. #error "Please define at least one BSP_USING_UARTx"
  21. /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */
  22. #endif
  23. #ifdef RT_SERIAL_USING_DMA
  24. static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag);
  25. #endif
  26. enum
  27. {
  28. #ifdef BSP_USING_UART1
  29. UART1_INDEX,
  30. #endif
  31. #ifdef BSP_USING_UART2
  32. UART2_INDEX,
  33. #endif
  34. #ifdef BSP_USING_UART3
  35. UART3_INDEX,
  36. #endif
  37. #ifdef BSP_USING_UART4
  38. UART4_INDEX,
  39. #endif
  40. #ifdef BSP_USING_UART5
  41. UART5_INDEX,
  42. #endif
  43. #ifdef BSP_USING_UART6
  44. UART6_INDEX,
  45. #endif
  46. #ifdef BSP_USING_UART7
  47. UART7_INDEX,
  48. #endif
  49. #ifdef BSP_USING_UART8
  50. UART8_INDEX,
  51. #endif
  52. #ifdef BSP_USING_LPUART1
  53. LPUART1_INDEX,
  54. #endif
  55. };
  56. static struct stm32_uart_config uart_config[] =
  57. {
  58. #ifdef BSP_USING_UART1
  59. UART1_CONFIG,
  60. #endif
  61. #ifdef BSP_USING_UART2
  62. UART2_CONFIG,
  63. #endif
  64. #ifdef BSP_USING_UART3
  65. UART3_CONFIG,
  66. #endif
  67. #ifdef BSP_USING_UART4
  68. UART4_CONFIG,
  69. #endif
  70. #ifdef BSP_USING_UART5
  71. UART5_CONFIG,
  72. #endif
  73. #ifdef BSP_USING_UART6
  74. UART6_CONFIG,
  75. #endif
  76. #ifdef BSP_USING_UART7
  77. UART7_CONFIG,
  78. #endif
  79. #ifdef BSP_USING_UART8
  80. UART8_CONFIG,
  81. #endif
  82. #ifdef BSP_USING_LPUART1
  83. LPUART1_CONFIG,
  84. #endif
  85. };
  86. static struct stm32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
  87. static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  88. {
  89. struct stm32_uart *uart;
  90. RT_ASSERT(serial != RT_NULL);
  91. RT_ASSERT(cfg != RT_NULL);
  92. uart = (struct stm32_uart *)serial->parent.user_data;
  93. RT_ASSERT(uart != RT_NULL);
  94. uart->handle.Instance = uart->config->Instance;
  95. uart->handle.Init.BaudRate = cfg->baud_rate;
  96. uart->handle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
  97. uart->handle.Init.Mode = UART_MODE_TX_RX;
  98. uart->handle.Init.OverSampling = UART_OVERSAMPLING_16;
  99. switch (cfg->data_bits)
  100. {
  101. case DATA_BITS_8:
  102. uart->handle.Init.WordLength = UART_WORDLENGTH_8B;
  103. break;
  104. case DATA_BITS_9:
  105. uart->handle.Init.WordLength = UART_WORDLENGTH_9B;
  106. break;
  107. default:
  108. uart->handle.Init.WordLength = UART_WORDLENGTH_8B;
  109. break;
  110. }
  111. switch (cfg->stop_bits)
  112. {
  113. case STOP_BITS_1:
  114. uart->handle.Init.StopBits = UART_STOPBITS_1;
  115. break;
  116. case STOP_BITS_2:
  117. uart->handle.Init.StopBits = UART_STOPBITS_2;
  118. break;
  119. default:
  120. uart->handle.Init.StopBits = UART_STOPBITS_1;
  121. break;
  122. }
  123. switch (cfg->parity)
  124. {
  125. case PARITY_NONE:
  126. uart->handle.Init.Parity = UART_PARITY_NONE;
  127. break;
  128. case PARITY_ODD:
  129. uart->handle.Init.Parity = UART_PARITY_ODD;
  130. break;
  131. case PARITY_EVEN:
  132. uart->handle.Init.Parity = UART_PARITY_EVEN;
  133. break;
  134. default:
  135. uart->handle.Init.Parity = UART_PARITY_NONE;
  136. break;
  137. }
  138. if (HAL_UART_Init(&uart->handle) != HAL_OK)
  139. {
  140. return -RT_ERROR;
  141. }
  142. return RT_EOK;
  143. }
  144. static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg)
  145. {
  146. struct stm32_uart *uart;
  147. #ifdef RT_SERIAL_USING_DMA
  148. rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
  149. #endif
  150. RT_ASSERT(serial != RT_NULL);
  151. uart = (struct stm32_uart *)serial->parent.user_data;
  152. RT_ASSERT(uart != RT_NULL);
  153. switch (cmd)
  154. {
  155. /* disable interrupt */
  156. case RT_DEVICE_CTRL_CLR_INT:
  157. /* disable rx irq */
  158. NVIC_DisableIRQ(uart->config->irq_type);
  159. /* disable interrupt */
  160. __HAL_UART_DISABLE_IT(&(uart->handle), UART_IT_RXNE);
  161. break;
  162. /* enable interrupt */
  163. case RT_DEVICE_CTRL_SET_INT:
  164. /* enable rx irq */
  165. NVIC_EnableIRQ(uart->config->irq_type);
  166. /* enable interrupt */
  167. __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_RXNE);
  168. break;
  169. #ifdef RT_SERIAL_USING_DMA
  170. case RT_DEVICE_CTRL_CONFIG:
  171. stm32_dma_config(serial, ctrl_arg);
  172. break;
  173. #endif
  174. }
  175. return RT_EOK;
  176. }
  177. static int stm32_putc(struct rt_serial_device *serial, char c)
  178. {
  179. struct stm32_uart *uart;
  180. RT_ASSERT(serial != RT_NULL);
  181. uart = (struct stm32_uart *)serial->parent.user_data;
  182. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
  183. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
  184. || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7)
  185. uart->handle.Instance->TDR = c;
  186. #else
  187. uart->handle.Instance->DR = c;
  188. #endif
  189. while (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) == RESET);
  190. return 1;
  191. }
  192. static int stm32_getc(struct rt_serial_device *serial)
  193. {
  194. int ch;
  195. struct stm32_uart *uart;
  196. RT_ASSERT(serial != RT_NULL);
  197. uart = (struct stm32_uart *)serial->parent.user_data;
  198. RT_ASSERT(uart != RT_NULL);
  199. ch = -1;
  200. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
  201. {
  202. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
  203. || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7)
  204. ch = uart->handle.Instance->RDR & 0xff;
  205. #else
  206. ch = uart->handle.Instance->DR & 0xff;
  207. #endif
  208. }
  209. return ch;
  210. }
  211. static rt_size_t stm32_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
  212. {
  213. struct stm32_uart *uart;
  214. RT_ASSERT(serial != RT_NULL);
  215. uart = (struct stm32_uart *)(serial->parent.user_data);
  216. RT_ASSERT(uart != RT_NULL);
  217. if (size == 0)
  218. {
  219. return 0;
  220. }
  221. if (RT_SERIAL_DMA_TX == direction)
  222. {
  223. if (HAL_UART_Transmit_DMA(&uart->handle, buf, size) == HAL_OK)
  224. {
  225. return size;
  226. }
  227. else
  228. {
  229. return 0;
  230. }
  231. }
  232. return 0;
  233. }
  234. static const struct rt_uart_ops stm32_uart_ops =
  235. {
  236. .configure = stm32_configure,
  237. .control = stm32_control,
  238. .putc = stm32_putc,
  239. .getc = stm32_getc,
  240. .dma_transmit = stm32_dma_transmit
  241. };
  242. /**
  243. * Uart common interrupt process. This need add to uart ISR.
  244. *
  245. * @param serial serial device
  246. */
  247. static void uart_isr(struct rt_serial_device *serial)
  248. {
  249. struct stm32_uart *uart;
  250. #ifdef RT_SERIAL_USING_DMA
  251. rt_size_t recv_total_index, recv_len;
  252. rt_base_t level;
  253. #endif
  254. RT_ASSERT(serial != RT_NULL);
  255. uart = (struct stm32_uart *) serial->parent.user_data;
  256. RT_ASSERT(uart != RT_NULL);
  257. /* UART in mode Receiver -------------------------------------------------*/
  258. if ((__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET) &&
  259. (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_RXNE) != RESET))
  260. {
  261. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  262. }
  263. #ifdef RT_SERIAL_USING_DMA
  264. else if ((uart->uart_dma_flag) && (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_IDLE) != RESET)
  265. && (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_IDLE) != RESET))
  266. {
  267. level = rt_hw_interrupt_disable();
  268. recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma_rx.handle));
  269. recv_len = recv_total_index - uart->dma_rx.last_index;
  270. uart->dma_rx.last_index = recv_total_index;
  271. rt_hw_interrupt_enable(level);
  272. if (recv_len)
  273. {
  274. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
  275. }
  276. __HAL_UART_CLEAR_IDLEFLAG(&uart->handle);
  277. }
  278. else if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) != RESET)
  279. {
  280. if ((serial->parent.open_flag & RT_DEVICE_FLAG_DMA_TX) != 0)
  281. {
  282. HAL_UART_IRQHandler(&(uart->handle));
  283. }
  284. else
  285. {
  286. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
  287. }
  288. }
  289. #endif
  290. else
  291. {
  292. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_ORE) != RESET)
  293. {
  294. __HAL_UART_CLEAR_OREFLAG(&uart->handle);
  295. }
  296. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_NE) != RESET)
  297. {
  298. __HAL_UART_CLEAR_NEFLAG(&uart->handle);
  299. }
  300. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_FE) != RESET)
  301. {
  302. __HAL_UART_CLEAR_FEFLAG(&uart->handle);
  303. }
  304. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_PE) != RESET)
  305. {
  306. __HAL_UART_CLEAR_PEFLAG(&uart->handle);
  307. }
  308. #if !defined(SOC_SERIES_STM32L4) && !defined(SOC_SERIES_STM32F7) && !defined(SOC_SERIES_STM32F0) \
  309. && !defined(SOC_SERIES_STM32L0) && !defined(SOC_SERIES_STM32G0) && !defined(SOC_SERIES_STM32H7)
  310. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_LBD) != RESET)
  311. {
  312. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_LBD);
  313. }
  314. #endif
  315. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_CTS) != RESET)
  316. {
  317. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_CTS);
  318. }
  319. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TXE) != RESET)
  320. {
  321. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TXE);
  322. }
  323. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) != RESET)
  324. {
  325. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
  326. }
  327. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
  328. {
  329. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_RXNE);
  330. }
  331. }
  332. }
  333. #ifdef RT_SERIAL_USING_DMA
  334. static void dma_isr(struct rt_serial_device *serial)
  335. {
  336. struct stm32_uart *uart;
  337. rt_size_t recv_total_index, recv_len;
  338. rt_base_t level;
  339. RT_ASSERT(serial != RT_NULL);
  340. uart = (struct stm32_uart *) serial->parent.user_data;
  341. RT_ASSERT(uart != RT_NULL);
  342. if ((__HAL_DMA_GET_IT_SOURCE(&(uart->dma_rx.handle), DMA_IT_TC) != RESET) ||
  343. (__HAL_DMA_GET_IT_SOURCE(&(uart->dma_rx.handle), DMA_IT_HT) != RESET))
  344. {
  345. level = rt_hw_interrupt_disable();
  346. recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma_rx.handle));
  347. if (recv_total_index == 0)
  348. {
  349. recv_len = serial->config.bufsz - uart->dma_rx.last_index;
  350. }
  351. else
  352. {
  353. recv_len = recv_total_index - uart->dma_rx.last_index;
  354. }
  355. uart->dma_rx.last_index = recv_total_index;
  356. rt_hw_interrupt_enable(level);
  357. if (recv_len)
  358. {
  359. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
  360. }
  361. }
  362. }
  363. #endif
  364. #if defined(BSP_USING_UART1)
  365. void USART1_IRQHandler(void)
  366. {
  367. /* enter interrupt */
  368. rt_interrupt_enter();
  369. uart_isr(&(uart_obj[UART1_INDEX].serial));
  370. /* leave interrupt */
  371. rt_interrupt_leave();
  372. }
  373. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA)
  374. void UART1_DMA_RX_IRQHandler(void)
  375. {
  376. /* enter interrupt */
  377. rt_interrupt_enter();
  378. HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma_rx.handle);
  379. /* leave interrupt */
  380. rt_interrupt_leave();
  381. }
  382. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA) */
  383. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA)
  384. void UART1_DMA_TX_IRQHandler(void)
  385. {
  386. /* enter interrupt */
  387. rt_interrupt_enter();
  388. HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma_tx.handle);
  389. /* leave interrupt */
  390. rt_interrupt_leave();
  391. }
  392. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA) */
  393. #endif /* BSP_USING_UART1 */
  394. #if defined(BSP_USING_UART2)
  395. void USART2_IRQHandler(void)
  396. {
  397. /* enter interrupt */
  398. rt_interrupt_enter();
  399. uart_isr(&(uart_obj[UART2_INDEX].serial));
  400. /* leave interrupt */
  401. rt_interrupt_leave();
  402. }
  403. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA)
  404. void UART2_DMA_RX_IRQHandler(void)
  405. {
  406. /* enter interrupt */
  407. rt_interrupt_enter();
  408. HAL_DMA_IRQHandler(&uart_obj[UART2_INDEX].dma_rx.handle);
  409. /* leave interrupt */
  410. rt_interrupt_leave();
  411. }
  412. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA) */
  413. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_TX_USING_DMA)
  414. void UART2_DMA_TX_IRQHandler(void)
  415. {
  416. /* enter interrupt */
  417. rt_interrupt_enter();
  418. HAL_DMA_IRQHandler(&uart_obj[UART2_INDEX].dma_tx.handle);
  419. /* leave interrupt */
  420. rt_interrupt_leave();
  421. }
  422. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_TX_USING_DMA) */
  423. #endif /* BSP_USING_UART2 */
  424. #if defined(BSP_USING_UART3)
  425. void USART3_IRQHandler(void)
  426. {
  427. /* enter interrupt */
  428. rt_interrupt_enter();
  429. uart_isr(&(uart_obj[UART3_INDEX].serial));
  430. /* leave interrupt */
  431. rt_interrupt_leave();
  432. }
  433. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_RX_USING_DMA)
  434. void UART3_DMA_RX_IRQHandler(void)
  435. {
  436. /* enter interrupt */
  437. rt_interrupt_enter();
  438. HAL_DMA_IRQHandler(&uart_obj[UART3_INDEX].dma_rx.handle);
  439. /* leave interrupt */
  440. rt_interrupt_leave();
  441. }
  442. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART3_RX_USING_DMA) */
  443. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_TX_USING_DMA)
  444. void UART3_DMA_TX_IRQHandler(void)
  445. {
  446. /* enter interrupt */
  447. rt_interrupt_enter();
  448. HAL_DMA_IRQHandler(&uart_obj[UART3_INDEX].dma_tx.handle);
  449. /* leave interrupt */
  450. rt_interrupt_leave();
  451. }
  452. #endif /* defined(BSP_UART_USING_DMA_TX) && defined(BSP_UART3_TX_USING_DMA) */
  453. #endif /* BSP_USING_UART3*/
  454. #if defined(BSP_USING_UART4)
  455. void UART4_IRQHandler(void)
  456. {
  457. /* enter interrupt */
  458. rt_interrupt_enter();
  459. uart_isr(&(uart_obj[UART4_INDEX].serial));
  460. /* leave interrupt */
  461. rt_interrupt_leave();
  462. }
  463. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_RX_USING_DMA)
  464. void UART4_DMA_RX_IRQHandler(void)
  465. {
  466. /* enter interrupt */
  467. rt_interrupt_enter();
  468. HAL_DMA_IRQHandler(&uart_obj[UART4_INDEX].dma_rx.handle);
  469. /* leave interrupt */
  470. rt_interrupt_leave();
  471. }
  472. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART4_RX_USING_DMA) */
  473. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_TX_USING_DMA)
  474. void UART4_DMA_TX_IRQHandler(void)
  475. {
  476. /* enter interrupt */
  477. rt_interrupt_enter();
  478. HAL_DMA_IRQHandler(&uart_obj[UART4_INDEX].dma_tx.handle);
  479. /* leave interrupt */
  480. rt_interrupt_leave();
  481. }
  482. #endif /* defined(BSP_UART_USING_DMA_TX) && defined(BSP_UART4_TX_USING_DMA) */
  483. #endif /* BSP_USING_UART4*/
  484. #if defined(BSP_USING_UART5)
  485. void UART5_IRQHandler(void)
  486. {
  487. /* enter interrupt */
  488. rt_interrupt_enter();
  489. uart_isr(&(uart_obj[UART5_INDEX].serial));
  490. /* leave interrupt */
  491. rt_interrupt_leave();
  492. }
  493. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA)
  494. void UART5_DMA_RX_IRQHandler(void)
  495. {
  496. /* enter interrupt */
  497. rt_interrupt_enter();
  498. HAL_DMA_IRQHandler(&uart_obj[UART5_INDEX].dma_rx.handle);
  499. /* leave interrupt */
  500. rt_interrupt_leave();
  501. }
  502. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA) */
  503. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_TX_USING_DMA)
  504. void UART5_DMA_TX_IRQHandler(void)
  505. {
  506. /* enter interrupt */
  507. rt_interrupt_enter();
  508. HAL_DMA_IRQHandler(&uart_obj[UART5_INDEX].dma_tx.handle);
  509. /* leave interrupt */
  510. rt_interrupt_leave();
  511. }
  512. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_TX_USING_DMA) */
  513. #endif /* BSP_USING_UART5*/
  514. #if defined(BSP_USING_UART6)
  515. void USART6_IRQHandler(void)
  516. {
  517. /* enter interrupt */
  518. rt_interrupt_enter();
  519. uart_isr(&(uart_obj[UART6_INDEX].serial));
  520. /* leave interrupt */
  521. rt_interrupt_leave();
  522. }
  523. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA)
  524. void UART6_DMA_RX_IRQHandler(void)
  525. {
  526. /* enter interrupt */
  527. rt_interrupt_enter();
  528. HAL_DMA_IRQHandler(&uart_obj[UART6_INDEX].dma_rx.handle);
  529. /* leave interrupt */
  530. rt_interrupt_leave();
  531. }
  532. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA) */
  533. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_TX_USING_DMA)
  534. void UART6_DMA_TX_IRQHandler(void)
  535. {
  536. /* enter interrupt */
  537. rt_interrupt_enter();
  538. HAL_DMA_IRQHandler(&uart_obj[UART6_INDEX].dma_tx.handle);
  539. /* leave interrupt */
  540. rt_interrupt_leave();
  541. }
  542. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_TX_USING_DMA) */
  543. #endif /* BSP_USING_UART6*/
  544. #if defined(BSP_USING_UART7)
  545. void UART7_IRQHandler(void)
  546. {
  547. /* enter interrupt */
  548. rt_interrupt_enter();
  549. uart_isr(&(uart_obj[UART7_INDEX].serial));
  550. /* leave interrupt */
  551. rt_interrupt_leave();
  552. }
  553. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_RX_USING_DMA)
  554. void UART7_DMA_RX_IRQHandler(void)
  555. {
  556. /* enter interrupt */
  557. rt_interrupt_enter();
  558. HAL_DMA_IRQHandler(&uart_obj[UART7_INDEX].dma_rx.handle);
  559. /* leave interrupt */
  560. rt_interrupt_leave();
  561. }
  562. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_RX_USING_DMA) */
  563. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_TX_USING_DMA)
  564. void UART7_DMA_TX_IRQHandler(void)
  565. {
  566. /* enter interrupt */
  567. rt_interrupt_enter();
  568. HAL_DMA_IRQHandler(&uart_obj[UART7_INDEX].dma_tx.handle);
  569. /* leave interrupt */
  570. rt_interrupt_leave();
  571. }
  572. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_TX_USING_DMA) */
  573. #endif /* BSP_USING_UART7*/
  574. #if defined(BSP_USING_UART8)
  575. void UART8_IRQHandler(void)
  576. {
  577. /* enter interrupt */
  578. rt_interrupt_enter();
  579. uart_isr(&(uart_obj[UART8_INDEX].serial));
  580. /* leave interrupt */
  581. rt_interrupt_leave();
  582. }
  583. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_RX_USING_DMA)
  584. void UART8_DMA_RX_IRQHandler(void)
  585. {
  586. /* enter interrupt */
  587. rt_interrupt_enter();
  588. HAL_DMA_IRQHandler(&uart_obj[UART8_INDEX].dma_rx.handle);
  589. /* leave interrupt */
  590. rt_interrupt_leave();
  591. }
  592. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_RX_USING_DMA) */
  593. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_TX_USING_DMA)
  594. void UART8_DMA_TX_IRQHandler(void)
  595. {
  596. /* enter interrupt */
  597. rt_interrupt_enter();
  598. HAL_DMA_IRQHandler(&uart_obj[UART8_INDEX].dma_tx.handle);
  599. /* leave interrupt */
  600. rt_interrupt_leave();
  601. }
  602. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_TX_USING_DMA) */
  603. #endif /* BSP_USING_UART8*/
  604. #if defined(BSP_USING_LPUART1)
  605. void LPUART1_IRQHandler(void)
  606. {
  607. /* enter interrupt */
  608. rt_interrupt_enter();
  609. uart_isr(&(uart_obj[LPUART1_INDEX].serial));
  610. /* leave interrupt */
  611. rt_interrupt_leave();
  612. }
  613. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA)
  614. void LPUART1_DMA_RX_IRQHandler(void)
  615. {
  616. /* enter interrupt */
  617. rt_interrupt_enter();
  618. HAL_DMA_IRQHandler(&uart_obj[LPUART1_INDEX].dma_rx.handle);
  619. /* leave interrupt */
  620. rt_interrupt_leave();
  621. }
  622. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA) */
  623. #endif /* BSP_USING_LPUART1*/
  624. #ifdef RT_SERIAL_USING_DMA
  625. static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag)
  626. {
  627. struct rt_serial_rx_fifo *rx_fifo;
  628. DMA_HandleTypeDef *DMA_Handle;
  629. struct dma_config *dma_config;
  630. struct stm32_uart *uart;
  631. RT_ASSERT(serial != RT_NULL);
  632. uart = (struct stm32_uart *)serial->parent.user_data;
  633. RT_ASSERT(uart != RT_NULL);
  634. if (RT_DEVICE_FLAG_DMA_RX == flag)
  635. {
  636. DMA_Handle = &uart->dma_rx.handle;
  637. dma_config = uart->config->dma_rx;
  638. }
  639. else if (RT_DEVICE_FLAG_DMA_TX == flag)
  640. {
  641. DMA_Handle = &uart->dma_tx.handle;
  642. dma_config = uart->config->dma_tx;
  643. }
  644. LOG_D("%s dma config start", uart->config->name);
  645. {
  646. rt_uint32_t tmpreg = 0x00U;
  647. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) \
  648. || defined(SOC_SERIES_STM32L0)
  649. /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
  650. SET_BIT(RCC->AHBENR, dma_config->dma_rcc);
  651. tmpreg = READ_BIT(RCC->AHBENR, dma_config->dma_rcc);
  652. #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4)
  653. /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
  654. SET_BIT(RCC->AHB1ENR, dma_config->dma_rcc);
  655. tmpreg = READ_BIT(RCC->AHB1ENR, dma_config->dma_rcc);
  656. #endif
  657. UNUSED(tmpreg); /* To avoid compiler warnings */
  658. }
  659. if (RT_DEVICE_FLAG_DMA_RX == flag)
  660. {
  661. __HAL_LINKDMA(&(uart->handle), hdmarx, uart->dma_rx.handle);
  662. }
  663. else if (RT_DEVICE_FLAG_DMA_TX == flag)
  664. {
  665. __HAL_LINKDMA(&(uart->handle), hdmatx, uart->dma_tx.handle);
  666. }
  667. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L0)
  668. DMA_Handle->Instance = dma_config->Instance;
  669. #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  670. DMA_Handle->Instance = dma_config->Instance;
  671. DMA_Handle->Init.Channel = dma_config->channel;
  672. #elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
  673. DMA_Handle->Instance = dma_config->Instance;
  674. DMA_Handle->Init.Request = dma_config->request;
  675. #endif
  676. DMA_Handle->Init.PeriphInc = DMA_PINC_DISABLE;
  677. DMA_Handle->Init.MemInc = DMA_MINC_ENABLE;
  678. DMA_Handle->Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
  679. DMA_Handle->Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
  680. if (RT_DEVICE_FLAG_DMA_RX == flag)
  681. {
  682. DMA_Handle->Init.Direction = DMA_PERIPH_TO_MEMORY;
  683. DMA_Handle->Init.Mode = DMA_CIRCULAR;
  684. }
  685. else if (RT_DEVICE_FLAG_DMA_TX == flag)
  686. {
  687. DMA_Handle->Init.Direction = DMA_MEMORY_TO_PERIPH;
  688. DMA_Handle->Init.Mode = DMA_NORMAL;
  689. }
  690. DMA_Handle->Init.Priority = DMA_PRIORITY_MEDIUM;
  691. #if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  692. DMA_Handle->Init.FIFOMode = DMA_FIFOMODE_DISABLE;
  693. #endif
  694. if (HAL_DMA_DeInit(DMA_Handle) != HAL_OK)
  695. {
  696. RT_ASSERT(0);
  697. }
  698. if (HAL_DMA_Init(DMA_Handle) != HAL_OK)
  699. {
  700. RT_ASSERT(0);
  701. }
  702. /* enable interrupt */
  703. if (flag == RT_DEVICE_FLAG_DMA_RX)
  704. {
  705. rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
  706. /* Start DMA transfer */
  707. if (HAL_UART_Receive_DMA(&(uart->handle), rx_fifo->buffer, serial->config.bufsz) != HAL_OK)
  708. {
  709. /* Transfer error in reception process */
  710. RT_ASSERT(0);
  711. }
  712. CLEAR_BIT(uart->handle.Instance->CR3, USART_CR3_EIE);
  713. __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_IDLE);
  714. }
  715. /* enable irq */
  716. HAL_NVIC_SetPriority(dma_config->dma_irq, 0, 0);
  717. HAL_NVIC_EnableIRQ(dma_config->dma_irq);
  718. HAL_NVIC_SetPriority(uart->config->irq_type, 1, 0);
  719. HAL_NVIC_EnableIRQ(uart->config->irq_type);
  720. LOG_D("%s dma %s instance: %x", uart->config->name, flag == RT_DEVICE_FLAG_DMA_RX ? "RX" : "TX", DMA_Handle->Instance);
  721. LOG_D("%s dma config done", uart->config->name);
  722. }
  723. /**
  724. * @brief UART error callbacks
  725. * @param huart: UART handle
  726. * @note This example shows a simple way to report transfer error, and you can
  727. * add your own implementation.
  728. * @retval None
  729. */
  730. void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
  731. {
  732. RT_ASSERT(huart != NULL);
  733. struct stm32_uart *uart = (struct stm32_uart *)huart;
  734. LOG_D("%s: %s %d\n", __FUNCTION__, uart->config->name, huart->ErrorCode);
  735. UNUSED(uart);
  736. }
  737. /**
  738. * @brief Rx Transfer completed callback
  739. * @param huart: UART handle
  740. * @note This example shows a simple way to report end of DMA Rx transfer, and
  741. * you can add your own implementation.
  742. * @retval None
  743. */
  744. void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
  745. {
  746. struct stm32_uart *uart;
  747. RT_ASSERT(huart != NULL);
  748. uart = (struct stm32_uart *)huart;
  749. dma_isr(&uart->serial);
  750. }
  751. /**
  752. * @brief Rx Half transfer completed callback
  753. * @param huart: UART handle
  754. * @note This example shows a simple way to report end of DMA Rx Half transfer,
  755. * and you can add your own implementation.
  756. * @retval None
  757. */
  758. void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
  759. {
  760. struct stm32_uart *uart;
  761. RT_ASSERT(huart != NULL);
  762. uart = (struct stm32_uart *)huart;
  763. dma_isr(&uart->serial);
  764. }
  765. void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
  766. {
  767. struct stm32_uart *uart;
  768. RT_ASSERT(huart != NULL);
  769. uart = (struct stm32_uart *)huart;
  770. rt_hw_serial_isr(&uart->serial, RT_SERIAL_EVENT_TX_DMADONE);
  771. }
  772. #endif /* RT_SERIAL_USING_DMA */
  773. static void stm32_uart_get_dma_config(void)
  774. {
  775. #ifdef BSP_USING_UART1
  776. uart_obj[UART1_INDEX].uart_dma_flag = 0;
  777. #ifdef BSP_UART1_RX_USING_DMA
  778. uart_obj[UART1_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  779. static struct dma_config uart1_dma_rx = UART1_DMA_RX_CONFIG;
  780. uart_config[UART1_INDEX].dma_rx = &uart1_dma_rx;
  781. #endif
  782. #ifdef BSP_UART1_TX_USING_DMA
  783. uart_obj[UART1_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  784. static struct dma_config uart1_dma_tx = UART1_DMA_TX_CONFIG;
  785. uart_config[UART1_INDEX].dma_tx = &uart1_dma_tx;
  786. #endif
  787. #endif
  788. #ifdef BSP_USING_UART2
  789. uart_obj[UART2_INDEX].uart_dma_flag = 0;
  790. #ifdef BSP_UART2_RX_USING_DMA
  791. uart_obj[UART2_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  792. static struct dma_config uart2_dma_rx = UART2_DMA_RX_CONFIG;
  793. uart_config[UART2_INDEX].dma_rx = &uart2_dma_rx;
  794. #endif
  795. #ifdef BSP_UART2_TX_USING_DMA
  796. uart_obj[UART2_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  797. static struct dma_config uart2_dma_tx = UART2_DMA_TX_CONFIG;
  798. uart_config[UART2_INDEX].dma_tx = &uart2_dma_tx;
  799. #endif
  800. #endif
  801. #ifdef BSP_USING_UART3
  802. uart_obj[UART3_INDEX].uart_dma_flag = 0;
  803. #ifdef BSP_UART3_RX_USING_DMA
  804. uart_obj[UART3_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  805. static struct dma_config uart3_dma_rx = UART3_DMA_RX_CONFIG;
  806. uart_config[UART3_INDEX].dma_rx = &uart3_dma_rx;
  807. #endif
  808. #ifdef BSP_UART3_TX_USING_DMA
  809. uart_obj[UART3_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  810. static struct dma_config uart3_dma_tx = UART3_DMA_TX_CONFIG;
  811. uart_config[UART3_INDEX].dma_tx = &uart3_dma_tx;
  812. #endif
  813. #endif
  814. #ifdef BSP_USING_UART4
  815. uart_obj[UART4_INDEX].uart_dma_flag = 0;
  816. #ifdef BSP_UART4_RX_USING_DMA
  817. uart_obj[UART4_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  818. static struct dma_config uart4_dma_rx = UART4_DMA_RX_CONFIG;
  819. uart_config[UART4_INDEX].dma_rx = &uart4_dma_rx;
  820. #endif
  821. #ifdef BSP_UART4_TX_USING_DMA
  822. uart_obj[UART4_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  823. static struct dma_config uart4_dma_tx = UART4_DMA_TX_CONFIG;
  824. uart_config[UART4_INDEX].dma_tx = &uart4_dma_tx;
  825. #endif
  826. #endif
  827. #ifdef BSP_USING_UART5
  828. uart_obj[UART5_INDEX].uart_dma_flag = 0;
  829. #ifdef BSP_UART5_RX_USING_DMA
  830. uart_obj[UART5_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  831. static struct dma_config uart5_dma_rx = UART5_DMA_RX_CONFIG;
  832. uart_config[UART5_INDEX].dma_rx = &uart5_dma_rx;
  833. #endif
  834. #ifdef BSP_UART5_TX_USING_DMA
  835. uart_obj[UART5_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  836. static struct dma_config uart5_dma_tx = UART5_DMA_TX_CONFIG;
  837. uart_config[UART5_INDEX].dma_tx = &uart5_dma_tx;
  838. #endif
  839. #endif
  840. #ifdef BSP_USING_UART6
  841. uart_obj[UART6_INDEX].uart_dma_flag = 0;
  842. #ifdef BSP_UART6_RX_USING_DMA
  843. uart_obj[UART6_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  844. static struct dma_config uart6_dma_rx = UART6_DMA_RX_CONFIG;
  845. uart_config[UART6_INDEX].dma_rx = &uart6_dma_rx;
  846. #endif
  847. #ifdef BSP_UART6_TX_USING_DMA
  848. uart_obj[UART6_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  849. static struct dma_config uart6_dma_tx = UART6_DMA_TX_CONFIG;
  850. uart_config[UART6_INDEX].dma_tx = &uart6_dma_tx;
  851. #endif
  852. #endif
  853. }
  854. int rt_hw_usart_init(void)
  855. {
  856. rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct stm32_uart);
  857. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  858. rt_err_t result = 0;
  859. stm32_uart_get_dma_config();
  860. for (int i = 0; i < obj_num; i++)
  861. {
  862. uart_obj[i].config = &uart_config[i];
  863. uart_obj[i].serial.ops = &stm32_uart_ops;
  864. uart_obj[i].serial.config = config;
  865. /* register UART device */
  866. result = rt_hw_serial_register(&uart_obj[i].serial, uart_obj[i].config->name,
  867. RT_DEVICE_FLAG_RDWR
  868. | RT_DEVICE_FLAG_INT_RX
  869. | RT_DEVICE_FLAG_INT_TX
  870. | uart_obj[i].uart_dma_flag
  871. , &uart_obj[i]);
  872. RT_ASSERT(result == RT_EOK);
  873. }
  874. return result;
  875. }
  876. #endif /* RT_USING_SERIAL */