drv_usart.c 13 KB

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  1. /*
  2. * Copyright (C) 2021, lizhengyang
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2021-09-02 lizhengyang first version
  9. */
  10. #include <rtdevice.h>
  11. #include <rthw.h>
  12. #include "drv_usart.h"
  13. #include "board_config.h"
  14. #ifdef RT_USING_SERIAL
  15. #if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && !defined(BSP_USING_UART3) && !defined(BSP_USING_UART4)
  16. #error "Please define at least one BSP_USING_UARTx"
  17. /* UART instance can be selected at menuconfig -> Hardware Drivers Config -> On-chip Peripheral Drivers -> Enable UART */
  18. #endif
  19. /* HC32 config uart class */
  20. struct hc32_uart_config
  21. {
  22. struct hc32_irq_config rxerr_irq_config;
  23. struct hc32_irq_config rx_irq_config;
  24. };
  25. /* HC32 UART index */
  26. struct uart_index
  27. {
  28. rt_uint32_t index;
  29. M4_USART_TypeDef *Instance;
  30. };
  31. /* HC32 UART irq handler */
  32. struct uart_irq_handler
  33. {
  34. void (*rxerr_irq_handler)(void);
  35. void (*rx_irq_handler)(void);
  36. };
  37. /* HC32 uart dirver class */
  38. struct hc32_uart
  39. {
  40. const char *name;
  41. M4_USART_TypeDef *Instance;
  42. struct hc32_uart_config config;
  43. struct rt_serial_device serial;
  44. };
  45. #ifndef UART_CONFIG
  46. #define UART_CONFIG(uart_name, USART) \
  47. { \
  48. .name = uart_name, \
  49. .Instance = M4_##USART, \
  50. .config = { \
  51. .rxerr_irq_config = { \
  52. .irq = USART##_RXERR_INT_IRQn, \
  53. .irq_prio = USART##_RXERR_INT_PRIO, \
  54. .int_src = INT_##USART##_EI, \
  55. }, \
  56. .rx_irq_config = { \
  57. .irq = USART##_RX_INT_IRQn, \
  58. .irq_prio = USART##_RX_INT_PRIO, \
  59. .int_src = INT_##USART##_RI, \
  60. }, \
  61. }, \
  62. }
  63. #endif /* UART_CONFIG */
  64. enum
  65. {
  66. #ifdef BSP_USING_UART1
  67. UART1_INDEX,
  68. #endif
  69. #ifdef BSP_USING_UART2
  70. UART2_INDEX,
  71. #endif
  72. #ifdef BSP_USING_UART3
  73. UART3_INDEX,
  74. #endif
  75. #ifdef BSP_USING_UART4
  76. UART4_INDEX,
  77. #endif
  78. UART_INDEX_MAX,
  79. };
  80. static const struct uart_index uart_map[] =
  81. {
  82. #ifdef BSP_USING_UART1
  83. {UART1_INDEX, M4_USART1},
  84. #endif
  85. #ifdef BSP_USING_UART2
  86. {UART2_INDEX, M4_USART2},
  87. #endif
  88. #ifdef BSP_USING_UART3
  89. {UART3_INDEX, M4_USART3},
  90. #endif
  91. #ifdef BSP_USING_UART4
  92. {UART4_INDEX, M4_USART4},
  93. #endif
  94. };
  95. static const struct uart_index uart_clock_map[] =
  96. {
  97. #ifdef BSP_USING_UART1
  98. {0, M4_USART1},
  99. #endif
  100. #ifdef BSP_USING_UART2
  101. {1, M4_USART2},
  102. #endif
  103. #ifdef BSP_USING_UART3
  104. {2, M4_USART3},
  105. #endif
  106. #ifdef BSP_USING_UART4
  107. {3, M4_USART4},
  108. #endif
  109. };
  110. static struct hc32_uart uart_obj[] =
  111. {
  112. #ifdef BSP_USING_UART1
  113. UART_CONFIG("uart1", USART1),
  114. #endif
  115. #ifdef BSP_USING_UART2
  116. UART_CONFIG("uart2", USART2),
  117. #endif
  118. #ifdef BSP_USING_UART3
  119. UART_CONFIG("uart3", USART3),
  120. #endif
  121. #ifdef BSP_USING_UART4
  122. UART_CONFIG("uart4", USART4),
  123. #endif
  124. };
  125. static const struct uart_irq_handler uart_irq_handlers[sizeof(uart_obj) / sizeof(uart_obj[0])];
  126. static uint32_t hc32_get_uart_index(M4_USART_TypeDef *Instance)
  127. {
  128. uint32_t index = UART_INDEX_MAX;
  129. for (uint8_t i = 0U; i < ARRAY_SZ(uart_map); i++)
  130. {
  131. if (uart_map[i].Instance == Instance)
  132. {
  133. index = uart_map[i].index;
  134. RT_ASSERT(index < UART_INDEX_MAX)
  135. break;
  136. }
  137. }
  138. return index;
  139. }
  140. static uint32_t hc32_get_uart_clock_index(M4_USART_TypeDef *Instance)
  141. {
  142. uint32_t index = 4;
  143. for (uint8_t i = 0U; i < ARRAY_SZ(uart_clock_map); i++)
  144. {
  145. if (uart_clock_map[i].Instance == Instance)
  146. {
  147. index = uart_clock_map[i].index;
  148. RT_ASSERT(index < 4)
  149. break;
  150. }
  151. }
  152. return index;
  153. }
  154. static uint32_t hc32_get_usart_fcg(M4_USART_TypeDef *Instance)
  155. {
  156. return (PWC_FCG1_PERIPH_USART1 << hc32_get_uart_clock_index(Instance));
  157. }
  158. static rt_err_t hc32_configure(struct rt_serial_device *serial,
  159. struct serial_configure *cfg)
  160. {
  161. struct hc32_uart *uart;
  162. stc_usart_uart_init_t uart_init;
  163. RT_ASSERT(RT_NULL != cfg);
  164. RT_ASSERT(RT_NULL != serial);
  165. uart = rt_container_of(serial, struct hc32_uart, serial);
  166. RT_ASSERT(RT_NULL != uart->Instance);
  167. /* Configure USART initialization structure */
  168. MEM_ZERO_STRUCT(uart_init);
  169. uart_init.enSampleMode = UsartSampleBit8;
  170. uart_init.enSampleMode = UsartSampleBit8;
  171. uart_init.enDetectMode = UsartStartBitFallEdge;
  172. uart_init.enHwFlow = UsartRtsEnable;
  173. uart_init.enClkMode = UsartIntClkCkNoOutput;
  174. uart_init.enClkDiv = UsartClkDiv_1;
  175. if (BIT_ORDER_LSB == cfg->bit_order)
  176. {
  177. uart_init.enDirection = UsartDataLsbFirst;
  178. }
  179. else
  180. {
  181. uart_init.enDirection = UsartDataMsbFirst;
  182. }
  183. switch (cfg->stop_bits)
  184. {
  185. case STOP_BITS_1:
  186. uart_init.enStopBit = UsartOneStopBit;
  187. break;
  188. case STOP_BITS_2:
  189. uart_init.enStopBit = UsartTwoStopBit;
  190. break;
  191. default:
  192. uart_init.enStopBit = UsartOneStopBit;
  193. break;
  194. }
  195. switch (cfg->parity)
  196. {
  197. case PARITY_NONE:
  198. uart_init.enParity = UsartParityNone;
  199. break;
  200. case PARITY_EVEN:
  201. uart_init.enParity = UsartParityEven;
  202. break;
  203. case PARITY_ODD:
  204. uart_init.enParity = UsartParityOdd;
  205. break;
  206. default:
  207. uart_init.enParity = UsartParityNone;
  208. break;
  209. }
  210. switch (cfg->data_bits)
  211. {
  212. case DATA_BITS_8:
  213. uart_init.enDataLength = UsartDataBits8;
  214. break;
  215. default:
  216. return -RT_ERROR;
  217. }
  218. /* Enable USART clock */
  219. PWC_Fcg1PeriphClockCmd(hc32_get_usart_fcg(uart->Instance), Enable);
  220. rt_err_t rt_hw_board_uart_init(M4_USART_TypeDef * USARTx);
  221. if (RT_EOK != rt_hw_board_uart_init(uart->Instance))
  222. {
  223. return -RT_ERROR;
  224. }
  225. USART_DeInit(uart->Instance);
  226. if (Error == USART_UART_Init(uart->Instance, &uart_init))
  227. {
  228. return -RT_ERROR;
  229. }
  230. USART_SetBaudrate(uart->Instance, cfg->baud_rate);
  231. if (RT_EOK != USART_SetBaudrate(uart->Instance, cfg->baud_rate))
  232. {
  233. return -RT_ERROR;
  234. }
  235. /* Register RX error interrupt */
  236. hc32_install_irq_handler(&uart->config.rxerr_irq_config,
  237. uart_irq_handlers[hc32_get_uart_index(uart->Instance)].rxerr_irq_handler,
  238. RT_TRUE);
  239. USART_FuncCmd(uart->Instance, UsartRxInt, Enable);
  240. if ((serial->parent.flag & RT_DEVICE_FLAG_RDWR) || \
  241. (serial->parent.flag & RT_DEVICE_FLAG_RDONLY))
  242. {
  243. USART_FuncCmd(uart->Instance, UsartRx, Enable);
  244. }
  245. if ((serial->parent.flag & RT_DEVICE_FLAG_RDWR) || \
  246. (serial->parent.flag & RT_DEVICE_FLAG_WRONLY))
  247. {
  248. USART_FuncCmd(uart->Instance, UsartTx, Enable);
  249. }
  250. return RT_EOK;
  251. }
  252. static rt_err_t hc32_control(struct rt_serial_device *serial, int cmd, void *arg)
  253. {
  254. struct hc32_uart *uart;
  255. uint32_t uart_index;
  256. RT_ASSERT(RT_NULL != serial);
  257. uart = rt_container_of(serial, struct hc32_uart, serial);
  258. RT_ASSERT(RT_NULL != uart->Instance);
  259. switch (cmd)
  260. {
  261. /* Disable interrupt */
  262. case RT_DEVICE_CTRL_CLR_INT:
  263. /* Disable RX irq */
  264. NVIC_DisableIRQ(uart->config.rx_irq_config.irq);
  265. enIrqResign(uart->config.rx_irq_config.irq);
  266. break;
  267. /* Enable interrupt */
  268. case RT_DEVICE_CTRL_SET_INT:
  269. uart_index = hc32_get_uart_index(uart->Instance);
  270. /* Install RX irq handler */
  271. hc32_install_irq_handler(&uart->config.rx_irq_config,
  272. uart_irq_handlers[uart_index].rx_irq_handler,
  273. RT_TRUE);
  274. break;
  275. }
  276. return RT_EOK;
  277. }
  278. static int hc32_putc(struct rt_serial_device *serial, char c)
  279. {
  280. struct hc32_uart *uart;
  281. RT_ASSERT(RT_NULL != serial);
  282. uart = rt_container_of(serial, struct hc32_uart, serial);
  283. RT_ASSERT(RT_NULL != uart->Instance);
  284. USART_SendData(uart->Instance, c);
  285. /* Polling mode. */
  286. while (USART_GetStatus(uart->Instance, UsartTxEmpty) != Set);
  287. return 1;
  288. }
  289. static int hc32_getc(struct rt_serial_device *serial)
  290. {
  291. int ch = -1;
  292. struct hc32_uart *uart;
  293. RT_ASSERT(RT_NULL != serial);
  294. uart = rt_container_of(serial, struct hc32_uart, serial);
  295. RT_ASSERT(RT_NULL != uart->Instance);
  296. if (Set == USART_GetStatus(uart->Instance, UsartRxNoEmpty))
  297. {
  298. ch = (rt_uint8_t)USART_RecData(uart->Instance);
  299. }
  300. return ch;
  301. }
  302. static void hc32_uart_rx_irq_handler(struct hc32_uart *uart)
  303. {
  304. RT_ASSERT(RT_NULL != uart);
  305. rt_hw_serial_isr(&uart->serial, RT_SERIAL_EVENT_RX_IND);
  306. }
  307. static void hc32_uart_rxerr_irq_handler(struct hc32_uart *uart)
  308. {
  309. RT_ASSERT(RT_NULL != uart);
  310. RT_ASSERT(RT_NULL != uart->Instance);
  311. if (Set == USART_GetStatus(uart->Instance, UsartParityErr) || \
  312. Set == USART_GetStatus(uart->Instance, UsartFrameErr))
  313. {
  314. USART_RecData(uart->Instance);
  315. }
  316. USART_ClearStatus(uart->Instance, UsartParityErr);
  317. USART_ClearStatus(uart->Instance, UsartFrameErr);
  318. USART_ClearStatus(uart->Instance, UsartOverrunErr);
  319. }
  320. #if defined(BSP_USING_UART1)
  321. static void hc32_uart1_rx_irq_handler(void)
  322. {
  323. /* enter interrupt */
  324. rt_interrupt_enter();
  325. hc32_uart_rx_irq_handler(&uart_obj[UART1_INDEX]);
  326. /* leave interrupt */
  327. rt_interrupt_leave();
  328. }
  329. static void hc32_uart1_rxerr_irq_handler(void)
  330. {
  331. /* enter interrupt */
  332. rt_interrupt_enter();
  333. hc32_uart_rxerr_irq_handler(&uart_obj[UART1_INDEX]);
  334. /* leave interrupt */
  335. rt_interrupt_leave();
  336. }
  337. #endif /* BSP_USING_UART1 */
  338. #if defined(BSP_USING_UART2)
  339. static void hc32_uart2_rx_irq_handler(void)
  340. {
  341. /* enter interrupt */
  342. rt_interrupt_enter();
  343. hc32_uart_rx_irq_handler(&uart_obj[UART2_INDEX]);
  344. /* leave interrupt */
  345. rt_interrupt_leave();
  346. }
  347. static void hc32_uart2_rxerr_irq_handler(void)
  348. {
  349. /* enter interrupt */
  350. rt_interrupt_enter();
  351. hc32_uart_rxerr_irq_handler(&uart_obj[UART2_INDEX]);
  352. /* leave interrupt */
  353. rt_interrupt_leave();
  354. }
  355. #endif /* BSP_USING_UART2 */
  356. #if defined(BSP_USING_UART3)
  357. static void hc32_uart3_rx_irq_handler(void)
  358. {
  359. /* enter interrupt */
  360. rt_interrupt_enter();
  361. hc32_uart_rx_irq_handler(&uart_obj[UART3_INDEX]);
  362. /* leave interrupt */
  363. rt_interrupt_leave();
  364. }
  365. static void hc32_uart3_rxerr_irq_handler(void)
  366. {
  367. /* enter interrupt */
  368. rt_interrupt_enter();
  369. hc32_uart_rxerr_irq_handler(&uart_obj[UART3_INDEX]);
  370. /* leave interrupt */
  371. rt_interrupt_leave();
  372. }
  373. #endif /* BSP_USING_UART3 */
  374. #if defined(BSP_USING_UART4)
  375. static void hc32_uart4_rx_irq_handler(void)
  376. {
  377. /* enter interrupt */
  378. rt_interrupt_enter();
  379. hc32_uart_rx_irq_handler(&uart_obj[UART4_INDEX]);
  380. /* leave interrupt */
  381. rt_interrupt_leave();
  382. }
  383. static void hc32_uart4_rxerr_irq_handler(void)
  384. {
  385. /* enter interrupt */
  386. rt_interrupt_enter();
  387. hc32_uart_rxerr_irq_handler(&uart_obj[UART4_INDEX]);
  388. /* leave interrupt */
  389. rt_interrupt_leave();
  390. }
  391. #endif /* BSP_USING_UART4 */
  392. static const struct uart_irq_handler uart_irq_handlers[] =
  393. {
  394. #ifdef BSP_USING_UART1
  395. {hc32_uart1_rxerr_irq_handler, hc32_uart1_rx_irq_handler},
  396. #endif
  397. #ifdef BSP_USING_UART2
  398. {hc32_uart2_rxerr_irq_handler, hc32_uart2_rx_irq_handler},
  399. #endif
  400. #ifdef BSP_USING_UART3
  401. {hc32_uart3_rxerr_irq_handler, hc32_uart3_rx_irq_handler},
  402. #endif
  403. #ifdef BSP_USING_UART4
  404. {hc32_uart4_rxerr_irq_handler, hc32_uart4_rx_irq_handler},
  405. #endif
  406. };
  407. static const struct rt_uart_ops hc32_uart_ops =
  408. {
  409. .configure = hc32_configure,
  410. .control = hc32_control,
  411. .putc = hc32_putc,
  412. .getc = hc32_getc,
  413. };
  414. int hc32_hw_uart_init(void)
  415. {
  416. rt_err_t result = RT_EOK;
  417. rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct hc32_uart);
  418. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  419. for (int i = 0; i < obj_num; i++)
  420. {
  421. /* init UART object */
  422. uart_obj[i].serial.ops = &hc32_uart_ops;
  423. uart_obj[i].serial.config = config;
  424. /* register UART device */
  425. result = rt_hw_serial_register(&uart_obj[i].serial,
  426. uart_obj[i].name,
  427. (RT_DEVICE_FLAG_RDWR |
  428. RT_DEVICE_FLAG_INT_RX |
  429. RT_DEVICE_FLAG_INT_TX),
  430. &uart_obj[i]);
  431. RT_ASSERT(result == RT_EOK);
  432. }
  433. return result;
  434. }
  435. INIT_BOARD_EXPORT(hc32_hw_uart_init);
  436. #endif