drv_rtc.c 4.5 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2021-11-4 GuEe-GUI first version
  9. * 2022-07-15 GuEe-GUI add alarm ops support
  10. */
  11. #include <rthw.h>
  12. #include <rtthread.h>
  13. #include <rtdevice.h>
  14. #include <sys/time.h>
  15. #include <board.h>
  16. #include "drv_rtc.h"
  17. #ifdef BSP_USING_RTC
  18. #define RTC_DR 0x00 /* data read register */
  19. #define RTC_MR 0x04 /* match register */
  20. #define RTC_LR 0x08 /* data load register */
  21. #define RTC_CR 0x0c /* control register */
  22. #define RTC_IMSC 0x10 /* interrupt mask and set register */
  23. #define RTC_RIS 0x14 /* raw interrupt status register */
  24. #define RTC_MIS 0x18 /* masked interrupt status register */
  25. #define RTC_ICR 0x1c /* interrupt clear register */
  26. #define RTC_CR_OPEN 1
  27. #define RTC_CR_CLOSE 0
  28. #define RTC_BIT_AI (1 << 0) /* Alarm interrupt bit */
  29. #define RTC_BIT_PI (1 << 1) /* Periodic interrupt bit. ST variants only. */
  30. static rt_rtc_dev_t _rtc_device;
  31. #ifdef RT_USING_ALARM
  32. static struct rt_rtc_wkalarm _wkalarm;
  33. #endif
  34. rt_inline rt_uint32_t pl031_read32(rt_ubase_t offset)
  35. {
  36. return (*((volatile unsigned int *)(PL031_RTC_BASE + offset)));
  37. }
  38. rt_inline void pl031_write32(rt_ubase_t offset, rt_uint32_t value)
  39. {
  40. (*((volatile unsigned int *)(PL031_RTC_BASE + offset))) = value;
  41. }
  42. static rt_err_t pl031_rtc_init(void)
  43. {
  44. pl031_write32(RTC_CR, RTC_CR_OPEN);
  45. return RT_EOK;
  46. }
  47. static rt_err_t pl031_get_secs(time_t *sec)
  48. {
  49. if (sec != RT_NULL)
  50. {
  51. *(rt_uint32_t *)sec = pl031_read32(RTC_DR);
  52. return RT_EOK;
  53. }
  54. return -RT_EINVAL;
  55. }
  56. static rt_err_t pl031_set_secs(time_t *sec)
  57. {
  58. if (sec != RT_NULL)
  59. {
  60. pl031_write32(RTC_LR, *(rt_uint32_t *)sec);
  61. return RT_EOK;
  62. }
  63. return -RT_EINVAL;
  64. }
  65. #ifdef RT_USING_ALARM
  66. static rt_err_t pl031_set_alarm(struct rt_rtc_wkalarm *alarm)
  67. {
  68. if (alarm != RT_NULL)
  69. {
  70. rt_uint32_t imsc, time;
  71. _wkalarm.enable = alarm->enable;
  72. _wkalarm.tm_hour = alarm->tm_hour;
  73. _wkalarm.tm_min = alarm->tm_min;
  74. _wkalarm.tm_sec = alarm->tm_sec;
  75. time = pl031_read32(RTC_DR);
  76. /* Back to 08:00 today */
  77. time = time / (3600 * 24) * (3600 * 24);
  78. /* Get alarm time */
  79. time += alarm->tm_hour * 3600 + alarm->tm_min * 60 + alarm->tm_sec;
  80. pl031_write32(RTC_MR, time);
  81. /* Clear any pending alarm interrupts. */
  82. pl031_write32(RTC_ICR, RTC_BIT_AI);
  83. imsc = pl031_read32(RTC_IMSC);
  84. if (alarm->enable)
  85. {
  86. pl031_write32(RTC_IMSC, imsc | RTC_BIT_AI);
  87. }
  88. else
  89. {
  90. pl031_write32(RTC_IMSC, imsc & ~RTC_BIT_AI);
  91. }
  92. return RT_EOK;
  93. }
  94. return -RT_EINVAL;
  95. }
  96. static rt_err_t pl031_get_alarm(struct rt_rtc_wkalarm *alarm)
  97. {
  98. if (alarm != RT_NULL)
  99. {
  100. *alarm = _wkalarm;
  101. return RT_EOK;
  102. }
  103. return -RT_EINVAL;
  104. }
  105. #endif /* RT_USING_ALARM */
  106. static rt_err_t pl031_get_timeval(struct timeval *tv)
  107. {
  108. if (tv != RT_NULL)
  109. {
  110. tv->tv_sec = pl031_read32(RTC_DR);
  111. return RT_EOK;
  112. }
  113. return -RT_EINVAL;
  114. }
  115. static rt_err_t pl031_set_timeval(struct timeval *tv)
  116. {
  117. if (tv != RT_NULL)
  118. {
  119. pl031_write32(RTC_LR, *(rt_uint32_t *)tv->tv_sec);
  120. return RT_EOK;
  121. }
  122. return -RT_EINVAL;
  123. }
  124. static const struct rt_rtc_ops rtc_ops =
  125. {
  126. .init = pl031_rtc_init,
  127. .get_secs = pl031_get_secs,
  128. .set_secs = pl031_set_secs,
  129. #ifdef RT_USING_ALARM
  130. .get_alarm = pl031_get_alarm,
  131. .set_alarm = pl031_set_alarm,
  132. #else
  133. .get_alarm = RT_NULL,
  134. .set_alarm = RT_NULL,
  135. #endif
  136. .get_timeval = pl031_get_timeval,
  137. .set_timeval = pl031_set_timeval,
  138. };
  139. #ifdef RT_USING_ALARM
  140. static void rt_hw_rtc_isr(int irqno, void *param)
  141. {
  142. rt_uint32_t rtcmis = pl031_read32(RTC_MIS);
  143. if (rtcmis & RTC_BIT_AI)
  144. {
  145. pl031_write32(RTC_ICR, RTC_BIT_AI);
  146. rt_alarm_update(&_rtc_device.parent, 1);
  147. }
  148. }
  149. #endif /* RT_USING_ALARM */
  150. int rt_hw_rtc_init(void)
  151. {
  152. _rtc_device.ops = &rtc_ops;
  153. /* register a rtc device */
  154. rt_hw_rtc_register(&_rtc_device, "rtc", RT_DEVICE_FLAG_RDWR, RT_NULL);
  155. #ifdef RT_USING_ALARM
  156. rt_hw_interrupt_install(PL031_RTC_IRQNUM, rt_hw_rtc_isr, RT_NULL, "rtc");
  157. rt_hw_interrupt_umask(PL031_RTC_IRQNUM);
  158. #endif /* RT_USING_ALARM */
  159. return 0;
  160. }
  161. INIT_DEVICE_EXPORT(rt_hw_rtc_init);
  162. #endif /* BSP_USING_RTC */