serial.c 14 KB

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  1. /*
  2. * File : serial.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006, RT-Thread Development Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://openlab.rt-thread.com/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2009-02-05 Bernard first version
  13. */
  14. #include "serial.h"
  15. static void rt_serial_enable_dma(DMA_Channel_TypeDef* dma_channel,
  16. rt_uint32_t address, rt_uint32_t size);
  17. /**
  18. * @addtogroup STM32
  19. */
  20. /*@{*/
  21. /**
  22. * This function read a character from serial without interrupt enable mode
  23. *
  24. * @return the read char
  25. */
  26. char rt_serial_getc(struct stm32_serial_device* uart)
  27. {
  28. rt_base_t level;
  29. char ch = 0;
  30. /* disable interrupt */
  31. level = rt_hw_interrupt_disable();
  32. if (uart->int_rx->read_index != uart->int_rx->save_index)
  33. {
  34. ch = uart->int_rx->rx_buffer[uart->int_rx->read_index];
  35. uart->int_rx->read_index ++;
  36. if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
  37. uart->int_rx->read_index = 0;
  38. }
  39. /* enable interrupt */
  40. rt_hw_interrupt_enable(level);
  41. return ch;
  42. }
  43. /* save a char to serial buffer */
  44. void rt_serial_savechar(struct stm32_serial_device* uart, char ch)
  45. {
  46. rt_base_t level;
  47. /* disable interrupt */
  48. level = rt_hw_interrupt_disable();
  49. uart->int_rx->rx_buffer[uart->int_rx->save_index] = ch;
  50. uart->int_rx->save_index ++;
  51. if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
  52. uart->int_rx->save_index = 0;
  53. /* if the next position is read index, discard this 'read char' */
  54. if (uart->int_rx->save_index == uart->int_rx->read_index)
  55. {
  56. uart->int_rx->read_index ++;
  57. if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
  58. uart->int_rx->read_index = 0;
  59. }
  60. /* enable interrupt */
  61. rt_hw_interrupt_enable(level);
  62. }
  63. /**
  64. * This function will write a character to serial without interrupt enable mode
  65. *
  66. * @param c the char to write
  67. */
  68. void rt_serial_putc(rt_device_t device, const char c)
  69. {
  70. struct stm32_serial_device* uart = (struct stm32_serial_device*) device->private;
  71. /*
  72. * to be polite with serial console add a line feed
  73. * to the carriage return character
  74. */
  75. if (c=='\n' && (device->flag & RT_DEVICE_FLAG_STREAM))
  76. rt_serial_putc(device, '\r');
  77. while (!(uart->uart_device->SR & USART_FLAG_TXE));
  78. uart->uart_device->DR = (c & 0x1FF);
  79. }
  80. /* RT-Thread Device Interface */
  81. static rt_err_t rt_serial_init (rt_device_t dev)
  82. {
  83. struct stm32_serial_device* uart = (struct stm32_serial_device*) dev->private;
  84. if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
  85. {
  86. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  87. {
  88. rt_memset(uart->int_rx->rx_buffer, 0,
  89. sizeof(uart->int_rx->rx_buffer));
  90. uart->int_rx->read_index = 0;
  91. uart->int_rx->save_index = 0;
  92. }
  93. if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
  94. {
  95. RT_ASSERT(uart->dma_rx->dma_channel != RT_NULL);
  96. uart->dma_rx->read_index = uart->dma_rx->read_descriptor = 0;
  97. uart->dma_rx->is_full = RT_FALSE;
  98. }
  99. if (dev->flag & RT_DEVICE_FLAG_INT_TX)
  100. {
  101. rt_memset(uart->int_tx->tx_buffer, 0,
  102. sizeof(uart->int_tx->tx_buffer));
  103. uart->int_tx->write_index = uart->int_tx->save_index = 0;
  104. }
  105. if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
  106. {
  107. RT_ASSERT(uart->dma_rx->dma_channel != RT_NULL);
  108. uart->dma_tx->list_head = uart->dma_tx->list_tail = RT_NULL;
  109. }
  110. /* Enable USART */
  111. USART_Cmd(uart->uart_device, ENABLE);
  112. dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
  113. }
  114. return RT_EOK;
  115. }
  116. static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
  117. {
  118. struct stm32_serial_device* uart;
  119. RT_ASSERT(dev != RT_NULL);
  120. uart = (struct stm32_serial_device*)dev->private;
  121. if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
  122. {
  123. /* enable Rx DMA */
  124. rt_serial_enable_dma(uart->dma_rx->dma_channel,
  125. (rt_uint32_t)&(uart->dma_rx->rx_buffer[uart->dma_rx->save_descriptor][0]),
  126. UART_DMA_RX_BUFFER_SIZE);
  127. }
  128. return RT_EOK;
  129. }
  130. static rt_err_t rt_serial_close(rt_device_t dev)
  131. {
  132. struct stm32_serial_device* uart;
  133. RT_ASSERT(dev != RT_NULL);
  134. uart = (struct stm32_serial_device*)dev->private;
  135. if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
  136. {
  137. /* disable DMA */
  138. DMA_Cmd(uart->dma_rx->dma_channel, DISABLE);
  139. }
  140. return RT_EOK;
  141. }
  142. static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
  143. {
  144. rt_uint8_t* ptr;
  145. rt_err_t err_code;
  146. struct stm32_serial_device* uart;
  147. ptr = buffer;
  148. err_code = RT_EOK;
  149. uart = (struct stm32_serial_device*)dev->private;
  150. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  151. {
  152. rt_int32_t ch;
  153. /* interrupt mode Rx */
  154. while (size)
  155. {
  156. /* get a character */
  157. ch = rt_serial_getc(uart);
  158. if (ch < 0)
  159. {
  160. /* set error code */
  161. err_code = -RT_EEMPTY;
  162. }
  163. else
  164. {
  165. *ptr++ = ch;
  166. size --;
  167. }
  168. }
  169. }
  170. else if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
  171. {
  172. /* check queue empty */
  173. if ((uart->dma_rx->read_descriptor == uart->dma_rx->save_descriptor))
  174. {
  175. /* set error code */
  176. err_code = -RT_EEMPTY;
  177. }
  178. else
  179. {
  180. /* read data */
  181. while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
  182. {
  183. /* read buffer */
  184. *ptr ++ = uart->dma_rx->
  185. rx_buffer[uart->dma_rx->read_descriptor][uart->dma_rx->read_index];
  186. /* move to next position */
  187. uart->dma_rx->read_index ++;
  188. /* wrap read index */
  189. if (uart->dma_rx->read_index >= UART_DMA_RX_BUFFER_SIZE)
  190. {
  191. /* wrap read index */
  192. uart->dma_rx->read_index = 0;
  193. /* move to next read descriptor */
  194. uart->dma_rx->read_descriptor ++;
  195. /* wrap read descriptor */
  196. if (uart->dma_rx->read_descriptor >= UART_DMA_RX_DESCRIPTOR)
  197. uart->dma_rx->read_descriptor = 0;
  198. if (uart->dma_rx->is_full == RT_TRUE)
  199. {
  200. rt_uint32_t level;
  201. level = rt_hw_interrupt_disable();
  202. uart->dma_rx->save_descriptor ++;
  203. if (uart->dma_rx->save_descriptor >= UART_DMA_RX_DESCRIPTOR)
  204. uart->dma_rx->save_descriptor = 0;
  205. rt_hw_interrupt_enable(level);
  206. /* re-enable DMA to receive */
  207. rt_serial_enable_dma(uart->dma_rx->dma_channel,
  208. (rt_uint32_t)&(uart->dma_rx->rx_buffer[uart->dma_rx->save_descriptor][0]),
  209. UART_DMA_RX_BUFFER_SIZE);
  210. }
  211. /* check queue empty */
  212. if ((uart->dma_rx->read_descriptor == uart->dma_rx->save_descriptor))
  213. {
  214. /* set error code */
  215. err_code = -RT_EEMPTY;
  216. break;
  217. }
  218. }
  219. }
  220. }
  221. }
  222. else
  223. {
  224. /* polling mode */
  225. while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
  226. {
  227. while (uart->uart_device->SR & USART_FLAG_RXNE)
  228. {
  229. *ptr = uart->uart_device->DR & 0xff;
  230. ptr ++;
  231. }
  232. }
  233. }
  234. /* set error code */
  235. rt_set_errno(err_code);
  236. return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
  237. }
  238. static void rt_serial_enable_dma(DMA_Channel_TypeDef* dma_channel,
  239. rt_uint32_t address, rt_uint32_t size)
  240. {
  241. RT_ASSERT(dma_channel != RT_NULL);
  242. /* disable DMA */
  243. DMA_Cmd(dma_channel, DISABLE);
  244. /* set buffer address */
  245. dma_channel->CMAR = address;
  246. /* set size */
  247. dma_channel->CNDTR = size;
  248. /* enable DMA */
  249. DMA_Cmd(dma_channel, ENABLE);
  250. }
  251. static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
  252. {
  253. rt_uint8_t* ptr;
  254. rt_err_t err_code;
  255. struct stm32_serial_device* uart;
  256. err_code = RT_EOK;
  257. ptr = (rt_uint8_t*)buffer;
  258. uart = (struct stm32_serial_device*)dev->private;
  259. if (dev->flag & RT_DEVICE_FLAG_INT_TX)
  260. {
  261. /* interrupt mode Tx */
  262. while (uart->int_tx->save_index != uart->int_tx->write_index)
  263. {
  264. /* save on tx buffer */
  265. uart->int_tx->tx_buffer[uart->int_tx->save_index] = *ptr++;
  266. -- size;
  267. /* move to next position */
  268. uart->int_tx->save_index ++;
  269. /* wrap save index */
  270. if (uart->int_tx->save_index >= UART_TX_BUFFER_SIZE)
  271. uart->int_tx->save_index = 0;
  272. }
  273. /* set error code */
  274. if (size > 0)
  275. err_code = -RT_EFULL;
  276. }
  277. else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
  278. {
  279. /* DMA mode Tx */
  280. /* allocate a data node */
  281. struct stm32_serial_data_node* data_node =
  282. (struct stm32_serial_data_node*) rt_malloc (sizeof(struct stm32_serial_data_node));
  283. if (data_node == RT_NULL)
  284. {
  285. /* set error code */
  286. err_code = -RT_ENOMEM;
  287. }
  288. else
  289. {
  290. rt_uint32_t level;
  291. /* fill data node */
  292. data_node->data_ptr = ptr;
  293. data_node->data_size = size;
  294. /* insert to data link */
  295. data_node->next = RT_NULL;
  296. /* disable interrupt */
  297. level = rt_hw_interrupt_disable();
  298. data_node->prev = uart->dma_tx->list_tail;
  299. if (uart->dma_tx->list_tail != RT_NULL)
  300. uart->dma_tx->list_tail->next = data_node;
  301. uart->dma_tx->list_tail = data_node;
  302. if (uart->dma_tx->list_head == RT_NULL)
  303. {
  304. /* start DMA to transmit data */
  305. uart->dma_tx->list_head = data_node;
  306. /* Enable DMA Channel */
  307. rt_serial_enable_dma(uart->dma_tx->dma_channel,
  308. (rt_uint32_t)uart->dma_tx->list_head->data_ptr,
  309. uart->dma_tx->list_head->data_size);
  310. }
  311. /* enable interrupt */
  312. rt_hw_interrupt_enable(level);
  313. }
  314. }
  315. else
  316. {
  317. /* polling mode */
  318. while (size)
  319. {
  320. rt_serial_putc(dev, *ptr);
  321. ++ptr; --size;
  322. }
  323. }
  324. /* set error code */
  325. rt_set_errno(err_code);
  326. return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
  327. }
  328. static rt_err_t rt_serial_control (rt_device_t dev, rt_uint8_t cmd, void *args)
  329. {
  330. struct stm32_serial_device* uart;
  331. RT_ASSERT(dev != RT_NULL);
  332. uart = (struct stm32_serial_device*)dev->private;
  333. switch (cmd)
  334. {
  335. case RT_DEVICE_CTRL_SUSPEND:
  336. /* suspend device */
  337. dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
  338. USART_Cmd(uart->uart_device, DISABLE);
  339. break;
  340. case RT_DEVICE_CTRL_RESUME:
  341. /* resume device */
  342. dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
  343. USART_Cmd(uart->uart_device, ENABLE);
  344. break;
  345. }
  346. return RT_EOK;
  347. }
  348. /*
  349. * serial register for STM32
  350. * support STM32F103VB and STM32F103ZE
  351. */
  352. rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct stm32_serial_device *serial)
  353. {
  354. RT_ASSERT(device != RT_NULL);
  355. device->type = RT_Device_Class_Char;
  356. device->rx_indicate = RT_NULL;
  357. device->tx_complete = RT_NULL;
  358. device->init = rt_serial_init;
  359. device->open = rt_serial_open;
  360. device->close = rt_serial_close;
  361. device->read = rt_serial_read;
  362. device->write = rt_serial_write;
  363. device->control = rt_serial_control;
  364. device->private = serial;
  365. /* register a character device */
  366. return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
  367. }
  368. /* ISR for serial interrupt */
  369. void rt_hw_serial_isr(rt_device_t device)
  370. {
  371. struct stm32_serial_device* uart = (struct stm32_serial_device*) device->private;
  372. if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
  373. {
  374. /* interrupt mode receive */
  375. RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
  376. /* save on rx buffer */
  377. while (uart->uart_device->SR & USART_FLAG_RXNE)
  378. {
  379. rt_serial_savechar(uart, uart->uart_device->DR & 0xff);
  380. }
  381. /* clear interrupt */
  382. USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
  383. /* invoke callback */
  384. if (device->rx_indicate != RT_NULL)
  385. {
  386. rt_size_t rx_length;
  387. /* get rx length */
  388. rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
  389. UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
  390. uart->int_rx->save_index - uart->int_rx->read_index;
  391. device->rx_indicate(device, rx_length);
  392. }
  393. }
  394. if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
  395. {
  396. /* interrupt mode transmission */
  397. RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_TX);
  398. /* transmission completed */
  399. uart->int_tx->write_index ++;
  400. if (uart->int_tx->write_index >= UART_TX_BUFFER_SIZE)
  401. uart->int_tx->write_index = 0;
  402. /* clear interrupt */
  403. USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
  404. /* start next transmission */
  405. if (uart->int_tx->write_index <
  406. uart->int_tx->save_index)
  407. {
  408. uart->uart_device->DR = uart->int_tx
  409. ->tx_buffer[uart->int_tx->write_index];
  410. }
  411. }
  412. }
  413. /*
  414. * ISR for DMA mode Rx
  415. */
  416. void rt_hw_serial_dma_rx_isr(rt_device_t device)
  417. {
  418. rt_uint32_t next_descriptor;
  419. struct stm32_serial_device* uart = (struct stm32_serial_device*) device->private;
  420. /* DMA mode receive */
  421. RT_ASSERT(device->flag & RT_DEVICE_FLAG_DMA_RX);
  422. /* invoke callback */
  423. if (device->rx_indicate != RT_NULL)
  424. device->rx_indicate(device, UART_DMA_RX_BUFFER_SIZE);
  425. next_descriptor = uart->dma_rx->save_descriptor;
  426. /* move to next descriptor */
  427. next_descriptor ++;
  428. if (next_descriptor >= UART_DMA_RX_DESCRIPTOR)
  429. next_descriptor = 0;
  430. if (next_descriptor != uart->dma_rx->read_descriptor)
  431. {
  432. uart->dma_rx->save_descriptor = next_descriptor;
  433. /* enable next DMA */
  434. rt_serial_enable_dma(uart->dma_rx->dma_channel,
  435. (rt_uint32_t)&(uart->dma_rx->rx_buffer[uart->dma_rx->save_descriptor][0]),
  436. UART_DMA_RX_BUFFER_SIZE);
  437. }
  438. else
  439. {
  440. /* no descriptor yet, disable DMA */
  441. DMA_Cmd(uart->dma_rx->dma_channel, DISABLE);
  442. uart->dma_rx->is_full = RT_TRUE;
  443. }
  444. }
  445. /*
  446. * ISR for DMA mode Tx
  447. */
  448. void rt_hw_serial_dma_tx_isr(rt_device_t device)
  449. {
  450. rt_uint32_t level;
  451. struct stm32_serial_data_node* data_node;
  452. struct stm32_serial_device* uart = (struct stm32_serial_device*) device->private;
  453. /* DMA mode receive */
  454. RT_ASSERT(device->flag & RT_DEVICE_FLAG_DMA_TX);
  455. /* get the first data node */
  456. data_node = uart->dma_tx->list_head;
  457. RT_ASSERT(data_node != RT_NULL);
  458. /* invoke call to notify tx complete */
  459. if (device->tx_complete != RT_NULL)
  460. device->tx_complete(device, data_node->data_ptr);
  461. /* disable interrupt */
  462. level = rt_hw_interrupt_disable();
  463. /* remove list tail */
  464. uart->dma_tx->list_tail = data_node->prev;
  465. if (uart->dma_tx->list_tail == RT_NULL)
  466. uart->dma_tx->list_head = RT_NULL;
  467. /* enable interrupt */
  468. rt_hw_interrupt_enable(level);
  469. /* free data node memory */
  470. rt_free(data_node);
  471. if (uart->dma_tx->list_tail != RT_NULL)
  472. {
  473. /* transmit next data node */
  474. rt_serial_enable_dma(uart->dma_tx->dma_channel,
  475. (rt_uint32_t)uart->dma_tx->list_tail->data_ptr,
  476. uart->dma_tx->list_tail->data_size);
  477. }
  478. else
  479. {
  480. /* no data to be transmitted, disable DMA */
  481. DMA_Cmd(uart->dma_tx->dma_channel, DISABLE);
  482. }
  483. }
  484. /*@}*/