link.sct 4.7 KB

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  1. #!armclang --target=arm-arm-none-eabi -mcpu=cortex-m7 -E -x c
  2. /*
  3. ** ###################################################################
  4. ** Processors: MIMXRT1176AVM8A_cm7
  5. ** MIMXRT1176CVM8A_cm7
  6. ** MIMXRT1176DVMAA_cm7
  7. **
  8. ** Compiler: Keil ARM C/C++ Compiler
  9. ** Reference manual: IMXRT1170RM, Rev E, 12/2019
  10. ** Version: rev. 0.1, 2018-03-05
  11. ** Build: b200828
  12. **
  13. ** Abstract:
  14. ** Linker file for the Keil ARM C/C++ Compiler
  15. **
  16. ** Copyright 2016 Freescale Semiconductor, Inc.
  17. ** Copyright 2016-2020 NXP
  18. ** All rights reserved.
  19. **
  20. ** SPDX-License-Identifier: BSD-3-Clause
  21. **
  22. ** http: www.nxp.com
  23. ** mail: support@nxp.com
  24. **
  25. ** ###################################################################
  26. */
  27. #if (defined(__ram_vector_table__))
  28. #define __ram_vector_table_size__ 0x00000400
  29. #else
  30. #define __ram_vector_table_size__ 0x00000000
  31. #endif
  32. #define m_flash_config_start 0x30000400
  33. #define m_flash_config_size 0x00000C00
  34. #define m_ivt_start 0x30001000
  35. #define m_ivt_size 0x00001000
  36. #define m_interrupts_start 0x30002000
  37. #define m_interrupts_size 0x00000400
  38. #define m_text_start 0x30002400
  39. #define m_text_size 0x00FFDC00
  40. #define m_interrupts_ram_start 0x80000000
  41. #define m_interrupts_ram_size __ram_vector_table_size__
  42. #define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
  43. #define m_data_size (0x03000000 - m_interrupts_ram_size)
  44. #define m_ncache_start 0x83000000
  45. #define m_ncache_size 0x01000000
  46. #define m_data2_start 0x20000000
  47. #define m_data2_size 0x00040000
  48. #define m_data3_start 0x202C0000
  49. #define m_data3_size 0x00080000
  50. /* Sizes */
  51. #if (defined(__stack_size__))
  52. #define Stack_Size __stack_size__
  53. #else
  54. #define Stack_Size 0x0400
  55. #endif
  56. #if (defined(__heap_size__))
  57. #define Heap_Size __heap_size__
  58. #else
  59. #define Heap_Size 0x0400
  60. #endif
  61. #include "../../rtconfig.h"
  62. #define RTT_HEAP_SIZE (m_data_size-ImageLength(RW_m_data)-ImageLength(ARM_LIB_HEAP)-ImageLength(ARM_LIB_STACK))
  63. #if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
  64. LR_m_text m_flash_config_start m_text_start+m_text_size-m_flash_config_start { ; load region size_region
  65. RW_m_config_text m_flash_config_start FIXED m_flash_config_size { ; load address = execution address
  66. * (.boot_hdr.conf, +FIRST)
  67. }
  68. RW_m_ivt_text m_ivt_start FIXED m_ivt_size { ; load address = execution address
  69. * (.boot_hdr.ivt, +FIRST)
  70. * (.boot_hdr.boot_data)
  71. * (.boot_hdr.dcd_data)
  72. }
  73. #else
  74. LR_m_text m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region
  75. #endif
  76. VECTOR_ROM m_interrupts_start FIXED m_interrupts_size { ; load address = execution address
  77. * (.isr_vector,+FIRST)
  78. }
  79. ER_m_text m_text_start FIXED m_text_size { ; load address = execution address
  80. * (InRoot$$Sections)
  81. .ANY (+RO)
  82. }
  83. #if (defined(__ram_vector_table__))
  84. VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
  85. }
  86. #else
  87. VECTOR_RAM m_interrupts_start EMPTY 0 {
  88. }
  89. #endif
  90. RW_m_data2 m_data2_start m_data2_size {
  91. * (RamFunction)
  92. }
  93. #if (defined(__heap_noncacheable__))
  94. RW_m_data m_data_start m_data_size-Stack_Size { ; RW data
  95. #else
  96. RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
  97. #endif
  98. .ANY (+RW +ZI)
  99. *(*m_usb_dma_init_data)
  100. *(*m_usb_dma_noninit_data)
  101. }
  102. #if (!defined(__heap_noncacheable__))
  103. ARM_LIB_HEAP +0 EMPTY Heap_Size { ; Heap region growing up
  104. }
  105. #endif
  106. ; ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
  107. ; }
  108. ARM_LIB_STACK +0 EMPTY Stack_Size{} ; Stack region growing down
  109. RTT_HEAP +0 EMPTY RTT_HEAP_SIZE{}
  110. #if (defined(__heap_noncacheable__))
  111. RW_m_ncache m_ncache_start m_ncache_size - Heap_Size { ; ncache RW data
  112. #else
  113. RW_m_ncache m_ncache_start m_ncache_size { ; ncache RW data
  114. #endif
  115. * (NonCacheable.init)
  116. * (*NonCacheable)
  117. }
  118. #if (defined(__heap_noncacheable__))
  119. ARM_LIB_HEAP +0 EMPTY Heap_Size { ; Heap region growing up
  120. }
  121. RW_m_ncache_unused +0 EMPTY m_ncache_size-ImageLength(RW_m_ncache)-Heap_Size { ; Empty region added for MPU configuration
  122. #else
  123. RW_m_ncache_unused +0 EMPTY m_ncache_size-ImageLength(RW_m_ncache) { ; Empty region added for MPU configuration
  124. #endif
  125. }
  126. }