fsl_dcdc.h 18 KB

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  1. /*
  2. * Copyright (c) 2017, NXP
  3. * All rights reserved.
  4. *
  5. * Redistribution and use in source and binary forms, with or without modification,
  6. * are permitted provided that the following conditions are met:
  7. *
  8. * o Redistributions of source code must retain the above copyright notice, this list
  9. * of conditions and the following disclaimer.
  10. *
  11. * o Redistributions in binary form must reproduce the above copyright notice, this
  12. * list of conditions and the following disclaimer in the documentation and/or
  13. * other materials provided with the distribution.
  14. *
  15. * o Neither the name of copyright holder nor the names of its
  16. * contributors may be used to endorse or promote products derived from this
  17. * software without specific prior written permission.
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  20. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  21. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  22. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
  23. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  24. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  25. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  26. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  28. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29. */
  30. #ifndef __FSL_DCDC_H__
  31. #define __FSL_DCDC_H__
  32. #include "fsl_common.h"
  33. /*!
  34. * @addtogroup dcdc
  35. * @{
  36. */
  37. /*******************************************************************************
  38. * Definitions
  39. ******************************************************************************/
  40. /*! @brief DCDC driver version. */
  41. #define FSL_DCDC_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) /*!< Version 2.0.0. */
  42. /*!
  43. * @brief DCDC status flags.
  44. */
  45. enum _dcdc_status_flags_t
  46. {
  47. kDCDC_LockedOKStatus = (1U << 0U), /*!< Indicate DCDC status. 1'b1: DCDC already settled 1'b0: DCDC is settling. */
  48. };
  49. /*!
  50. * @brief The current bias of low power comparator.
  51. */
  52. typedef enum _dcdc_comparator_current_bias
  53. {
  54. kDCDC_ComparatorCurrentBias50nA = 0U, /*!< The current bias of low power comparator is 50nA. */
  55. kDCDC_ComparatorCurrentBias100nA = 1U, /*!< The current bias of low power comparator is 100nA. */
  56. kDCDC_ComparatorCurrentBias200nA = 2U, /*!< The current bias of low power comparator is 200nA. */
  57. kDCDC_ComparatorCurrentBias400nA = 3U, /*!< The current bias of low power comparator is 400nA. */
  58. } dcdc_comparator_current_bias_t;
  59. /*!
  60. * @brief The threshold of over current detection.
  61. */
  62. typedef enum _dcdc_over_current_threshold
  63. {
  64. kDCDC_OverCurrentThresholdAlt0 = 0U, /*!< 1A in the run mode, 0.25A in the power save mode. */
  65. kDCDC_OverCurrentThresholdAlt1 = 1U, /*!< 2A in the run mode, 0.25A in the power save mode. */
  66. kDCDC_OverCurrentThresholdAlt2 = 2U, /*!< 1A in the run mode, 0.2A in the power save mode. */
  67. kDCDC_OverCurrentThresholdAlt3 = 3U, /*!< 2A in the run mode, 0.2A in the power save mode. */
  68. } dcdc_over_current_threshold_t;
  69. /*!
  70. * @brief The threshold if peak current detection.
  71. */
  72. typedef enum _dcdc_peak_current_threshold
  73. {
  74. kDCDC_PeakCurrentThresholdAlt0 = 0U, /*!< 150mA peak current threshold. */
  75. kDCDC_PeakCurrentThresholdAlt1 = 1U, /*!< 250mA peak current threshold. */
  76. kDCDC_PeakCurrentThresholdAlt2 = 2U, /*!< 350mA peak current threshold. */
  77. kDCDC_PeakCurrentThresholdAlt3 = 3U, /*!< 450mA peak current threshold. */
  78. kDCDC_PeakCurrentThresholdAlt4 = 4U, /*!< 550mA peak current threshold. */
  79. kDCDC_PeakCurrentThresholdAlt5 = 5U, /*!< 650mA peak current threshold. */
  80. } dcdc_peak_current_threshold_t;
  81. /*!
  82. * @brief The period of counting the charging times in power save mode.
  83. */
  84. typedef enum _dcdc_count_charging_time_period
  85. {
  86. kDCDC_CountChargingTimePeriod8Cycle = 0U, /*!< Eight 32k cycle. */
  87. kDCDC_CountChargingTimePeriod16Cycle = 1U, /*!< Sixteen 32k cycle. */
  88. } dcdc_count_charging_time_period_t;
  89. /*!
  90. * @brief The threshold of the counting number of charging times
  91. */
  92. typedef enum _dcdc_count_charging_time_threshold
  93. {
  94. kDCDC_CountChargingTimeThreshold32 = 0U, /*!< 0x0: 32. */
  95. kDCDC_CountChargingTimeThreshold64 = 1U, /*!< 0x1: 64. */
  96. kDCDC_CountChargingTimeThreshold16 = 2U, /*!< 0x2: 16. */
  97. kDCDC_CountChargingTimeThreshold8 = 3U, /*!< 0x3: 8. */
  98. } dcdc_count_charging_time_threshold_t;
  99. /*!
  100. * @brief Oscillator clock option.
  101. */
  102. typedef enum _dcdc_clock_source
  103. {
  104. kDCDC_ClockAutoSwitch = 0U, /*!< Automatic clock switch from internal oscillator to external clock. */
  105. kDCDC_ClockInternalOsc = 1U, /*!< Use internal oscillator. */
  106. kDCDC_ClockExternalOsc = 2U, /*!< Use external 24M crystal oscillator. */
  107. } dcdc_clock_source_t;
  108. /*!
  109. * @brief Configuration for DCDC detection.
  110. */
  111. typedef struct _dcdc_detection_config
  112. {
  113. bool enableXtalokDetection; /*!< Enable xtalok detection circuit. */
  114. bool powerDownOverVoltageDetection; /*!< Power down over-voltage detection comparator. */
  115. bool powerDownLowVlotageDetection; /*!< Power down low-voltage detection comparator. */
  116. bool powerDownOverCurrentDetection; /*!< Power down over-current detection. */
  117. bool powerDownPeakCurrentDetection; /*!< Power down peak-current detection. */
  118. bool powerDownZeroCrossDetection; /*!< Power down the zero cross detection function for discontinuous conductor
  119. mode. */
  120. dcdc_over_current_threshold_t OverCurrentThreshold; /*!< The threshold of over current detection. */
  121. dcdc_peak_current_threshold_t PeakCurrentThreshold; /*!< The threshold of peak current detection. */
  122. } dcdc_detection_config_t;
  123. /*!
  124. * @brief Configuration for the loop control.
  125. */
  126. typedef struct _dcdc_loop_control_config
  127. {
  128. bool enableCommonHysteresis; /*!< Enable hysteresis in switching converter common mode analog comparators.
  129. This feature will improve transient supply ripple and efficiency. */
  130. bool enableCommonThresholdDetection; /*!< Increase the threshold detection for common mode analog comparator. */
  131. bool enableInvertHysteresisSign; /*!< Invert the sign of the hysteresis in DC-DC analog comparators. */
  132. bool enableRCThresholdDetection; /*!< Increase the threshold detection for RC scale circuit. */
  133. uint32_t enableRCScaleCircuit; /*!< Available range is 0~7. Enable analog circuit of DC-DC converter to respond
  134. faster under transient load conditions. */
  135. uint32_t complementFeedForwardStep; /*!< Available range is 0~7. Two's complement feed forward step in duty cycle in
  136. the switching DC-DC converter. Each time this field makes a transition from
  137. 0x0, the loop filter of the DC-DC converter is stepped once by a value
  138. proportional to the change. This can be used to force a certain control loop
  139. behavior, such as improving response under known heavy load transients. */
  140. uint32_t controlParameterMagnitude; /*!< Available range is 0~15. Magnitude of proportional control parameter in the
  141. switching DC-DC converter control loop. */
  142. uint32_t integralProportionalRatio; /*!< Available range is 0~3.Ratio of integral control parameter to proportional
  143. control parameter in the switching DC-DC converter, and can be used to
  144. optimize efficiency and loop response. */
  145. } dcdc_loop_control_config_t;
  146. /*!
  147. * @brief Configuration for DCDC low power.
  148. */
  149. typedef struct _dcdc_low_power_config
  150. {
  151. bool enableOverloadDetection; /*!< Enable the overload detection in power save mode, if current is larger than the
  152. overloading threshold (typical value is 50 mA), DCDC will switch to the run mode
  153. automatically. */
  154. bool enableAdjustHystereticValue; /*!< Adjust hysteretic value in low power from 12.5mV to 25mV. */
  155. dcdc_count_charging_time_period_t
  156. countChargingTimePeriod; /*!< The period of counting the charging times in power save mode. */
  157. dcdc_count_charging_time_threshold_t
  158. countChargingTimeThreshold; /*!< the threshold of the counting number of charging times during
  159. the period that lp_overload_freq_sel sets in power save mode. */
  160. } dcdc_low_power_config_t;
  161. /*!
  162. * @brief Configuration for DCDC internal regulator.
  163. */
  164. typedef struct _dcdc_internal_regulator_config
  165. {
  166. bool enableLoadResistor; /*!< control the load resistor of the internal regulator of DCDC, the load resistor is
  167. connected as default "true", and need set to "false" to disconnect the load
  168. resistor. */
  169. uint32_t feedbackPoint; /*!< Available range is 0~3. Select the feedback point of the internal regulator. */
  170. } dcdc_internal_regulator_config_t;
  171. /*!
  172. * @brief Configuration for min power setting.
  173. */
  174. typedef struct _dcdc_min_power_config
  175. {
  176. bool enableUseHalfFreqForContinuous; /*!< Set DCDC clock to half frequency for the continuous mode. */
  177. } dcdc_min_power_config_t;
  178. #if defined(__cplusplus)
  179. extern "C" {
  180. #endif
  181. /*******************************************************************************
  182. * API
  183. ******************************************************************************/
  184. /*!
  185. * @name Initialization and deinitialization
  186. * @{
  187. */
  188. /*!
  189. * @brief Enable the access to DCDC registers.
  190. *
  191. * @param base DCDC peripheral base address.
  192. */
  193. void DCDC_Init(DCDC_Type *base);
  194. /*!
  195. * @brief Disable the access to DCDC registers.
  196. *
  197. * @param base DCDC peripheral base address.
  198. */
  199. void DCDC_Deinit(DCDC_Type *base);
  200. /* @} */
  201. /*!
  202. * @name Status
  203. * @{
  204. */
  205. /*!
  206. * @brief Get DCDC status flags.
  207. *
  208. * @param base peripheral base address.
  209. * @return Mask of asserted status flags. See to "_dcdc_status_flags_t".
  210. */
  211. uint32_t DCDC_GetstatusFlags(DCDC_Type *base);
  212. /* @} */
  213. /*!
  214. * @name Misc control.
  215. * @{
  216. */
  217. /*!
  218. * @brief Enable the output range comparator.
  219. *
  220. * The output range comparator is disabled by default.
  221. *
  222. * @param base DCDC peripheral base address.
  223. * @param enable Enable the feature or not.
  224. */
  225. static inline void DCDC_EnableOutputRangeComparator(DCDC_Type *base, bool enable)
  226. {
  227. if (enable)
  228. {
  229. base->REG0 &= ~DCDC_REG0_PWD_CMP_OFFSET_MASK;
  230. }
  231. else
  232. {
  233. base->REG0 |= DCDC_REG0_PWD_CMP_OFFSET_MASK;
  234. }
  235. }
  236. /*!
  237. * @brief Configure the DCDC clock source.
  238. *
  239. * @param base DCDC peripheral base address.
  240. * @param clockSource Clock source for DCDC. See to "dcdc_clock_source_t".
  241. */
  242. void DCDC_SetClockSource(DCDC_Type *base, dcdc_clock_source_t clockSource);
  243. /*!
  244. * @brief Get the default setting for detection configuration.
  245. *
  246. * The default configuration are set according to responding registers' setting when powered on.
  247. * They are:
  248. * @code
  249. * config->enableXtalokDetection = false;
  250. * config->powerDownOverVoltageDetection = true;
  251. * config->powerDownLowVlotageDetection = false;
  252. * config->powerDownOverCurrentDetection = true;
  253. * config->powerDownPeakCurrentDetection = true;
  254. * config->powerDownZeroCrossDetection = true;
  255. * config->OverCurrentThreshold = kDCDC_OverCurrentThresholdAlt0;
  256. * config->PeakCurrentThreshold = kDCDC_PeakCurrentThresholdAlt0;
  257. * @endcode
  258. *
  259. * @param config Pointer to configuration structure. See to "dcdc_detection_config_t"
  260. */
  261. void DCDC_GetDefaultDetectionConfig(dcdc_detection_config_t *config);
  262. /*!
  263. * @breif Configure the DCDC detection.
  264. *
  265. * @param base DCDC peripheral base address.
  266. * @param config Pointer to configuration structure. See to "dcdc_detection_config_t"
  267. */
  268. void DCDC_SetDetectionConfig(DCDC_Type *base, const dcdc_detection_config_t *config);
  269. /*!
  270. * @brief Get the default setting for low power configuration.
  271. *
  272. * The default configuration are set according to responding registers' setting when powered on.
  273. * They are:
  274. * @code
  275. * config->enableOverloadDetection = true;
  276. * config->enableAdjustHystereticValue = false;
  277. * config->countChargingTimePeriod = kDCDC_CountChargingTimePeriod8Cycle;
  278. * config->countChargingTimeThreshold = kDCDC_CountChargingTimeThreshold32;
  279. * @endcode
  280. *
  281. * @param config Pointer to configuration structure. See to "dcdc_low_power_config_t"
  282. */
  283. void DCDC_GetDefaultLowPowerConfig(dcdc_low_power_config_t *config);
  284. /*!
  285. * @brief Configure the DCDC low power.
  286. *
  287. * @param base DCDC peripheral base address.
  288. * @param config Pointer to configuration structure. See to "dcdc_low_power_config_t".
  289. */
  290. void DCDC_SetLowPowerConfig(DCDC_Type *base, const dcdc_low_power_config_t *config);
  291. /*!
  292. * @brief Reset current alert signal. Alert signal is generate by peak current detection.
  293. *
  294. * @param base DCDC peripheral base address.
  295. * @param enable Switcher to reset signal. True means reset signal. False means don't reset signal.
  296. */
  297. void DCDC_ResetCurrentAlertSignal(DCDC_Type *base, bool enable);
  298. /*!
  299. * @brief Set the bangap trim value to trim bandgap voltage.
  300. *
  301. * @param base DCDC peripheral base address.
  302. * @param TrimValue The bangap trim value. Available range is 0U-31U.
  303. */
  304. static inline void DCDC_SetBandgapVoltageTrimValue(DCDC_Type *base, uint32_t trimValue)
  305. {
  306. base->REG1 &= ~DCDC_REG1_VBG_TRIM_MASK;
  307. base->REG1 |= DCDC_REG1_VBG_TRIM(trimValue);
  308. }
  309. /*!
  310. * @brief Get the default setting for loop control configuration.
  311. *
  312. * The default configuration are set according to responding registers' setting when powered on.
  313. * They are:
  314. * @code
  315. * config->enableCommonHysteresis = false;
  316. * config->enableCommonThresholdDetection = false;
  317. * config->enableInvertHysteresisSign = false;
  318. * config->enableRCThresholdDetection = false;
  319. * config->enableRCScaleCircuit = 0U;
  320. * config->complementFeedForwardStep = 0U;
  321. * config->controlParameterMagnitude = 2U;
  322. * config->integralProportionalRatio = 2U;
  323. * @endcode
  324. *
  325. * @param config Pointer to configuration structure. See to "dcdc_loop_control_config_t"
  326. */
  327. void DCDC_GetDefaultLoopControlConfig(dcdc_loop_control_config_t *config);
  328. /*!
  329. * @brief Configure the DCDC loop control.
  330. *
  331. * @param base DCDC peripheral base address.
  332. * @param config Pointer to configuration structure. See to "dcdc_loop_control_config_t".
  333. */
  334. void DCDC_SetLoopControlConfig(DCDC_Type *base, const dcdc_loop_control_config_t *config);
  335. /*!
  336. * @brief Configure for the min power.
  337. *
  338. * @param base DCDC peripheral base address.
  339. * @param config Pointer to configuration structure. See to "dcdc_min_power_config_t".
  340. */
  341. void DCDC_SetMinPowerConfig(DCDC_Type *base, const dcdc_min_power_config_t *config);
  342. /*!
  343. * @brief Set the current bias of low power comparator.
  344. *
  345. * @param base DCDC peripheral base address.
  346. * @param biasVaule The current bias of low power comparator. Refer to "dcdc_comparator_current_bias_t".
  347. */
  348. static inline void DCDC_SetLPComparatorBiasValue(DCDC_Type *base, dcdc_comparator_current_bias_t biasVaule)
  349. {
  350. base->REG1 &= ~DCDC_REG1_LP_CMP_ISRC_SEL_MASK;
  351. base->REG1 |= DCDC_REG1_LP_CMP_ISRC_SEL(biasVaule);
  352. }
  353. static inline void DCDC_LockTargetVoltage(DCDC_Type *base)
  354. {
  355. base->REG3 |= DCDC_REG3_DISABLE_STEP_MASK;
  356. }
  357. /*!
  358. * @brief Adjust the target voltage of VDD_SOC in run mode and low power mode.
  359. *
  360. * This function is to adjust the target voltage of DCDC output. Change them and finally wait until the output is
  361. * stabled.
  362. * Set the target value of run mode the same as low power mode before entering power save mode, because DCDC will switch
  363. * back to run mode if it detects the current loading is larger than about 50 mA(typical value).
  364. *
  365. * @param base DCDC peripheral base address.
  366. * @param VDDRun Target value in run mode. 25 mV each step from 0x00 to 0x1F. 00 is for 0.8V, 0x1F is for 1.575V.
  367. * @param VDDStandby Target value in low power mode. 25 mV each step from 0x00 to 0x4. 00 is for 0.9V, 0x4 is for 1.0V.
  368. */
  369. void DCDC_AdjustTargetVoltage(DCDC_Type *base, uint32_t VDDRun, uint32_t VDDStandby);
  370. /*!
  371. * @brief Configure the DCDC internal regulator.
  372. *
  373. * @param base DCDC peripheral base address.
  374. * @param config Pointer to configuration structure. See to "dcdc_internal_regulator_config_t".
  375. */
  376. void DCDC_SetInternalRegulatorConfig(DCDC_Type *base, const dcdc_internal_regulator_config_t *config);
  377. /*!
  378. * @brief Ajust delay to reduce ground noise.
  379. *
  380. * @param base DCDC peripheral base address.
  381. * @param enable Enable the feature or not.
  382. */
  383. static inline void DCDC_EnableAdjustDelay(DCDC_Type *base, bool enable)
  384. {
  385. if (enable)
  386. {
  387. base->REG3 |= DCDC_REG3_MISC_DELAY_TIMING_MASK;
  388. }
  389. else
  390. {
  391. base->REG3 &= ~DCDC_REG3_MISC_DELAY_TIMING_MASK;
  392. }
  393. }
  394. /*!
  395. * @brief Enable/Disable to improve the transition from heavy load to light load. It is valid while zero
  396. * cross detection is enabled. If ouput exceeds the threshold, DCDC would return CCM from DCM.
  397. *
  398. * @param base DCDC peripheral base address.
  399. * @param enable Enable the feature or not.
  400. */
  401. static inline void DCDC_EnableImproveTransition(DCDC_Type *base, bool enable)
  402. {
  403. if (enable)
  404. {
  405. base->REG2 |= DCDC_REG2_DCM_SET_CTRL_MASK;
  406. }
  407. else
  408. {
  409. base->REG2 &= ~DCDC_REG2_DCM_SET_CTRL_MASK;
  410. }
  411. }
  412. /* @} */
  413. /*!
  414. * @name Application guideline.
  415. * @{
  416. */
  417. /*!
  418. * @brief Boot DCDC into DCM(discontinous conduction mode).
  419. *
  420. * pwd_zcd=0x0;
  421. * pwd_cmp_offset=0x0;
  422. * dcdc_loopctrl_en_rcscale=0x3 or 0x5;
  423. * DCM_set_ctrl=1'b1;
  424. *
  425. * @param base DCDC peripheral base address.
  426. */
  427. void DCDC_BootIntoDCM(DCDC_Type *base);
  428. /*!
  429. * @brief Boot DCDC into CCM(continous conduction mode).
  430. *
  431. * pwd_zcd=0x1;
  432. * pwd_cmp_offset=0x0;
  433. * dcdc_loopctrl_en_rcscale=0x3;
  434. *
  435. * @param base DCDC peripheral base address.
  436. */
  437. void DCDC_BootIntoCCM(DCDC_Type *base);
  438. #if defined(__cplusplus)
  439. }
  440. #endif
  441. #endif /* __FSL_DCDC_H__ */