interrupt.c 2.9 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2013-07-06 Bernard first version
  9. * 2018-11-22 Jesven add smp support
  10. */
  11. #include <rthw.h>
  12. #include <rtthread.h>
  13. #include "interrupt.h"
  14. #include "gic.h"
  15. /* exception and interrupt handler table */
  16. struct rt_irq_desc isr_table[MAX_HANDLERS];
  17. #ifndef RT_USING_SMP
  18. /* Those varibles will be accessed in ISR, so we need to share them. */
  19. rt_uint32_t rt_interrupt_from_thread = 0;
  20. rt_uint32_t rt_interrupt_to_thread = 0;
  21. rt_uint32_t rt_thread_switch_interrupt_flag = 0;
  22. #endif
  23. const unsigned int VECTOR_BASE = 0x00;
  24. extern void rt_cpu_vector_set_base(unsigned int addr);
  25. extern int system_vectors;
  26. void rt_hw_vector_init(void)
  27. {
  28. rt_cpu_vector_set_base((unsigned int)&system_vectors);
  29. }
  30. /**
  31. * This function will initialize hardware interrupt
  32. */
  33. void rt_hw_interrupt_init(void)
  34. {
  35. rt_uint32_t gic_cpu_base;
  36. rt_uint32_t gic_dist_base;
  37. rt_uint32_t gic_irq_start;
  38. /* initialize vector table */
  39. rt_hw_vector_init();
  40. /* initialize exceptions table */
  41. rt_memset(isr_table, 0x00, sizeof(isr_table));
  42. /* initialize ARM GIC */
  43. gic_dist_base = platform_get_gic_dist_base();
  44. gic_cpu_base = platform_get_gic_cpu_base();
  45. gic_irq_start = GIC_IRQ_START;
  46. arm_gic_dist_init(0, gic_dist_base, gic_irq_start);
  47. arm_gic_cpu_init(0, gic_cpu_base);
  48. }
  49. /**
  50. * This function will mask a interrupt.
  51. * @param vector the interrupt number
  52. */
  53. void rt_hw_interrupt_mask(int vector)
  54. {
  55. arm_gic_mask(0, vector);
  56. }
  57. /**
  58. * This function will un-mask a interrupt.
  59. * @param vector the interrupt number
  60. */
  61. void rt_hw_interrupt_umask(int vector)
  62. {
  63. arm_gic_umask(0, vector);
  64. }
  65. /**
  66. * This function returns the active interrupt number.
  67. * @param none
  68. */
  69. int rt_hw_interrupt_get_irq(void)
  70. {
  71. return arm_gic_get_active_irq(0) & GIC_ACK_INTID_MASK;
  72. }
  73. /**
  74. * This function acknowledges the interrupt.
  75. * @param vector the interrupt number
  76. */
  77. void rt_hw_interrupt_ack(int vector)
  78. {
  79. arm_gic_ack(0, vector);
  80. }
  81. /**
  82. * This function will install a interrupt service routine to a interrupt.
  83. * @param vector the interrupt number
  84. * @param new_handler the interrupt service routine to be installed
  85. * @param old_handler the old interrupt service routine
  86. */
  87. rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
  88. void *param, const char *name)
  89. {
  90. rt_isr_handler_t old_handler = RT_NULL;
  91. if (vector < MAX_HANDLERS)
  92. {
  93. old_handler = isr_table[vector].handler;
  94. if (handler != RT_NULL)
  95. {
  96. #ifdef RT_USING_INTERRUPT_INFO
  97. rt_strncpy(isr_table[vector].name, name, RT_NAME_MAX);
  98. #endif /* RT_USING_INTERRUPT_INFO */
  99. isr_table[vector].handler = handler;
  100. isr_table[vector].param = param;
  101. }
  102. }
  103. return old_handler;
  104. }