hpl_spi_m_sync.h 5.8 KB

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  1. /**
  2. * \file
  3. *
  4. * \brief SPI related functionality declaration.
  5. *
  6. * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
  7. *
  8. * \asf_license_start
  9. *
  10. * \page License
  11. *
  12. * Subject to your compliance with these terms, you may use Microchip
  13. * software and any derivatives exclusively with Microchip products.
  14. * It is your responsibility to comply with third party license terms applicable
  15. * to your use of third party software (including open source software) that
  16. * may accompany Microchip software.
  17. *
  18. * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
  19. * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
  20. * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
  21. * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
  22. * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
  23. * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
  24. * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
  25. * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
  26. * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
  27. * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
  28. * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
  29. *
  30. * \asf_license_stop
  31. *
  32. */
  33. #ifndef _HPL_SPI_M_SYNC_H_INCLUDED
  34. #define _HPL_SPI_M_SYNC_H_INCLUDED
  35. #include <hpl_spi.h>
  36. #include <hpl_spi_sync.h>
  37. /**
  38. * \addtogroup hpl_spi HPL SPI
  39. *
  40. *@{
  41. */
  42. #ifdef __cplusplus
  43. extern "C" {
  44. #endif
  45. /** Uses common SPI sync device driver. */
  46. #define _spi_m_sync_dev _spi_sync_dev
  47. /**
  48. * \name HPL functions
  49. */
  50. //@{
  51. /**
  52. * \brief Initialize SPI for access without interrupts
  53. * It will load default hardware configuration and software struct.
  54. * \param[in, out] dev Pointer to the SPI device instance.
  55. * \param[in] hw Pointer to the hardware base.
  56. * \return Operation status.
  57. * \retval ERR_INVALID_ARG Input parameter problem.
  58. * \retval ERR_BUSY SPI hardware not ready (resetting).
  59. * \retval ERR_DENIED SPI has been enabled.
  60. * \retval 0 Operation done successfully.
  61. */
  62. int32_t _spi_m_sync_init(struct _spi_m_sync_dev *dev, void *const hw);
  63. /**
  64. * \brief Deinitialize SPI
  65. * Disable, reset the hardware and the software struct.
  66. * \param[in, out] dev Pointer to the SPI device instance.
  67. * \return Operation status.
  68. * \retval 0 Operation done successfully.
  69. */
  70. int32_t _spi_m_sync_deinit(struct _spi_m_sync_dev *dev);
  71. /**
  72. * \brief Enable SPI for access without interrupts
  73. * \param[in, out] dev Pointer to the SPI device instance.
  74. * \return Operation status.
  75. * \retval ERR_BUSY SPI hardware not ready (resetting).
  76. * \retval 0 Operation done successfully.
  77. */
  78. int32_t _spi_m_sync_enable(struct _spi_m_sync_dev *dev);
  79. /**
  80. * \brief Disable SPI for access without interrupts
  81. * Disable SPI. Deactivate all CS pins if works as master.
  82. * \param[in, out] dev Pointer to the SPI device instance.
  83. * \return Operation status.
  84. * \retval 0 Operation done successfully.
  85. */
  86. int32_t _spi_m_sync_disable(struct _spi_m_sync_dev *dev);
  87. /**
  88. * \brief Set SPI transfer mode
  89. * Set SPI transfer mode (\ref spi_transfer_mode),
  90. * which controls clock polarity and clock phase.
  91. * Mode 0: leading edge is rising edge, data sample on leading edge.
  92. * Mode 1: leading edge is rising edge, data sample on trailing edge.
  93. * Mode 2: leading edge is falling edge, data sample on leading edge.
  94. * Mode 3: leading edge is falling edge, data sample on trailing edge.
  95. * \param[in, out] dev Pointer to the SPI device instance.
  96. * \param[in] mode The SPI transfer mode.
  97. * \return Operation status.
  98. * \retval ERR_BUSY SPI is not ready to accept new setting.
  99. * \retval 0 Operation done successfully.
  100. */
  101. int32_t _spi_m_sync_set_mode(struct _spi_m_sync_dev *dev, const enum spi_transfer_mode mode);
  102. /**
  103. * \brief Set SPI baudrate
  104. * \param[in, out] dev Pointer to the SPI device instance.
  105. * \param[in] baud_val The SPI baudrate value, see \ref _spi_calc_baud_val() on
  106. * how it's generated.
  107. * \return Operation status.
  108. * \retval ERR_BUSY SPI is not ready to accept new setting.
  109. * \retval 0 Operation done successfully.
  110. */
  111. int32_t _spi_m_sync_set_baudrate(struct _spi_m_sync_dev *dev, const uint32_t baud_val);
  112. /**
  113. * \brief Set SPI char size
  114. * \param[in, out] dev Pointer to the SPI device instance.
  115. * \param[in] char_size The character size, see \ref spi_char_size.
  116. * \return Operation status.
  117. * \retval ERR_INVALID_ARG The character size is not supported.
  118. * \retval ERR_BUSY SPI is not ready to accept new setting.
  119. * \retval 0 Operation done successfully.
  120. */
  121. int32_t _spi_m_sync_set_char_size(struct _spi_m_sync_dev *dev, const enum spi_char_size char_size);
  122. /**
  123. * \brief Set SPI data order
  124. * \param[in, out] dev Pointer to the SPI device instance.
  125. * \param[in] dord SPI data order (LSB/MSB first).
  126. * \return Operation status.
  127. * \retval ERR_INVALID_ARG The character size is not supported.
  128. * \retval ERR_BUSY SPI is not ready to accept new setting.
  129. * \retval 0 Operation done successfully.
  130. */
  131. int32_t _spi_m_sync_set_data_order(struct _spi_m_sync_dev *dev, const enum spi_data_order dord);
  132. /**
  133. * \brief Transfer the whole message without interrupt
  134. * Transfer the message, it will keep waiting until the message finish or
  135. * error.
  136. * \param[in, out] dev Pointer to the SPI device instance.
  137. * \param[in] msg Pointer to the message instance to process.
  138. * \return Error or number of characters transferred.
  139. * \retval ERR_BUSY SPI hardware is not ready to start transfer (not
  140. * enabled, busy applying settings, ...).
  141. * \retval SPI_ERR_OVERFLOW Overflow error.
  142. * \retval >=0 Number of characters transferred.
  143. */
  144. int32_t _spi_m_sync_trans(struct _spi_m_sync_dev *dev, const struct spi_msg *msg);
  145. //@}
  146. #ifdef __cplusplus
  147. }
  148. #endif
  149. /**@}*/
  150. #endif /* ifndef _HPL_SPI_M_SYNC_H_INCLUDED */