drv_iic.c 19 KB

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  1. /***************************************************************************//**
  2. * @file drv_iic.c
  3. * @brief Serial API of RT-Thread RTOS for EFM32
  4. * COPYRIGHT (C) 2011, RT-Thread Development Team
  5. * @author onelife
  6. * @version 0.4 beta
  7. *******************************************************************************
  8. * @section License
  9. * The license and distribution terms for this file may be found in the file
  10. * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  11. *******************************************************************************
  12. * @section Change Logs
  13. * Date Author Notes
  14. * 2011-01-06 onelife Initial creation for EFM32
  15. * 2011-06-17 onelife Modify init function for efm32lib v2 upgrading
  16. * 2011-07-11 onelife Add lock (semaphore) to prevent simultaneously
  17. * access
  18. * 2011-08-04 onelife Change the usage of the second parameter of Read
  19. * and Write functions from (seldom used) "Offset" to "Slave address"
  20. * 2011-08-04 onelife Add a timer to prevent from forever waiting
  21. ******************************************************************************/
  22. /***************************************************************************//**
  23. * @addtogroup efm32
  24. * @{
  25. ******************************************************************************/
  26. /* Includes ------------------------------------------------------------------*/
  27. #include "board.h"
  28. #include "hdl_interrupt.h"
  29. #include "drv_iic.h"
  30. #if (defined(RT_USING_IIC0) || defined(RT_USING_IIC1))
  31. /* Private typedef -----------------------------------------------------------*/
  32. struct efm32_iic_block
  33. {
  34. struct rt_device device;
  35. struct rt_semaphore lock;
  36. struct rt_timer timer;
  37. };
  38. /* Private define ------------------------------------------------------------*/
  39. /* Private macro -------------------------------------------------------------*/
  40. #ifdef RT_IIC_DEBUG
  41. #define iic_debug(format,args...) rt_kprintf(format, ##args)
  42. #else
  43. #define iic_debug(format,args...)
  44. #endif
  45. /* Private variables ---------------------------------------------------------*/
  46. #ifdef RT_USING_IIC0
  47. #if (RT_USING_IIC0 > 3)
  48. #error "The location number range of IIC is 0~3"
  49. #endif
  50. static struct efm32_iic_block iic0;
  51. #endif
  52. #ifdef RT_USING_IIC1
  53. #if (RT_USING_IIC1 > 3)
  54. #error "The location number range of IIC is 0~3"
  55. #endif
  56. static struct efm32_iic_block iic1;
  57. #endif
  58. /* Private function prototypes -----------------------------------------------*/
  59. /* Private functions ---------------------------------------------------------*/
  60. /***************************************************************************//**
  61. * @brief
  62. * Initialize IIC device
  63. *
  64. * @details
  65. *
  66. * @note
  67. *
  68. * @param[in] dev
  69. * Pointer to device descriptor
  70. *
  71. * @return
  72. * Error code
  73. ******************************************************************************/
  74. static rt_err_t rt_iic_init (rt_device_t dev)
  75. {
  76. struct efm32_iic_device_t* iic;
  77. iic = (struct efm32_iic_device_t*)dev->user_data;
  78. if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
  79. {
  80. /* Enable IIC */
  81. I2C_Enable(iic->iic_device, true);
  82. iic->rx_buffer = RT_NULL;
  83. iic->state = 0;
  84. dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
  85. }
  86. return RT_EOK;
  87. }
  88. /***************************************************************************//**
  89. * @brief
  90. * Open IIC device
  91. *
  92. * @details
  93. *
  94. * @note
  95. *
  96. * @param[in] dev
  97. * Pointer to device descriptor
  98. *
  99. * @param[in] oflag
  100. * Device open flag
  101. *
  102. * @return
  103. * Error code
  104. ******************************************************************************/
  105. static rt_err_t rt_iic_open(rt_device_t dev, rt_uint16_t oflag)
  106. {
  107. RT_ASSERT(dev != RT_NULL);
  108. struct efm32_iic_device_t *iic;
  109. iic = (struct efm32_iic_device_t *)(dev->user_data);
  110. iic->counter++;
  111. iic_debug("IIC: Open with flag %x\n", oflag);
  112. return RT_EOK;
  113. }
  114. /***************************************************************************//**
  115. * @brief
  116. * Close IIC device
  117. *
  118. * @details
  119. *
  120. * @note
  121. *
  122. * @param[in] dev
  123. * Pointer to device descriptor
  124. *
  125. * @return
  126. * Error code
  127. ******************************************************************************/
  128. static rt_err_t rt_iic_close(rt_device_t dev)
  129. {
  130. RT_ASSERT(dev != RT_NULL);
  131. struct efm32_iic_device_t *iic;
  132. iic = (struct efm32_iic_device_t *)(dev->user_data);
  133. if (--iic->counter == 0)
  134. {
  135. rt_free(iic->rx_buffer->data_ptr);
  136. rt_free(iic->rx_buffer);
  137. iic->rx_buffer = RT_NULL;
  138. }
  139. return RT_EOK;
  140. }
  141. /***************************************************************************//**
  142. * @brief
  143. * Read from IIC device
  144. *
  145. * @details
  146. *
  147. * @note
  148. *
  149. * @param[in] dev
  150. * Pointer to device descriptor
  151. *
  152. * @param[in] pos
  153. * Slave address
  154. *
  155. * @param[in] buffer
  156. * Poniter to the buffer
  157. *
  158. * @param[in] size
  159. * Buffer size in byte
  160. *
  161. * @return
  162. * Error code
  163. ******************************************************************************/
  164. static rt_size_t rt_iic_read (
  165. rt_device_t dev,
  166. rt_off_t pos,
  167. void* buffer,
  168. rt_size_t size)
  169. {
  170. rt_err_t err_code;
  171. rt_size_t read_size;
  172. struct efm32_iic_device_t* iic;
  173. I2C_TransferSeq_TypeDef seq;
  174. I2C_TransferReturn_TypeDef ret;
  175. if (!size)
  176. {
  177. return 0;
  178. }
  179. err_code = RT_EOK;
  180. read_size = 0;
  181. iic = (struct efm32_iic_device_t*)dev->user_data;
  182. /* Lock device */
  183. if (rt_hw_interrupt_check())
  184. {
  185. ret = rt_sem_take(iic->lock, RT_WAITING_NO);
  186. }
  187. else
  188. {
  189. ret = rt_sem_take(iic->lock, RT_WAITING_FOREVER);
  190. }
  191. if (ret != RT_EOK)
  192. {
  193. return ret;
  194. }
  195. if (iic->state & IIC_STATE_MASTER)
  196. {
  197. seq.addr = (rt_uint16_t)pos << 1;
  198. seq.flags = I2C_FLAG_WRITE_READ;
  199. /* Set register to be read */
  200. seq.buf[0].data = (rt_uint8_t *)buffer;
  201. seq.buf[0].len = 1;
  202. /* Set read buffer pointer and size */
  203. seq.buf[1].data = (rt_uint8_t *)buffer;
  204. seq.buf[1].len = size;
  205. /* Do a polled transfer */
  206. iic->timeout = false;
  207. rt_timer_stop(iic->timer);
  208. rt_timer_start(iic->timer);
  209. ret = I2C_TransferInit(iic->iic_device, &seq);
  210. while ((ret == i2cTransferInProgress) && !iic->timeout)
  211. {
  212. ret = I2C_Transfer(iic->iic_device);
  213. }
  214. if (ret != i2cTransferDone)
  215. {
  216. iic_debug("IIC read error: %x\n", ret);
  217. iic_debug("IIC read address: %x\n", seq.addr);
  218. iic_debug("IIC read data0: %x -> %x\n", seq.buf[0].data, *seq.buf[0].data);
  219. iic_debug("IIC read len0: %x\n", seq.buf[0].len);
  220. iic_debug("IIC read data1: %x -> %x\n", seq.buf[1].data, *seq.buf[1].data);
  221. iic_debug("IIC read len1: %x\n", seq.buf[1].len);
  222. err_code = (rt_err_t)ret;
  223. }
  224. else
  225. {
  226. read_size = size;
  227. iic_debug("IIC read size: %d\n", read_size);
  228. }
  229. }
  230. else
  231. {
  232. rt_uint8_t* ptr;
  233. ptr = buffer;
  234. /* interrupt mode Rx */
  235. while (size)
  236. {
  237. rt_base_t level;
  238. struct efm32_iic_int_mode_t *int_rx;
  239. int_rx = iic->rx_buffer;
  240. /* disable interrupt */
  241. level = rt_hw_interrupt_disable();
  242. if (int_rx->read_index != int_rx->save_index)
  243. {
  244. /* read a character */
  245. *ptr++ = int_rx->data_ptr[int_rx->read_index];
  246. size--;
  247. /* move to next position */
  248. int_rx->read_index ++;
  249. if (int_rx->read_index >= IIC_RX_BUFFER_SIZE)
  250. {
  251. int_rx->read_index = 0;
  252. }
  253. }
  254. else
  255. {
  256. /* set error code */
  257. err_code = -RT_EEMPTY;
  258. /* enable interrupt */
  259. rt_hw_interrupt_enable(level);
  260. break;
  261. }
  262. /* enable interrupt */
  263. rt_hw_interrupt_enable(level);
  264. }
  265. read_size = (rt_uint32_t)ptr - (rt_uint32_t)buffer;
  266. iic_debug("IIC slave read size: %d\n", read_size);
  267. }
  268. /* Unlock device */
  269. rt_sem_release(iic->lock);
  270. /* set error code */
  271. rt_set_errno(err_code);
  272. return read_size;
  273. }
  274. /***************************************************************************//**
  275. * @brief
  276. * Write to IIC device
  277. *
  278. * @details
  279. *
  280. * @note
  281. *
  282. * @param[in] dev
  283. * Pointer to device descriptor
  284. *
  285. * @param[in] pos
  286. * Slave address
  287. *
  288. * @param[in] buffer
  289. * Poniter to the buffer
  290. *
  291. * @param[in] size
  292. * Buffer size in byte
  293. *
  294. * @return
  295. * Error code
  296. ******************************************************************************/
  297. static rt_size_t rt_iic_write (
  298. rt_device_t dev,
  299. rt_off_t pos,
  300. const void* buffer,
  301. rt_size_t size)
  302. {
  303. rt_err_t err_code;
  304. rt_size_t write_size;
  305. struct efm32_iic_device_t* iic;
  306. I2C_TransferSeq_TypeDef seq;
  307. I2C_TransferReturn_TypeDef ret;
  308. if (!size)
  309. {
  310. return 0;
  311. }
  312. err_code = RT_EOK;
  313. write_size = 0;
  314. iic = (struct efm32_iic_device_t*)dev->user_data;
  315. /* Lock device */
  316. if (rt_hw_interrupt_check())
  317. {
  318. ret = rt_sem_take(iic->lock, RT_WAITING_NO);
  319. }
  320. else
  321. {
  322. ret = rt_sem_take(iic->lock, RT_WAITING_FOREVER);
  323. }
  324. if (ret != RT_EOK)
  325. {
  326. return ret;
  327. }
  328. if (iic->state & IIC_STATE_MASTER)
  329. {
  330. seq.addr = (rt_uint16_t)pos << 1;
  331. seq.flags = I2C_FLAG_WRITE;
  332. /* Set write buffer pointer and size */
  333. seq.buf[0].data = (rt_uint8_t *)buffer;
  334. seq.buf[0].len = size;
  335. }
  336. else
  337. {
  338. // TODO: Slave mode TX
  339. }
  340. /* Do a polled transfer */
  341. iic->timeout = false;
  342. rt_timer_stop(iic->timer);
  343. rt_timer_start(iic->timer);
  344. ret = I2C_TransferInit(iic->iic_device, &seq);
  345. while ((ret == i2cTransferInProgress) && !iic->timeout)
  346. {
  347. ret = I2C_Transfer(iic->iic_device);
  348. }
  349. if (ret != i2cTransferDone)
  350. {
  351. err_code = (rt_err_t)ret;
  352. }
  353. else
  354. {
  355. write_size = size;
  356. }
  357. /* Unlock device */
  358. rt_sem_release(iic->lock);
  359. /* set error code */
  360. rt_set_errno(err_code);
  361. return write_size;
  362. }
  363. /***************************************************************************//**
  364. * @brief
  365. * Configure IIC device
  366. *
  367. * @details
  368. *
  369. * @note
  370. *
  371. * @param[in] dev
  372. * Pointer to device descriptor
  373. *
  374. * @param[in] cmd
  375. * IIC control command
  376. *
  377. * @param[in] args
  378. * Arguments
  379. *
  380. * @return
  381. * Error code
  382. ******************************************************************************/
  383. static rt_err_t rt_iic_control (
  384. rt_device_t dev,
  385. rt_uint8_t cmd,
  386. void *args)
  387. {
  388. RT_ASSERT(dev != RT_NULL);
  389. rt_err_t ret;
  390. struct efm32_iic_device_t *iic;
  391. iic = (struct efm32_iic_device_t*)dev->user_data;
  392. /* Lock device */
  393. if (rt_hw_interrupt_check())
  394. {
  395. ret = rt_sem_take(iic->lock, RT_WAITING_NO);
  396. }
  397. else
  398. {
  399. ret = rt_sem_take(iic->lock, RT_WAITING_FOREVER);
  400. }
  401. if (ret != RT_EOK)
  402. {
  403. return ret;
  404. }
  405. switch (cmd)
  406. {
  407. case RT_DEVICE_CTRL_SUSPEND:
  408. /* suspend device */
  409. dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
  410. I2C_Enable(iic->iic_device, false);
  411. break;
  412. case RT_DEVICE_CTRL_RESUME:
  413. /* resume device */
  414. dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
  415. I2C_Enable(iic->iic_device, true);
  416. break;
  417. case RT_DEVICE_CTRL_IIC_SETTING:
  418. {
  419. /* change device setting */
  420. struct efm32_iic_control_t *control;
  421. control = (struct efm32_iic_control_t *)args;
  422. iic->state = control->config & (IIC_STATE_MASTER | IIC_STATE_BROADCAST);
  423. iic->address = control->address << 1;
  424. if (!(iic->state & IIC_STATE_MASTER))
  425. {
  426. if (iic->rx_buffer == RT_NULL)
  427. {
  428. iic->rx_buffer = rt_malloc(sizeof(struct efm32_iic_int_mode_t));
  429. if (iic->rx_buffer == RT_NULL)
  430. {
  431. iic_debug("no memory for IIC RX structure\n");
  432. return -RT_ENOMEM;
  433. }
  434. /* Allocate RX buffer */
  435. if ((iic->rx_buffer->data_ptr = \
  436. rt_malloc(IIC_RX_BUFFER_SIZE)) == RT_NULL)
  437. {
  438. iic_debug("no memory for IIC RX buffer\n");
  439. rt_free(iic->rx_buffer);
  440. return -RT_ENOMEM;
  441. }
  442. rt_memset(iic->rx_buffer->data_ptr, 0, IIC_RX_BUFFER_SIZE);
  443. iic->rx_buffer->data_size = IIC_RX_BUFFER_SIZE;
  444. iic->rx_buffer->read_index = 0;
  445. iic->rx_buffer->save_index = 0;
  446. }
  447. /* Enable slave mode */
  448. I2C_SlaveAddressSet(iic->iic_device, iic->address);
  449. I2C_SlaveAddressMaskSet(iic->iic_device, 0xFF);
  450. iic->iic_device->CTRL |= I2C_CTRL_SLAVE | I2C_CTRL_AUTOACK | I2C_CTRL_AUTOSN;
  451. /* Enable interrupts */
  452. I2C_IntEnable(iic->iic_device, I2C_IEN_ADDR | I2C_IEN_RXDATAV | I2C_IEN_SSTOP);
  453. I2C_IntClear(iic->iic_device, _I2C_IFC_MASK);
  454. /* Enable I2Cn interrupt vector in NVIC */
  455. #ifdef RT_USING_IIC0
  456. if (dev == &iic0.device)
  457. {
  458. NVIC_ClearPendingIRQ(I2C0_IRQn);
  459. NVIC_SetPriority(I2C0_IRQn, EFM32_IRQ_PRI_DEFAULT);
  460. NVIC_EnableIRQ(I2C0_IRQn);
  461. }
  462. #endif
  463. #ifdef RT_USING_IIC1
  464. if (dev == &iic1.device)
  465. {
  466. NVIC_ClearPendingIRQ(I2C1_IRQn);
  467. NVIC_SetPriority(I2C1_IRQn, EFM32_IRQ_PRI_DEFAULT);
  468. NVIC_EnableIRQ(I2C1_IRQn);
  469. }
  470. #endif
  471. }
  472. }
  473. break;
  474. }
  475. /* Unlock device */
  476. rt_sem_release(iic->lock);
  477. return RT_EOK;
  478. }
  479. /***************************************************************************//**
  480. * @brief
  481. * IIC timeout interrupt handler
  482. *
  483. * @details
  484. *
  485. * @note
  486. *
  487. * @param[in] parameter
  488. * Parameter
  489. ******************************************************************************/
  490. static void rt_iic_timer(void *timeout)
  491. {
  492. *(rt_bool_t *)timeout = true;
  493. }
  494. /***************************************************************************//**
  495. * @brief
  496. * Register IIC device
  497. *
  498. * @details
  499. *
  500. * @note
  501. *
  502. * @param[in] device
  503. * Pointer to device descriptor
  504. *
  505. * @param[in] name
  506. * Device name
  507. *
  508. * @param[in] flag
  509. * Configuration flags
  510. *
  511. * @param[in] iic
  512. * Pointer to IIC device descriptor
  513. *
  514. * @return
  515. * Error code
  516. ******************************************************************************/
  517. rt_err_t rt_hw_iic_register(
  518. rt_device_t device,
  519. const char *name,
  520. rt_uint32_t flag,
  521. struct efm32_iic_device_t *iic)
  522. {
  523. RT_ASSERT(device != RT_NULL);
  524. if ((flag & RT_DEVICE_FLAG_DMA_TX) || (flag & RT_DEVICE_FLAG_DMA_RX) ||
  525. (flag & RT_DEVICE_FLAG_INT_TX))
  526. {
  527. RT_ASSERT(0);
  528. }
  529. device->type = RT_Device_Class_I2C;
  530. device->rx_indicate = RT_NULL;
  531. device->tx_complete = RT_NULL;
  532. device->init = rt_iic_init;
  533. device->open = rt_iic_open;
  534. device->close = rt_iic_close;
  535. device->read = rt_iic_read;
  536. device->write = rt_iic_write;
  537. device->control = rt_iic_control;
  538. device->user_data = iic;
  539. /* register a character device */
  540. return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
  541. }
  542. /***************************************************************************//**
  543. * @brief
  544. * IIC slave mode RX data valid interrupt handler
  545. *
  546. * @details
  547. *
  548. * @note
  549. *
  550. * @param[in] dev
  551. * Pointer to device descriptor
  552. ******************************************************************************/
  553. static void rt_hw_iic_slave_isr(rt_device_t dev)
  554. {
  555. struct efm32_iic_device_t *iic;
  556. struct efm32_iic_int_mode_t *int_rx;
  557. rt_uint32_t status;
  558. volatile rt_uint32_t temp;
  559. /* interrupt mode receive */
  560. RT_ASSERT(dev->flag & RT_DEVICE_FLAG_INT_RX);
  561. iic = (struct efm32_iic_device_t*)dev->user_data;
  562. int_rx = iic->rx_buffer;
  563. status = iic->iic_device->IF;
  564. if (status & I2C_IF_ADDR)
  565. {
  566. /* Address Match */
  567. /* Indicating that reception is started */
  568. temp = iic->iic_device->RXDATA & 0xFFUL;
  569. if ((temp != 0x00) || (iic->state & IIC_STATE_BROADCAST))
  570. {
  571. iic->state |= IIC_STATE_RX_BUSY;
  572. }
  573. }
  574. else if (status & I2C_IF_RXDATAV)
  575. {
  576. if (iic->state & IIC_STATE_RX_BUSY)
  577. {
  578. rt_base_t level;
  579. /* disable interrupt */
  580. level = rt_hw_interrupt_disable();
  581. /* save character */
  582. int_rx->data_ptr[int_rx->save_index] = \
  583. (rt_uint8_t)(iic->iic_device->RXDATA & 0xFFUL);
  584. int_rx->save_index ++;
  585. if (int_rx->save_index >= IIC_RX_BUFFER_SIZE)
  586. int_rx->save_index = 0;
  587. /* if the next position is read index, discard this 'read char' */
  588. if (int_rx->save_index == int_rx->read_index)
  589. {
  590. int_rx->read_index ++;
  591. if (int_rx->read_index >= IIC_RX_BUFFER_SIZE)
  592. {
  593. int_rx->read_index = 0;
  594. }
  595. }
  596. /* enable interrupt */
  597. rt_hw_interrupt_enable(level);
  598. }
  599. else
  600. {
  601. temp = iic->iic_device->RXDATA;
  602. }
  603. }
  604. if(status & I2C_IF_SSTOP)
  605. {
  606. /* Stop received, reception is ended */
  607. iic->state &= ~(rt_uint8_t)IIC_STATE_RX_BUSY;
  608. }
  609. }
  610. /***************************************************************************//**
  611. * @brief
  612. * Initialize the specified IIC unit
  613. *
  614. * @details
  615. *
  616. * @note
  617. *
  618. * @param[in] unitNumber
  619. * Unit number
  620. *
  621. * @param[in] location
  622. * Pin location number
  623. ******************************************************************************/
  624. static struct efm32_iic_device_t *rt_hw_iic_unit_init(
  625. struct efm32_iic_block *block,
  626. rt_uint8_t unitNumber,
  627. rt_uint8_t location)
  628. {
  629. struct efm32_iic_device_t *iic;
  630. CMU_Clock_TypeDef iicClock;
  631. I2C_Init_TypeDef init = I2C_INIT_DEFAULT;
  632. efm32_irq_hook_init_t hook;
  633. rt_uint8_t name[RT_NAME_MAX];
  634. do
  635. {
  636. /* Allocate device */
  637. iic = rt_malloc(sizeof(struct efm32_iic_device_t));
  638. if (iic == RT_NULL)
  639. {
  640. iic_debug("IIC: no memory for IIC%d driver\n", unitNumber);
  641. break;
  642. }
  643. iic->counter = 0;
  644. iic->timer = &block->timer;
  645. iic->timeout = false;
  646. iic->state |= IIC_STATE_MASTER;
  647. iic->address = 0x0000;
  648. iic->rx_buffer = RT_NULL;
  649. /* Initialization */
  650. if (unitNumber >= I2C_COUNT)
  651. {
  652. break;
  653. }
  654. switch (unitNumber)
  655. {
  656. case 0:
  657. iic->iic_device = I2C0;
  658. iicClock = (CMU_Clock_TypeDef)cmuClock_I2C0;
  659. break;
  660. #if (I2C_COUNT > 1)
  661. case 1:
  662. iic->iic_device = I2C1;
  663. iicClock = (CMU_Clock_TypeDef)cmuClock_I2C1;
  664. break;
  665. #endif
  666. default:
  667. break;
  668. }
  669. rt_sprintf(name, "iic%d", unitNumber);
  670. /* Enabling clock */
  671. CMU_ClockEnable(iicClock, true);
  672. /* Reset */
  673. I2C_Reset(iic->iic_device);
  674. /* Config GPIO */
  675. GPIO_PinModeSet(
  676. (GPIO_Port_TypeDef)AF_PORT(AF_I2C_SCL(unitNumber), location),
  677. AF_PIN(AF_I2C_SCL(unitNumber), location),
  678. gpioModeWiredAndPullUpFilter,
  679. 1);
  680. GPIO_PinModeSet(
  681. (GPIO_Port_TypeDef)AF_PORT(AF_I2C_SDA(unitNumber), location),
  682. AF_PIN(AF_I2C_SDA(unitNumber), location),
  683. gpioModeWiredAndPullUpFilter,
  684. 1);
  685. hook.type = efm32_irq_type_iic;
  686. hook.unit = unitNumber;
  687. hook.cbFunc = rt_hw_iic_slave_isr;
  688. hook.userPtr = (void *)&block->device;
  689. efm32_irq_hook_register(&hook);
  690. /* Enable SDZ and SCL pins and set location */
  691. iic->iic_device->ROUTE = I2C_ROUTE_SDAPEN | I2C_ROUTE_SCLPEN | \
  692. (location << _I2C_ROUTE_LOCATION_SHIFT);
  693. /* Initializing IIC */
  694. init.enable = false;
  695. I2C_Init(iic->iic_device, &init);
  696. /* Abort current TX data and clear TX buffers */
  697. iic->iic_device->CMD = I2C_CMD_ABORT | I2C_CMD_CLEARPC | I2C_CMD_CLEARTX;
  698. /* Initialize lock */
  699. iic->lock = &block->lock;
  700. if (rt_sem_init(iic->lock, name, 1, RT_IPC_FLAG_FIFO) != RT_EOK)
  701. {
  702. break;
  703. }
  704. /* Initialize timer */
  705. rt_timer_init(iic->timer, name, rt_iic_timer, &iic->timeout,
  706. IIC_TIMEOUT_PERIOD, RT_TIMER_FLAG_ONE_SHOT);
  707. return iic;
  708. } while(0);
  709. if (iic)
  710. {
  711. rt_free(iic);
  712. }
  713. iic_debug("IIC: Unit %d init failed!\n", unitNumber);
  714. return RT_NULL;
  715. }
  716. /***************************************************************************//**
  717. * @brief
  718. * Initialize all IIC module related hardware and register IIC device to kernel
  719. *
  720. * @details
  721. *
  722. * @note
  723. ******************************************************************************/
  724. void rt_hw_iic_init(void)
  725. {
  726. struct efm32_iic_device_t *iic;
  727. rt_uint32_t flag;
  728. do
  729. {
  730. flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX;
  731. #ifdef RT_USING_IIC0
  732. /* Initialize and register iic0 */
  733. if ((iic = rt_hw_iic_unit_init(&iic0, 0, RT_USING_IIC0)) != RT_NULL)
  734. {
  735. rt_hw_iic_register(&iic0.device, RT_IIC0_NAME, flag, iic);
  736. }
  737. else
  738. {
  739. break;
  740. }
  741. #endif
  742. #ifdef RT_USING_IIC1
  743. /* Initialize and register iic1 */
  744. if ((iic = rt_hw_iic_unit_init(&iic1, 1, RT_USING_IIC1)) != RT_NULL)
  745. {
  746. rt_hw_iic_register(&iic1.device, RT_IIC1_NAME, flag, iic);
  747. }
  748. else
  749. {
  750. break;
  751. }
  752. #endif
  753. iic_debug("IIC: H/W init OK!\n");
  754. return;
  755. } while (0);
  756. rt_kprintf("IIC: H/W init failed!\n");
  757. }
  758. #endif /* (defined(RT_USING_IIC0) || defined(RT_USING_IIC1)) */
  759. /***************************************************************************//**
  760. * @}
  761. ******************************************************************************/