drv_iic.c 20 KB

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  1. /***************************************************************************//**
  2. * @file drv_iic.c
  3. * @brief Serial API of RT-Thread RTOS for EFM32
  4. * COPYRIGHT (C) 2011, RT-Thread Development Team
  5. * @author onelife
  6. * @version 0.4 beta
  7. *******************************************************************************
  8. * @section License
  9. * The license and distribution terms for this file may be found in the file
  10. * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  11. *******************************************************************************
  12. * @section Change Logs
  13. * Date Author Notes
  14. * 2011-01-06 onelife Initial creation for EFM32
  15. * 2011-06-17 onelife Modify init function for EFM32 library v2.0.0
  16. * upgrading
  17. * 2011-07-11 onelife Add lock (semaphore) to prevent simultaneously
  18. * access
  19. * 2011-08-04 onelife Change the usage of the second parameter of Read
  20. * and Write functions from (seldom used) "Offset" to "Slave address"
  21. * 2011-08-04 onelife Add a timer to prevent from forever waiting
  22. * 2011-11-29 onelife Modify init function for EFM32 library v2.2.2
  23. * upgrading
  24. ******************************************************************************/
  25. /***************************************************************************//**
  26. * @addtogroup efm32
  27. * @{
  28. ******************************************************************************/
  29. /* Includes ------------------------------------------------------------------*/
  30. #include "board.h"
  31. #include "hdl_interrupt.h"
  32. #include "drv_iic.h"
  33. #if (defined(RT_USING_IIC0) || defined(RT_USING_IIC1))
  34. /* Private typedef -----------------------------------------------------------*/
  35. struct efm32_iic_block
  36. {
  37. struct rt_device device;
  38. struct rt_semaphore lock;
  39. struct rt_timer timer;
  40. };
  41. /* Private define ------------------------------------------------------------*/
  42. /* Private macro -------------------------------------------------------------*/
  43. #ifdef RT_IIC_DEBUG
  44. #define iic_debug(format,args...) rt_kprintf(format, ##args)
  45. #else
  46. #define iic_debug(format,args...)
  47. #endif
  48. /* Private variables ---------------------------------------------------------*/
  49. #ifdef RT_USING_IIC0
  50. #if (RT_USING_IIC0 > EFM32_IIC_LOCATION_COUNT)
  51. #error "Wrong location number"
  52. #endif
  53. static struct efm32_iic_block iic0;
  54. #endif
  55. #ifdef RT_USING_IIC1
  56. #if (RT_USING_IIC1 > EFM32_IIC_LOCATION_COUNT)
  57. #error "Wrong location number"
  58. #endif
  59. static struct efm32_iic_block iic1;
  60. #endif
  61. /* Private function prototypes -----------------------------------------------*/
  62. /* Private functions ---------------------------------------------------------*/
  63. /***************************************************************************//**
  64. * @brief
  65. * Initialize IIC device
  66. *
  67. * @details
  68. *
  69. * @note
  70. *
  71. * @param[in] dev
  72. * Pointer to device descriptor
  73. *
  74. * @return
  75. * Error code
  76. ******************************************************************************/
  77. static rt_err_t rt_iic_init (rt_device_t dev)
  78. {
  79. struct efm32_iic_device_t* iic;
  80. iic = (struct efm32_iic_device_t*)dev->user_data;
  81. if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
  82. {
  83. /* Enable IIC */
  84. I2C_Enable(iic->iic_device, true);
  85. iic->rx_buffer = RT_NULL;
  86. iic->state = 0;
  87. dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
  88. }
  89. return RT_EOK;
  90. }
  91. /***************************************************************************//**
  92. * @brief
  93. * Open IIC device
  94. *
  95. * @details
  96. *
  97. * @note
  98. *
  99. * @param[in] dev
  100. * Pointer to device descriptor
  101. *
  102. * @param[in] oflag
  103. * Device open flag
  104. *
  105. * @return
  106. * Error code
  107. ******************************************************************************/
  108. static rt_err_t rt_iic_open(rt_device_t dev, rt_uint16_t oflag)
  109. {
  110. RT_ASSERT(dev != RT_NULL);
  111. struct efm32_iic_device_t *iic;
  112. iic = (struct efm32_iic_device_t *)(dev->user_data);
  113. iic->counter++;
  114. iic_debug("IIC: Open with flag %x\n", oflag);
  115. return RT_EOK;
  116. }
  117. /***************************************************************************//**
  118. * @brief
  119. * Close IIC device
  120. *
  121. * @details
  122. *
  123. * @note
  124. *
  125. * @param[in] dev
  126. * Pointer to device descriptor
  127. *
  128. * @return
  129. * Error code
  130. ******************************************************************************/
  131. static rt_err_t rt_iic_close(rt_device_t dev)
  132. {
  133. RT_ASSERT(dev != RT_NULL);
  134. struct efm32_iic_device_t *iic;
  135. iic = (struct efm32_iic_device_t *)(dev->user_data);
  136. if (--iic->counter == 0)
  137. {
  138. rt_free(iic->rx_buffer->data_ptr);
  139. rt_free(iic->rx_buffer);
  140. iic->rx_buffer = RT_NULL;
  141. }
  142. return RT_EOK;
  143. }
  144. /***************************************************************************//**
  145. * @brief
  146. * Read from IIC device
  147. *
  148. * @details
  149. *
  150. * @note
  151. *
  152. * @param[in] dev
  153. * Pointer to device descriptor
  154. *
  155. * @param[in] pos
  156. * Slave address
  157. *
  158. * @param[in] buffer
  159. * Poniter to the buffer
  160. *
  161. * @param[in] size
  162. * Buffer size in byte
  163. *
  164. * @return
  165. * Error code
  166. ******************************************************************************/
  167. static rt_size_t rt_iic_read (
  168. rt_device_t dev,
  169. rt_off_t pos,
  170. void* buffer,
  171. rt_size_t size)
  172. {
  173. rt_err_t err_code;
  174. rt_size_t read_size;
  175. struct efm32_iic_device_t* iic;
  176. I2C_TransferSeq_TypeDef seq;
  177. I2C_TransferReturn_TypeDef ret;
  178. if (!size)
  179. {
  180. return 0;
  181. }
  182. err_code = RT_EOK;
  183. read_size = 0;
  184. iic = (struct efm32_iic_device_t*)dev->user_data;
  185. /* Lock device */
  186. if (rt_hw_interrupt_check())
  187. {
  188. ret = rt_sem_take(iic->lock, RT_WAITING_NO);
  189. }
  190. else
  191. {
  192. ret = rt_sem_take(iic->lock, RT_WAITING_FOREVER);
  193. }
  194. if (ret != RT_EOK)
  195. {
  196. return ret;
  197. }
  198. if (iic->state & IIC_STATE_MASTER)
  199. {
  200. seq.addr = (rt_uint16_t)pos << 1;
  201. seq.flags = I2C_FLAG_WRITE_READ;
  202. /* Set register to be read */
  203. seq.buf[0].data = (rt_uint8_t *)buffer;
  204. seq.buf[0].len = 1;
  205. /* Set read buffer pointer and size */
  206. seq.buf[1].data = (rt_uint8_t *)buffer;
  207. seq.buf[1].len = size;
  208. /* Do a polled transfer */
  209. iic->timeout = false;
  210. rt_timer_stop(iic->timer);
  211. rt_timer_start(iic->timer);
  212. ret = I2C_TransferInit(iic->iic_device, &seq);
  213. while ((ret == i2cTransferInProgress) && !iic->timeout)
  214. {
  215. ret = I2C_Transfer(iic->iic_device);
  216. }
  217. if (ret != i2cTransferDone)
  218. {
  219. iic_debug("IIC read error: %x\n", ret);
  220. iic_debug("IIC read address: %x\n", seq.addr);
  221. iic_debug("IIC read data0: %x -> %x\n", seq.buf[0].data, *seq.buf[0].data);
  222. iic_debug("IIC read len0: %x\n", seq.buf[0].len);
  223. iic_debug("IIC read data1: %x -> %x\n", seq.buf[1].data, *seq.buf[1].data);
  224. iic_debug("IIC read len1: %x\n", seq.buf[1].len);
  225. err_code = (rt_err_t)ret;
  226. }
  227. else
  228. {
  229. read_size = size;
  230. iic_debug("IIC read size: %d\n", read_size);
  231. }
  232. }
  233. else
  234. {
  235. rt_uint8_t* ptr;
  236. ptr = buffer;
  237. /* interrupt mode Rx */
  238. while (size)
  239. {
  240. rt_base_t level;
  241. struct efm32_iic_int_mode_t *int_rx;
  242. int_rx = iic->rx_buffer;
  243. /* disable interrupt */
  244. level = rt_hw_interrupt_disable();
  245. if (int_rx->read_index != int_rx->save_index)
  246. {
  247. /* read a character */
  248. *ptr++ = int_rx->data_ptr[int_rx->read_index];
  249. size--;
  250. /* move to next position */
  251. int_rx->read_index ++;
  252. if (int_rx->read_index >= IIC_RX_BUFFER_SIZE)
  253. {
  254. int_rx->read_index = 0;
  255. }
  256. }
  257. else
  258. {
  259. /* set error code */
  260. err_code = -RT_EEMPTY;
  261. /* enable interrupt */
  262. rt_hw_interrupt_enable(level);
  263. break;
  264. }
  265. /* enable interrupt */
  266. rt_hw_interrupt_enable(level);
  267. }
  268. read_size = (rt_uint32_t)ptr - (rt_uint32_t)buffer;
  269. iic_debug("IIC slave read size: %d\n", read_size);
  270. }
  271. /* Unlock device */
  272. rt_sem_release(iic->lock);
  273. /* set error code */
  274. rt_set_errno(err_code);
  275. return read_size;
  276. }
  277. /***************************************************************************//**
  278. * @brief
  279. * Write to IIC device
  280. *
  281. * @details
  282. *
  283. * @note
  284. *
  285. * @param[in] dev
  286. * Pointer to device descriptor
  287. *
  288. * @param[in] pos
  289. * Slave address
  290. *
  291. * @param[in] buffer
  292. * Poniter to the buffer
  293. *
  294. * @param[in] size
  295. * Buffer size in byte
  296. *
  297. * @return
  298. * Error code
  299. ******************************************************************************/
  300. static rt_size_t rt_iic_write (
  301. rt_device_t dev,
  302. rt_off_t pos,
  303. const void* buffer,
  304. rt_size_t size)
  305. {
  306. rt_err_t err_code;
  307. rt_size_t write_size;
  308. struct efm32_iic_device_t* iic;
  309. I2C_TransferSeq_TypeDef seq;
  310. I2C_TransferReturn_TypeDef ret;
  311. if (!size)
  312. {
  313. return 0;
  314. }
  315. err_code = RT_EOK;
  316. write_size = 0;
  317. iic = (struct efm32_iic_device_t*)dev->user_data;
  318. /* Lock device */
  319. if (rt_hw_interrupt_check())
  320. {
  321. ret = rt_sem_take(iic->lock, RT_WAITING_NO);
  322. }
  323. else
  324. {
  325. ret = rt_sem_take(iic->lock, RT_WAITING_FOREVER);
  326. }
  327. if (ret != RT_EOK)
  328. {
  329. return ret;
  330. }
  331. if (iic->state & IIC_STATE_MASTER)
  332. {
  333. seq.addr = (rt_uint16_t)pos << 1;
  334. seq.flags = I2C_FLAG_WRITE;
  335. /* Set write buffer pointer and size */
  336. seq.buf[0].data = (rt_uint8_t *)buffer;
  337. seq.buf[0].len = size;
  338. }
  339. else
  340. {
  341. // TODO: Slave mode TX
  342. }
  343. /* Do a polled transfer */
  344. iic->timeout = false;
  345. rt_timer_stop(iic->timer);
  346. rt_timer_start(iic->timer);
  347. ret = I2C_TransferInit(iic->iic_device, &seq);
  348. while ((ret == i2cTransferInProgress) && !iic->timeout)
  349. {
  350. ret = I2C_Transfer(iic->iic_device);
  351. }
  352. if (ret != i2cTransferDone)
  353. {
  354. err_code = (rt_err_t)ret;
  355. }
  356. else
  357. {
  358. write_size = size;
  359. }
  360. /* Unlock device */
  361. rt_sem_release(iic->lock);
  362. /* set error code */
  363. rt_set_errno(err_code);
  364. return write_size;
  365. }
  366. /***************************************************************************//**
  367. * @brief
  368. * Configure IIC device
  369. *
  370. * @details
  371. *
  372. * @note
  373. *
  374. * @param[in] dev
  375. * Pointer to device descriptor
  376. *
  377. * @param[in] cmd
  378. * IIC control command
  379. *
  380. * @param[in] args
  381. * Arguments
  382. *
  383. * @return
  384. * Error code
  385. ******************************************************************************/
  386. static rt_err_t rt_iic_control (
  387. rt_device_t dev,
  388. rt_uint8_t cmd,
  389. void *args)
  390. {
  391. RT_ASSERT(dev != RT_NULL);
  392. rt_err_t ret;
  393. struct efm32_iic_device_t *iic;
  394. iic = (struct efm32_iic_device_t*)dev->user_data;
  395. /* Lock device */
  396. if (rt_hw_interrupt_check())
  397. {
  398. ret = rt_sem_take(iic->lock, RT_WAITING_NO);
  399. }
  400. else
  401. {
  402. ret = rt_sem_take(iic->lock, RT_WAITING_FOREVER);
  403. }
  404. if (ret != RT_EOK)
  405. {
  406. return ret;
  407. }
  408. switch (cmd)
  409. {
  410. case RT_DEVICE_CTRL_SUSPEND:
  411. /* suspend device */
  412. dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
  413. I2C_Enable(iic->iic_device, false);
  414. break;
  415. case RT_DEVICE_CTRL_RESUME:
  416. /* resume device */
  417. dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
  418. I2C_Enable(iic->iic_device, true);
  419. break;
  420. case RT_DEVICE_CTRL_IIC_SETTING:
  421. {
  422. /* change device setting */
  423. struct efm32_iic_control_t *control;
  424. control = (struct efm32_iic_control_t *)args;
  425. iic->state = control->config & (IIC_STATE_MASTER | IIC_STATE_BROADCAST);
  426. iic->address = control->address << 1;
  427. if (!(iic->state & IIC_STATE_MASTER))
  428. {
  429. if (iic->rx_buffer == RT_NULL)
  430. {
  431. iic->rx_buffer = rt_malloc(sizeof(struct efm32_iic_int_mode_t));
  432. if (iic->rx_buffer == RT_NULL)
  433. {
  434. iic_debug("no memory for IIC RX structure\n");
  435. return -RT_ENOMEM;
  436. }
  437. /* Allocate RX buffer */
  438. if ((iic->rx_buffer->data_ptr = \
  439. rt_malloc(IIC_RX_BUFFER_SIZE)) == RT_NULL)
  440. {
  441. iic_debug("no memory for IIC RX buffer\n");
  442. rt_free(iic->rx_buffer);
  443. return -RT_ENOMEM;
  444. }
  445. rt_memset(iic->rx_buffer->data_ptr, 0, IIC_RX_BUFFER_SIZE);
  446. iic->rx_buffer->data_size = IIC_RX_BUFFER_SIZE;
  447. iic->rx_buffer->read_index = 0;
  448. iic->rx_buffer->save_index = 0;
  449. }
  450. /* Enable slave mode */
  451. I2C_SlaveAddressSet(iic->iic_device, iic->address);
  452. I2C_SlaveAddressMaskSet(iic->iic_device, 0xFF);
  453. iic->iic_device->CTRL |= I2C_CTRL_SLAVE | I2C_CTRL_AUTOACK | I2C_CTRL_AUTOSN;
  454. /* Enable interrupts */
  455. I2C_IntEnable(iic->iic_device, I2C_IEN_ADDR | I2C_IEN_RXDATAV | I2C_IEN_SSTOP);
  456. I2C_IntClear(iic->iic_device, _I2C_IFC_MASK);
  457. /* Enable I2Cn interrupt vector in NVIC */
  458. #ifdef RT_USING_IIC0
  459. if (dev == &iic0.device)
  460. {
  461. NVIC_ClearPendingIRQ(I2C0_IRQn);
  462. NVIC_SetPriority(I2C0_IRQn, EFM32_IRQ_PRI_DEFAULT);
  463. NVIC_EnableIRQ(I2C0_IRQn);
  464. }
  465. #endif
  466. #ifdef RT_USING_IIC1
  467. if (dev == &iic1.device)
  468. {
  469. NVIC_ClearPendingIRQ(I2C1_IRQn);
  470. NVIC_SetPriority(I2C1_IRQn, EFM32_IRQ_PRI_DEFAULT);
  471. NVIC_EnableIRQ(I2C1_IRQn);
  472. }
  473. #endif
  474. }
  475. }
  476. break;
  477. }
  478. /* Unlock device */
  479. rt_sem_release(iic->lock);
  480. return RT_EOK;
  481. }
  482. /***************************************************************************//**
  483. * @brief
  484. * IIC timeout interrupt handler
  485. *
  486. * @details
  487. *
  488. * @note
  489. *
  490. * @param[in] parameter
  491. * Parameter
  492. ******************************************************************************/
  493. static void rt_iic_timer(void *timeout)
  494. {
  495. *(rt_bool_t *)timeout = true;
  496. }
  497. /***************************************************************************//**
  498. * @brief
  499. * Register IIC device
  500. *
  501. * @details
  502. *
  503. * @note
  504. *
  505. * @param[in] device
  506. * Pointer to device descriptor
  507. *
  508. * @param[in] name
  509. * Device name
  510. *
  511. * @param[in] flag
  512. * Configuration flags
  513. *
  514. * @param[in] iic
  515. * Pointer to IIC device descriptor
  516. *
  517. * @return
  518. * Error code
  519. ******************************************************************************/
  520. rt_err_t rt_hw_iic_register(
  521. rt_device_t device,
  522. const char *name,
  523. rt_uint32_t flag,
  524. struct efm32_iic_device_t *iic)
  525. {
  526. RT_ASSERT(device != RT_NULL);
  527. if ((flag & RT_DEVICE_FLAG_DMA_TX) || (flag & RT_DEVICE_FLAG_DMA_RX) ||
  528. (flag & RT_DEVICE_FLAG_INT_TX))
  529. {
  530. RT_ASSERT(0);
  531. }
  532. device->type = RT_Device_Class_I2C;
  533. device->rx_indicate = RT_NULL;
  534. device->tx_complete = RT_NULL;
  535. device->init = rt_iic_init;
  536. device->open = rt_iic_open;
  537. device->close = rt_iic_close;
  538. device->read = rt_iic_read;
  539. device->write = rt_iic_write;
  540. device->control = rt_iic_control;
  541. device->user_data = iic;
  542. /* register a character device */
  543. return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
  544. }
  545. /***************************************************************************//**
  546. * @brief
  547. * IIC slave mode RX data valid interrupt handler
  548. *
  549. * @details
  550. *
  551. * @note
  552. *
  553. * @param[in] dev
  554. * Pointer to device descriptor
  555. ******************************************************************************/
  556. static void rt_hw_iic_slave_isr(rt_device_t dev)
  557. {
  558. struct efm32_iic_device_t *iic;
  559. struct efm32_iic_int_mode_t *int_rx;
  560. rt_uint32_t status;
  561. volatile rt_uint32_t temp;
  562. /* interrupt mode receive */
  563. RT_ASSERT(dev->flag & RT_DEVICE_FLAG_INT_RX);
  564. iic = (struct efm32_iic_device_t*)dev->user_data;
  565. int_rx = iic->rx_buffer;
  566. status = iic->iic_device->IF;
  567. if (status & I2C_IF_ADDR)
  568. {
  569. /* Address Match */
  570. /* Indicating that reception is started */
  571. temp = iic->iic_device->RXDATA & 0xFFUL;
  572. if ((temp != 0x00) || (iic->state & IIC_STATE_BROADCAST))
  573. {
  574. iic->state |= IIC_STATE_RX_BUSY;
  575. }
  576. }
  577. else if (status & I2C_IF_RXDATAV)
  578. {
  579. if (iic->state & IIC_STATE_RX_BUSY)
  580. {
  581. rt_base_t level;
  582. /* disable interrupt */
  583. level = rt_hw_interrupt_disable();
  584. /* save character */
  585. int_rx->data_ptr[int_rx->save_index] = \
  586. (rt_uint8_t)(iic->iic_device->RXDATA & 0xFFUL);
  587. int_rx->save_index ++;
  588. if (int_rx->save_index >= IIC_RX_BUFFER_SIZE)
  589. int_rx->save_index = 0;
  590. /* if the next position is read index, discard this 'read char' */
  591. if (int_rx->save_index == int_rx->read_index)
  592. {
  593. int_rx->read_index ++;
  594. if (int_rx->read_index >= IIC_RX_BUFFER_SIZE)
  595. {
  596. int_rx->read_index = 0;
  597. }
  598. }
  599. /* enable interrupt */
  600. rt_hw_interrupt_enable(level);
  601. }
  602. else
  603. {
  604. temp = iic->iic_device->RXDATA;
  605. }
  606. }
  607. if(status & I2C_IF_SSTOP)
  608. {
  609. /* Stop received, reception is ended */
  610. iic->state &= ~(rt_uint8_t)IIC_STATE_RX_BUSY;
  611. }
  612. }
  613. /***************************************************************************//**
  614. * @brief
  615. * Initialize the specified IIC unit
  616. *
  617. * @details
  618. *
  619. * @note
  620. *
  621. * @param[in] unitNumber
  622. * Unit number
  623. *
  624. * @param[in] location
  625. * Pin location number
  626. ******************************************************************************/
  627. static struct efm32_iic_device_t *rt_hw_iic_unit_init(
  628. struct efm32_iic_block *block,
  629. rt_uint8_t unitNumber,
  630. rt_uint8_t location)
  631. {
  632. struct efm32_iic_device_t *iic;
  633. CMU_Clock_TypeDef iicClock;
  634. GPIO_Port_TypeDef port_scl, port_sda;
  635. rt_uint32_t pin_scl, pin_sda;
  636. I2C_Init_TypeDef init = I2C_INIT_DEFAULT;
  637. efm32_irq_hook_init_t hook;
  638. rt_uint8_t name[RT_NAME_MAX];
  639. do
  640. {
  641. /* Allocate device */
  642. iic = rt_malloc(sizeof(struct efm32_iic_device_t));
  643. if (iic == RT_NULL)
  644. {
  645. iic_debug("IIC: no memory for IIC%d driver\n", unitNumber);
  646. break;
  647. }
  648. iic->counter = 0;
  649. iic->timer = &block->timer;
  650. iic->timeout = false;
  651. iic->state |= IIC_STATE_MASTER;
  652. iic->address = 0x0000;
  653. iic->rx_buffer = RT_NULL;
  654. /* Initialization */
  655. if (unitNumber >= I2C_COUNT)
  656. {
  657. break;
  658. }
  659. switch (unitNumber)
  660. {
  661. case 0:
  662. iic->iic_device = I2C0;
  663. iicClock = (CMU_Clock_TypeDef)cmuClock_I2C0;
  664. port_scl = AF_I2C0_SCL_PORT(location);
  665. pin_scl = AF_I2C0_SCL_PIN(location);
  666. port_sda = AF_I2C0_SDA_PORT(location);
  667. pin_sda = AF_I2C0_SDA_PIN(location);
  668. break;
  669. #if (I2C_COUNT > 1)
  670. case 1:
  671. iic->iic_device = I2C1;
  672. iicClock = (CMU_Clock_TypeDef)cmuClock_I2C1;
  673. port_scl = AF_I2C1_SCL_PORT(location);
  674. pin_scl = AF_I2C1_SCL_PIN(location);
  675. port_sda = AF_I2C1_SDA_PORT(location);
  676. pin_sda = AF_I2C1_SDA_PIN(location);
  677. break;
  678. #endif
  679. default:
  680. break;
  681. }
  682. rt_sprintf(name, "iic%d", unitNumber);
  683. /* Enabling clock */
  684. CMU_ClockEnable(iicClock, true);
  685. /* Reset */
  686. I2C_Reset(iic->iic_device);
  687. /* Config GPIO */
  688. GPIO_PinModeSet(
  689. port_scl,
  690. pin_scl,
  691. gpioModeWiredAndPullUpFilter,
  692. 1);
  693. GPIO_PinModeSet(
  694. port_sda,
  695. pin_sda,
  696. gpioModeWiredAndPullUpFilter,
  697. 1);
  698. hook.type = efm32_irq_type_iic;
  699. hook.unit = unitNumber;
  700. hook.cbFunc = rt_hw_iic_slave_isr;
  701. hook.userPtr = (void *)&block->device;
  702. efm32_irq_hook_register(&hook);
  703. /* Enable SDZ and SCL pins and set location */
  704. iic->iic_device->ROUTE = I2C_ROUTE_SDAPEN | I2C_ROUTE_SCLPEN | \
  705. (location << _I2C_ROUTE_LOCATION_SHIFT);
  706. /* Initializing IIC */
  707. init.enable = false;
  708. I2C_Init(iic->iic_device, &init);
  709. /* Abort current TX data and clear TX buffers */
  710. iic->iic_device->CMD = I2C_CMD_ABORT | I2C_CMD_CLEARPC | I2C_CMD_CLEARTX;
  711. /* Initialize lock */
  712. iic->lock = &block->lock;
  713. if (rt_sem_init(iic->lock, name, 1, RT_IPC_FLAG_FIFO) != RT_EOK)
  714. {
  715. break;
  716. }
  717. /* Initialize timer */
  718. rt_timer_init(iic->timer, name, rt_iic_timer, &iic->timeout,
  719. IIC_TIMEOUT_PERIOD, RT_TIMER_FLAG_ONE_SHOT);
  720. return iic;
  721. } while(0);
  722. if (iic)
  723. {
  724. rt_free(iic);
  725. }
  726. iic_debug("IIC: Unit %d init failed!\n", unitNumber);
  727. return RT_NULL;
  728. }
  729. /***************************************************************************//**
  730. * @brief
  731. * Initialize all IIC module related hardware and register IIC device to kernel
  732. *
  733. * @details
  734. *
  735. * @note
  736. ******************************************************************************/
  737. void rt_hw_iic_init(void)
  738. {
  739. struct efm32_iic_device_t *iic;
  740. rt_uint32_t flag;
  741. do
  742. {
  743. flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX;
  744. #ifdef RT_USING_IIC0
  745. /* Initialize and register iic0 */
  746. if ((iic = rt_hw_iic_unit_init(&iic0, 0, RT_USING_IIC0)) != RT_NULL)
  747. {
  748. rt_hw_iic_register(&iic0.device, RT_IIC0_NAME, flag, iic);
  749. }
  750. else
  751. {
  752. break;
  753. }
  754. #endif
  755. #ifdef RT_USING_IIC1
  756. /* Initialize and register iic1 */
  757. if ((iic = rt_hw_iic_unit_init(&iic1, 1, RT_USING_IIC1)) != RT_NULL)
  758. {
  759. rt_hw_iic_register(&iic1.device, RT_IIC1_NAME, flag, iic);
  760. }
  761. else
  762. {
  763. break;
  764. }
  765. #endif
  766. iic_debug("IIC: H/W init OK!\n");
  767. return;
  768. } while (0);
  769. rt_kprintf("IIC: H/W init failed!\n");
  770. }
  771. #endif /* (defined(RT_USING_IIC0) || defined(RT_USING_IIC1)) */
  772. /***************************************************************************//**
  773. * @}
  774. ******************************************************************************/