apm32f4xx_i2c.h 12 KB

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  1. /*!
  2. * @file apm32f4xx_i2c.h
  3. *
  4. * @brief This file contains all the functions prototypes for the I2C firmware library
  5. *
  6. * @version V1.0.2
  7. *
  8. * @date 2022-06-23
  9. *
  10. * @attention
  11. *
  12. * Copyright (C) 2021-2022 Geehy Semiconductor
  13. *
  14. * You may not use this file except in compliance with the
  15. * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
  16. *
  17. * The program is only for reference, which is distributed in the hope
  18. * that it will be usefull and instructional for customers to develop
  19. * their software. Unless required by applicable law or agreed to in
  20. * writing, the program is distributed on an "AS IS" BASIS, WITHOUT
  21. * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
  22. * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
  23. * and limitations under the License.
  24. */
  25. /* Define to prevent recursive inclusion */
  26. #ifndef __APM32F4XX_I2C_H
  27. #define __APM32F4XX_I2C_H
  28. #ifdef __cplusplus
  29. extern "C" {
  30. #endif
  31. /* Includes */
  32. #include "apm32f4xx.h"
  33. /** @addtogroup APM32F4xx_StdPeriphDriver
  34. @{
  35. */
  36. /** @addtogroup I2C_Driver
  37. @{
  38. */
  39. /** @defgroup I2C_Enumerations
  40. @{
  41. */
  42. /**
  43. * @brief I2C Mode
  44. */
  45. typedef enum
  46. {
  47. I2C_MODE_I2C = 0x0000, /*!< I2C mode */
  48. I2C_MODE_SMBUUSDEVICE = 0x0002, /*!< SMBus device mode */
  49. I2C_MODE_SMBUSHOST = 0x000A /*!< SMBus host mode */
  50. } I2C_MODE_T;
  51. /**
  52. * @brief I2C duty cycle in fast mode
  53. */
  54. typedef enum
  55. {
  56. I2C_DUTYCYCLE_16_9 = 0x4000, /*!< I2C fast mode Tlow/Thigh = 16/9 */
  57. I2C_DUTYCYCLE_2 = 0xBFFF /*!< I2C fast mode Tlow/Thigh = 2 */
  58. } I2C_DUTYCYCLE_T;
  59. /**
  60. * @brief I2C acknowledgement
  61. */
  62. typedef enum
  63. {
  64. I2C_ACK_DISABLE, /*!< Send acknowledge */
  65. I2C_ACK_ENABLE /*!< Do not send acknowledge */
  66. } I2C_ACK_T;
  67. /**
  68. * @brief I2C transfer direction
  69. */
  70. typedef enum
  71. {
  72. I2C_DIRECTION_TX, /*!< Transmitter mode */
  73. I2C_DIRECTION_RX /*!< Receiver mode */
  74. } I2C_DIRECTION_T;
  75. /**
  76. * @brief I2C acknowledged address
  77. */
  78. typedef enum
  79. {
  80. I2C_ACK_ADDRESS_7BIT = 0x4000, /*!< Set slave address length to 7-bit */
  81. I2C_ACK_ADDRESS_10BIT = 0xC000 /*!< Set slave address length to 10-bit */
  82. } I2C_ACK_ADDRESS_T;
  83. /**
  84. * @brief I2C Register
  85. */
  86. typedef enum
  87. {
  88. I2C_REGISTER_CTRL1, /*!< CTRL1 register */
  89. I2C_REGISTER_CTRL2, /*!< CTRL2 register */
  90. I2C_REGISTER_SADDR1, /*!< SADDR1 register */
  91. I2C_REGISTER_SADDR2, /*!< SADDR2 register */
  92. I2C_REGISTER_DATA, /*!< DATA register */
  93. I2C_REGISTER_STS1, /*!< STS1 register */
  94. I2C_REGISTER_STS2, /*!< STS2 register */
  95. I2C_REGISTER_CLKCTRL, /*!< CLKCTRL register */
  96. I2C_REGISTER_RISETMAX, /*!< RISETMAX register */
  97. } I2C_REGISTER_T;
  98. /**
  99. * @brief I2C NCAK position
  100. */
  101. typedef enum
  102. {
  103. I2C_NACK_POSITION_NEXT, /*!< Set NACK signal to next receive byte */
  104. I2C_NACK_POSITION_CURRENT /*!< Set NACK signal to current receive byte */
  105. } I2C_NACK_POSITION_T;
  106. /**
  107. * @brief I2C SMBus alert pin level
  108. */
  109. typedef enum
  110. {
  111. I2C_SMBUSALER_LOW, /*!< SMBus Alert pin low */
  112. I2C_SMBUSALER_HIGH /*!< SMBus Alert pin high */
  113. } I2C_SMBUSALER_T;
  114. /**
  115. * @brief I2C PEC position
  116. */
  117. typedef enum
  118. {
  119. I2C_PEC_POSITION_NEXT, /*!< Indicates that the next byte is PEC */
  120. I2C_PEC_POSITION_CURRENT /*!< Indicates that current byte is PEC */
  121. } I2C_PEC_POSITION_T;
  122. /**
  123. * @brief I2C interrupts definition
  124. */
  125. typedef enum
  126. {
  127. I2C_INT_BUF = 0x0400, /*!< Buffer interrupt */
  128. I2C_INT_EVT = 0x0200, /*!< Event interrupt */
  129. I2C_INT_ERR = 0x0100 /*!< Error interrupt */
  130. } I2C_INT_T;
  131. /**
  132. * @brief I2C interrupt
  133. */
  134. typedef enum
  135. {
  136. I2C_INT_FLAG_SMBALT = 0x01008000, /*!< SMBus Alert flag */
  137. I2C_INT_FLAG_TTE = 0x01004000, /*!< Timeout or Tlow error flag */
  138. I2C_INT_FLAG_PECE = 0x01001000, /*!< PEC error in reception flag */
  139. I2C_INT_FLAG_OVRUR = 0x01000800, /*!< Overrun/Underrun flag (Slave mode) */
  140. I2C_INT_FLAG_AE = 0x01000400, /*!< Acknowledge error flag */
  141. I2C_INT_FLAG_AL = 0x01000200, /*!< Arbitration lost flag (Master mode) */
  142. I2C_INT_FLAG_BERR = 0x01000100, /*!< Bus error flag */
  143. I2C_INT_FLAG_TXBE = 0x06000080, /*!< Transmitter data register empty flag */
  144. I2C_INT_FLAG_RXBNE = 0x06000040, /*!< Receiver data register not empty flag */
  145. I2C_INT_FLAG_STOP = 0x02000010, /*!< Stop detection flag (Slave mode) */
  146. I2C_INT_FLAG_ADDR10 = 0x02000008, /*!< 10-bit header sent flag (Master mode) */
  147. I2C_INT_FLAG_BTC = 0x02000004, /*!< Byte transfer complete flag */
  148. I2C_INT_FLAG_ADDR = 0x02000002, /*!< Address sent flag (Master mode) */
  149. I2C_INT_FLAG_START = 0x02000001, /*!< Start bit flag (Master mode) */
  150. } I2C_INT_FLAG_T;
  151. /**
  152. * @brief I2C flags
  153. */
  154. typedef enum
  155. {
  156. /* STS2 register flags */
  157. I2C_FLAG_DUALADDR, /*!< Dual flag (Slave mode) */
  158. I2C_FLAG_SMMHADDR, /*!< SMBus host header (Slave mode) */
  159. I2C_FLAG_SMBDADDR, /*!< SMBus default header (Slave mode) */
  160. I2C_FLAG_GENCALL, /*!< General call header flag (Slave mode) */
  161. I2C_FLAG_TR, /*!< Transmitter/Receiver flag */
  162. I2C_FLAG_BUSBSY, /*!< Bus busy flag */
  163. I2C_FLAG_MS, /*!< Master/Slave flag */
  164. /* STS1 register flags */
  165. I2C_FLAG_SMBALT, /*!< SMBus Alert flag */
  166. I2C_FLAG_TTE, /*!< Timeout or Tlow error flag */
  167. I2C_FLAG_PECE, /*!< PEC error in reception flag */
  168. I2C_FLAG_OVRUR, /*!< Overrun/Underrun flag (Slave mode) */
  169. I2C_FLAG_AE, /*!< Acknowledge error flag */
  170. I2C_FLAG_AL, /*!< Arbitration lost flag (Master mode) */
  171. I2C_FLAG_BERR, /*!< Bus error flag */
  172. I2C_FLAG_TXBE, /*!< Transmitter data register empty flag */
  173. I2C_FLAG_RXBNE, /*!< Receiver data register not empty flag */
  174. I2C_FLAG_STOP, /*!< Stop detection flag (Slave mode) */
  175. I2C_FLAG_ADDR10, /*!< 10-bit header sent flag (Master mode) */
  176. I2C_FLAG_BTC, /*!< Byte transfer complete flag */
  177. I2C_FLAG_ADDR, /*!< Address sent flag (Master mode) */
  178. I2C_FLAG_START, /*!< Start bit flag (Master mode) */
  179. } I2C_FLAG_T;
  180. /**
  181. * @brief I2C Events
  182. */
  183. typedef enum
  184. {
  185. /* I2C Master Events */
  186. /* Event 5: Communication start event */
  187. I2C_EVENT_MASTER_MODE_SELECT = 0x00030001, /*!< BUSBSYFLG, MSFLG and STARTFLG flag */
  188. /* Event 6: 7-bit Address Acknowledge
  189. in case of master receiver
  190. */
  191. I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED = 0x00070082, /*!< BUSBSYFLG, MSFLG, ADDRFLG, TXBEFLG and TRFLG flags */
  192. I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED = 0x00030002, /*!< BUSBSYFLG, MSFLG and ADDRFLG flags */
  193. /* Event 9: Master has sent the first byte
  194. in 10-bit address mode
  195. */
  196. I2C_EVENT_MASTER_MODE_ADDRESS10 = 0x00030008, /*!< BUSBSYFLG, MSFLG and ADDR10FLG flags */
  197. /* Master RECEIVER mode */
  198. /* Event 7 */
  199. I2C_EVENT_MASTER_BYTE_RECEIVED = 0x00030040, /*!< BUSBSYFLG, MSFLG and RXBNEFLG flags */
  200. /* Master TRANSMITTER mode */
  201. /* Event 8 */
  202. I2C_EVENT_MASTER_BYTE_TRANSMITTING = 0x00070080, /*!< TRFLG, BUSBSYFLG, MSFLG, TXBEFLG flags */
  203. /* Event 8_2 */
  204. I2C_EVENT_MASTER_BYTE_TRANSMITTED = 0x00070084, /*!< TRFLG, BUSBSYFLG, MSFLG, TXBEFLG and BTCFLG flags */
  205. /* EV1 (all the events below are variants of EV1) */
  206. /* 1, Case of One Single Address managed by the slave */
  207. I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED = 0x00020002, /*!< BUSBSYFLG and ADDRFLG flags */
  208. I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED = 0x00060082, /*!< TRFLG, BUSBSYFLG, TXBEFLG and ADDRFLG flags */
  209. /* 2, Case of Dual address managed by the slave */
  210. I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED = 0x00820000, /*!< DUALF and BUSBSYFLG flags */
  211. I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED = 0x00860080, /*!< DUALF, TRFLG, BUSBSYFLG and TXBEFLG flags */
  212. /* 3, Case of General Call enabled for the slave */
  213. I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED = 0x00120000, /*!< GENCALL and BUSBSYFLG flags */
  214. /* Slave RECEIVER mode */
  215. /* EV2 */
  216. I2C_EVENT_SLAVE_BYTE_RECEIVED = 0x00020040, /*!< BUSBSYFLG and RXBNEFLG flags */
  217. I2C_EVENT_SLAVE_BYTE_RECEIVED1 = 0x00820040, /*!< DUALADDRFLG, BUSBSYFLG and RXBNEFLG flags */
  218. I2C_EVENT_SLAVE_BYTE_RECEIVED2 = 0x00120040, /*!< GENCALLFLG, BUSBSYFLG and RXBNEFLG flags */
  219. /* EV4 */
  220. I2C_EVENT_SLAVE_STOP_DETECTED = 0x00000010, /*!< STOPFLG flag */
  221. /* Slave TRANSMITTER mode */
  222. /* EV3 */
  223. I2C_EVENT_SLAVE_BYTE_TRANSMITTED = 0x00060084, /*!< TRFLG, BUSBSYFLG, TXBEFLG and BTCFLG flags */
  224. I2C_EVENT_SLAVE_BYTE_TRANSMITTED1 = 0x00860084, /*!< DUALADDRFLG, TRFLG, BUSBSYFLG, TXBEFLG and BTCFLG flags */
  225. I2C_EVENT_SLAVE_BYTE_TRANSMITTED2 = 0x00160084, /*!< GENCALLFLG, TRFLG, BUSBSYFLG, TXBEFLG and BTCFLG flags */
  226. I2C_EVENT_SLAVE_BYTE_TRANSMITTING = 0x00060080, /*!< TRFLG, BUSBSYFLG and TXBEFLG flags */
  227. /* EV3_2 */
  228. I2C_EVENT_SLAVE_ACK_FAILURE = 0x00000400, /*!< AEFLG flag */
  229. } I2C_EVENT_T;
  230. /**@} end of group I2C_Enumerations*/
  231. /** @addtogroup I2C_Structure Data Structure
  232. @{
  233. */
  234. /**
  235. * @brief I2C Config structure definition
  236. */
  237. typedef struct
  238. {
  239. uint32_t clockSpeed; /*!< I2C clock speed */
  240. I2C_MODE_T mode; /*!< I2C mode */
  241. I2C_DUTYCYCLE_T dutyCycle; /*!< I2C duty cycle */
  242. uint16_t ownAddress1; /*!< I2C own address */
  243. I2C_ACK_T ack; /*!< Acknowledge */
  244. I2C_ACK_ADDRESS_T ackAddress; /*!< I2C acknowledged address */
  245. } I2C_Config_T;
  246. /**@} end of group I2C_Structure*/
  247. /** @defgroup I2C_Functions
  248. @{
  249. */
  250. /* I2C reset and configuration */
  251. void I2C_Reset(I2C_T* i2c);
  252. void I2C_Config(I2C_T* i2c, I2C_Config_T* i2cConfig);
  253. void I2C_ConfigStructInit(I2C_Config_T* i2cConfig);
  254. void I2C_Enable(I2C_T* i2c);
  255. void I2C_Disable(I2C_T* i2c);
  256. void I2C_EnableGenerateStart(I2C_T* i2c);
  257. void I2C_DisableGenerateStart(I2C_T* i2c);
  258. void I2C_EnableGenerateStop(I2C_T* i2c);
  259. void I2C_DisableGenerateStop(I2C_T* i2c);
  260. void I2C_EnableAcknowledge(I2C_T* i2c);
  261. void I2C_DisableAcknowledge(I2C_T* i2c);
  262. void I2C_ConfigOwnAddress2(I2C_T* i2c, uint8_t address);
  263. void I2C_EnableDualAddress(I2C_T* i2c);
  264. void I2C_DisableDualAddress(I2C_T* i2c);
  265. void I2C_EnableGeneralCall(I2C_T* i2c);
  266. void I2C_DisableGeneralCall(I2C_T* i2c);
  267. void I2C_EnableSoftwareReset(I2C_T* i2c);
  268. void I2C_DisableSoftwareReset(I2C_T* i2c);
  269. void I2C_EnableStretchClock(I2C_T* i2c);
  270. void I2C_DisableStretchClock(I2C_T* i2c);
  271. void I2C_ConfigFastModeDutyCycle(I2C_T* i2c, I2C_DUTYCYCLE_T dutyCycle);
  272. void I2C_ConfigNACKPosition(I2C_T* i2c, I2C_NACK_POSITION_T NACKPosition);
  273. void I2C_ConfigSMBusAlert(I2C_T* i2c, I2C_SMBUSALER_T SMBusState);
  274. void I2C_EnableARP(I2C_T* i2c);
  275. void I2C_DisableARP(I2C_T* i2c);
  276. uint16_t I2C_ReadRegister(I2C_T* i2c, I2C_REGISTER_T i2cRegister);
  277. /* Transmit Configuration */
  278. void I2C_TxData(I2C_T* i2c, uint8_t data);
  279. uint8_t I2C_RxData(I2C_T* i2c);
  280. void I2C_Tx7BitAddress(I2C_T* i2c, uint8_t address, I2C_DIRECTION_T direction);
  281. /* PEC */
  282. void I2C_EnablePECTransmit(I2C_T* i2c);
  283. void I2C_DisablePECTransmit(I2C_T* i2c);
  284. void I2C_ConfigPECPosition(I2C_T* i2c, I2C_PEC_POSITION_T PECPosition);
  285. void I2C_EnablePEC(I2C_T* i2c);
  286. void I2C_DisablePEC(I2C_T* i2c);
  287. uint8_t I2C_ReadPEC(I2C_T* i2c);
  288. /* DMA */
  289. void I2C_EnableDMA(I2C_T* i2c);
  290. void I2C_DisableDMA(I2C_T* i2c);
  291. void I2C_EnableDMALastTransfer(I2C_T* i2c);
  292. void I2C_DisableDMALastTransfer(I2C_T* i2c);
  293. /* Interrupts and flags */
  294. void I2C_EnableInterrupt(I2C_T* i2c, uint16_t interrupt);
  295. void I2C_DisableInterrupt(I2C_T* i2c, uint16_t interrupt);
  296. uint8_t I2C_ReadEventStatus(I2C_T* i2c, I2C_EVENT_T i2cEvent);
  297. uint32_t I2C_ReadLastEvent(I2C_T* i2c);
  298. uint8_t I2C_ReadStatusFlag(I2C_T* i2c, I2C_FLAG_T flag);
  299. void I2C_ClearStatusFlag(I2C_T* i2c, I2C_FLAG_T flag);
  300. uint8_t I2C_ReadIntFlag(I2C_T* i2c, I2C_INT_FLAG_T flag);
  301. void I2C_ClearIntFlag(I2C_T* i2c, uint32_t flag);
  302. #ifdef __cplusplus
  303. }
  304. #endif
  305. #endif /* __APM32F4XX_I2C_H */
  306. /**@} end of group I2C_Enumerations */
  307. /**@} end of group I2C_Driver */
  308. /**@} end of group APM32F4xx_StdPeriphDriver */