sspd_rts.h 8.1 KB

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  1. /*****************************************************************************
  2. *
  3. * Copyright Andes Technology Corporation 2007-2008
  4. * All Rights Reserved.
  5. *
  6. * Revision History:
  7. *
  8. * Mar.16.2008 Created.
  9. ****************************************************************************/
  10. /*****************************************************************************
  11. *
  12. * FILE NAME VERSION
  13. *
  14. * sspd_rts.h
  15. *
  16. * DESCRIPTION
  17. *
  18. * SPI digital serial interface protocol header for resistive
  19. * touch screen controller.
  20. *
  21. * DATA STRUCTURES
  22. *
  23. * None
  24. *
  25. * DEPENDENCIES
  26. *
  27. * None
  28. *
  29. ****************************************************************************/
  30. #ifndef __SSPD_RTS_H__
  31. #define __SSPD_RTS_H__
  32. /*****************************************************************************
  33. * Configuration Options
  34. ****************************************************************************/
  35. /* Non-zero to enable 16-clock per conversion mode, otherwise 24-clock cycle is applied. */
  36. #define RTS_16CLK_CONV_CYCLE 1
  37. #define RTS_LISR_VECTOR INTC_HW0_BIT /* AG101 connects #PENIRQ to hw0 vector */
  38. /* polling loop counter for waiting hw-reset */
  39. #define RTS_RESET_WAIT (0x300000)
  40. /* CPU polling counter to avoid bouncing signals of previous RTS operation */
  41. #define RTS_DEBOUNCE_WAIT (0x30000)
  42. /* polling counter for serial data in */
  43. #define RTS_DIN_TIMEOUT (0x30000)
  44. /* HISR definitions */
  45. #define RTS_HISR_PRIORITY 0 /* 0: highest, 2: lowest */
  46. #define RTS_HISR_STACK_SIZE 2048 /* Please align to 32-bit */
  47. #define RTS_HISR_AS_TOUCHED 0x00000001 /* Activate HISR for touched interrupt */
  48. /*****************************************************************************
  49. * Resistive Touch Screen Digital Interface Definitions
  50. ****************************************************************************/
  51. /* Definitions for ADS7846 */
  52. /* Control Byte Bits */
  53. #define RTS_ADS7846_PD_MASK 0x03 /* Start Bit (MSB) */
  54. #define RTS_ADS7846_PD_SHIFT 0
  55. #define RTS_ADS7846_PD 0x00 /* power down between conversion, #penirq enabled */
  56. #define RTS_ADS7846_ADC 0x01 /* ref off, adc on, #penirq disabled */
  57. #define RTS_ADS7846_REF 0x02 /* ref on, adc off, #penirq enabled */
  58. #define RTS_ADS7846_PW 0x03 /* power on, ref on, adc on, #penirq disabled */
  59. #define RTS_ADS7846_SER_MASK 0x04 /* Single-Ended/#Differential-Reference Register */
  60. #define RTS_ADS7846_SER_SHIFT 2
  61. #define RTS_ADS7846_DF 0x00 /* differential */
  62. #define RTS_ADS7846_SE 0x01 /* single-ended */
  63. #define RTS_ADS7846_MODE_MASK 0x08 /* Conversion Selection Bit */
  64. #define RTS_ADS7846_MODE_SHIFT 3
  65. #define RTS_ADS7846_12_BITS 0x00 /* 12 bits conversion */
  66. #define RTS_ADS7846_8_BITS 0x01 /* 8 bits conversion */
  67. #define RTS_ADS7846_MUX_MASK 0x70 /* (A2 ~ A0) Control the setting of multiplexer input */
  68. #define RTS_ADS7846_MUX_SHIFT 4
  69. #define RTS_ADS7846_DF_X 0x05 /* [A2:A0] 101b, Driver: X+ X-, Measure Y+ */
  70. #define RTS_ADS7846_DF_Y 0x01 /* [A2:A0] 001b, Driver: Y+ Y-, Measure X+ */
  71. #define RTS_ADS7846_DF_Z1 0x03 /* [A2:A0] 011b, Driver: Y+ X-, Measure X+ */
  72. #define RTS_ADS7846_DF_Z2 0x04 /* [A2:A0] 100b, Driver: Y+ X-, Measure Y- */
  73. #define RTS_ADS7846_SE_X 0x05 /* [A2:A0] 101b */
  74. #define RTS_ADS7846_SE_Y 0x01 /* [A2:A0] 001b */
  75. #define RTS_ADS7846_SE_Z1 0x03 /* [A2:A0] 011b */
  76. #define RTS_ADS7846_SE_Z2 0x04 /* [A2:A0] 100b */
  77. #define RTS_ADS7846_SE_BAT 0x02 /* [A2:A0] 010b */
  78. #define RTS_ADS7846_SE_AUX 0x06 /* [A2:A0] 110b */
  79. #define RTS_ADS7846_SE_TEMP0 0x00 /* [A2:A0] 000b */
  80. #define RTS_ADS7846_SE_TEMP1 0x07 /* [A2:A0] 111b */
  81. #define RTS_ADS7846_START_MASK 0x80 /* Start Bit (MSB) */
  82. #define RTS_ADS7846_START_BIT 7
  83. #define RTS_ADS7846_START 1
  84. /* Supplimental Macros */
  85. #define RTS_ADS7846_PADDING_BYTE 0 /* Padding byte feed after the command byte to continue serial clocking */
  86. #define RTS_ADS7846_CTRL_BYTE(mux, mode, ser, pd) \
  87. ((((uint32_t)(mux) << RTS_ADS7846_MUX_SHIFT) & RTS_ADS7846_MUX_MASK) | \
  88. (((uint32_t)(mode) << RTS_ADS7846_MODE_SHIFT) & RTS_ADS7846_MODE_MASK) | \
  89. (((uint32_t)(ser) << RTS_ADS7846_SER_SHIFT) & RTS_ADS7846_SER_MASK) | \
  90. (((uint32_t)(pd) << RTS_ADS7846_PD_SHIFT) & RTS_ADS7846_PD_MASK) | \
  91. (uint32_t)RTS_ADS7846_START_MASK)
  92. /* this is correct */
  93. #define RTS_ADS7846_8BITS_DATA(msb, lsb) ((((uint32_t)(msb) & 0x07) << 5) | (((uint32_t)(lsb) & 0xff) >> 3))
  94. #ifndef CONFIG_PLAT_QEMU
  95. #define RTS_ADS7846_12BITS_DATA(msb, lsb) ((((uint32_t)(msb) & 0x7f) << 5) | (((uint32_t)(lsb) & 0xff) >> 3))
  96. #else
  97. #define RTS_ADS7846_12BITS_DATA(msb, lsb) msb
  98. //#define RTS_ADS7846_12BITS_DATA(msb, lsb) ((msb >> 19) & 0xfff)
  99. #endif
  100. /* Pre-defined Control-Byte Constants */
  101. #define RTS_ADS7846_CTL_RY RTS_ADS7846_CTRL_BYTE(RTS_ADS7846_DF_Y, RTS_ADS7846_12_BITS, \
  102. RTS_ADS7846_DF, RTS_ADS7846_PW)
  103. #define RTS_ADS7846_CTL_RX RTS_ADS7846_CTRL_BYTE(RTS_ADS7846_DF_X, RTS_ADS7846_12_BITS, \
  104. RTS_ADS7846_DF, RTS_ADS7846_PW)
  105. #define RTS_ADS7846_CTL_RZ1 RTS_ADS7846_CTRL_BYTE(RTS_ADS7846_DF_Z1, RTS_ADS7846_12_BITS, \
  106. RTS_ADS7846_DF, RTS_ADS7846_PW)
  107. #define RTS_ADS7846_CTL_RZ2 RTS_ADS7846_CTRL_BYTE(RTS_ADS7846_DF_Z2, RTS_ADS7846_12_BITS, \
  108. RTS_ADS7846_DF, RTS_ADS7846_PW)
  109. #define RTS_ADS7846_CTL_RY_PD RTS_ADS7846_CTRL_BYTE(RTS_ADS7846_DF_Y, RTS_ADS7846_12_BITS, \
  110. RTS_ADS7846_DF, RTS_ADS7846_PD)
  111. #define RTS_ADS7846_CTL_RX_PD RTS_ADS7846_CTRL_BYTE(RTS_ADS7846_DF_X, RTS_ADS7846_12_BITS, \
  112. RTS_ADS7846_DF, RTS_ADS7846_PD)
  113. #define RTS_ADS7846_CTL_RZ1_PD RTS_ADS7846_CTRL_BYTE(RTS_ADS7846_DF_Z1, RTS_ADS7846_12_BITS, \
  114. RTS_ADS7846_DF, RTS_ADS7846_PD)
  115. #define RTS_ADS7846_CTL_RZ2_PD RTS_ADS7846_CTRL_BYTE(RTS_ADS7846_DF_Z2, RTS_ADS7846_12_BITS, \
  116. RTS_ADS7846_DF, RTS_ADS7846_PD)
  117. #define RTS_ADS7846_CTL_PD RTS_ADS7846_CTRL_BYTE(RTS_ADS7846_DF_Y, RTS_ADS7846_12_BITS, \
  118. RTS_ADS7846_DF, RTS_ADS7846_PD)
  119. /*
  120. * DCLK
  121. * ---------------
  122. * From pp3:
  123. * 125 kHz max throughput rate, so ...
  124. * DCLK_max = 125k * 16(16-clock-per-conversion mode) = 2.0MHz
  125. *
  126. * From table VI (p.p.14):
  127. * (tch + tcl) = 400ns minimum, so ...
  128. * DCLK_max = 1/400ns = 2.5MHz ?
  129. */
  130. #define RTS_ADS7846_DCLK_MAX 2000000 /* adopt 2.0MHz for safe */
  131. #define RTS_ADS7846_DCLK_DEFAULT 125000 /* 7812 data per second (3906 x-y/sec, or 1953 x-y-z1-z2/sec) */
  132. /*****************************************************************************
  133. * SSP Controller Resistive Touch Screen Driver-Supplement Interfaces
  134. ****************************************************************************/
  135. struct ts_data {
  136. int x;
  137. int y;
  138. int z1;
  139. int z2;
  140. int pressed;
  141. };
  142. struct ts_dev {
  143. int left;
  144. int right;
  145. int top;
  146. int bottom;
  147. int lcd_width;
  148. int lcd_height;
  149. int penirq; /* initialize touch screen driver in #penirq mode or polling mode */
  150. int penirq_en; /* enable #penirq after initialization if penirq is non-zero */
  151. void *event_obj; /* (in) Event object to notify app about the interrupt. */
  152. struct ts_data *event_data; /* Client specified struct pointer to receive {x,y,touched} states */
  153. hal_semaphore_t sem;
  154. struct ts_data data;
  155. };
  156. extern int _sspd_rts_init(struct ts_dev *ts);
  157. extern int _sspd_rts_probe(int *x, int *y, int *z1, int *z2, int *pressed);
  158. extern void ts_adjust(struct ts_dev *ts, int ts_x, int ts_y, int *x, int *y);
  159. extern void ts_raw_value(struct ts_dev *ts, int *x, int *y);
  160. extern void ts_value(struct ts_dev *ts, int *x, int *y);
  161. extern void ts_init(struct ts_dev *ts);
  162. extern void ts_calibrate(struct ts_dev *ts, void (*draw_cross)(void *param, int x, int y), int count);
  163. #endif /* __SSPD_RTS_H__ */