drv_can.c 24 KB

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  1. /*
  2. * File : drv_can.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2018, RT-Thread Development Team
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. *
  20. * Change Logs:
  21. * Date Author Notes
  22. * 2018-08-05 Xeon Xu the first version
  23. */
  24. /* Includes ------------------------------------------------------------------*/
  25. #include "drv_can.h"
  26. #include "board.h"
  27. #include <rtdevice.h>
  28. #include <rthw.h>
  29. #include <rtthread.h>
  30. #define BS1SHIFT 16
  31. #define BS2SHIFT 20
  32. #define RRESCLSHIFT 0
  33. #define SJWSHIFT 24
  34. #define BS1MASK ( (0x0F) << BS1SHIFT )
  35. #define BS2MASK ( (0x07) << BS2SHIFT )
  36. #define RRESCLMASK ( 0x3FF << RRESCLSHIFT )
  37. #define SJWMASK ( 0x3 << SJWSHIFT )
  38. struct stm_baud_rate_tab
  39. {
  40. rt_uint32_t baud_rate;
  41. rt_uint32_t confdata;
  42. };
  43. /* STM32 can driver */
  44. struct stm32_drv_can
  45. {
  46. CAN_HandleTypeDef CanHandle;
  47. CanTxMsgTypeDef TxMessage;
  48. CanRxMsgTypeDef RxMessage;
  49. CAN_FilterConfTypeDef FilterConfig;
  50. };
  51. static const struct stm_baud_rate_tab can_baud_rate_tab[] =
  52. {
  53. {CAN1MBaud , (CAN_SJW_1TQ | CAN_BS1_2TQ | CAN_BS2_4TQ | 6)},
  54. {CAN800kBaud, (CAN_SJW_1TQ | CAN_BS1_5TQ | CAN_BS2_7TQ | 4)},
  55. {CAN500kBaud, (CAN_SJW_1TQ | CAN_BS1_14TQ | CAN_BS2_6TQ | 4)},
  56. {CAN250kBaud, (CAN_SJW_1TQ | CAN_BS1_1TQ | CAN_BS2_2TQ | 42)},
  57. {CAN125kBaud, (CAN_SJW_1TQ | CAN_BS1_1TQ | CAN_BS2_2TQ | 84)},
  58. {CAN100kBaud, (CAN_SJW_1TQ | CAN_BS1_1TQ | CAN_BS2_1TQ | 140)},
  59. {CAN50kBaud , (CAN_SJW_1TQ | CAN_BS1_1TQ | CAN_BS2_1TQ | 280)},
  60. {CAN20kBaud , (CAN_SJW_1TQ | CAN_BS1_1TQ | CAN_BS2_1TQ | 700)},
  61. {CAN10kBaud , (CAN_SJW_1TQ | CAN_BS1_3TQ | CAN_BS2_4TQ | 525)}
  62. };
  63. #define BAUD_DATA(TYPE,NO) \
  64. ((can_baud_rate_tab[NO].confdata & TYPE##MASK))
  65. static rt_uint32_t get_can_baud_index(rt_uint32_t baud)
  66. {
  67. rt_uint32_t len, index, default_index;
  68. len = sizeof(can_baud_rate_tab)/sizeof(can_baud_rate_tab[0]);
  69. default_index = len;
  70. for(index = 0; index < len; index++)
  71. {
  72. if(can_baud_rate_tab[index].baud_rate == baud)
  73. return index;
  74. if(can_baud_rate_tab[index].baud_rate == 1000UL * 250)
  75. default_index = index;
  76. }
  77. if(default_index != len)
  78. return default_index;
  79. return 0;
  80. }
  81. #ifdef USING_BXCAN1
  82. static struct stm32_drv_can drv_can1;
  83. struct rt_can_device dev_can1;
  84. void CAN1_TX_IRQHandler(void)
  85. {
  86. CAN_HandleTypeDef *hcan;
  87. rt_interrupt_enter();
  88. hcan = &drv_can1.CanHandle;
  89. HAL_CAN_IRQHandler(hcan);
  90. if (__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_0))
  91. {
  92. rt_hw_can_isr(&dev_can1, RT_CAN_EVENT_TX_DONE | 0 << 8);
  93. }
  94. else
  95. {
  96. rt_hw_can_isr(&dev_can1, RT_CAN_EVENT_TX_FAIL | 0 << 8);
  97. }
  98. if (__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_1))
  99. {
  100. rt_hw_can_isr(&dev_can1, RT_CAN_EVENT_TX_DONE | 1 << 8);
  101. }
  102. else
  103. {
  104. rt_hw_can_isr(&dev_can1, RT_CAN_EVENT_TX_FAIL | 1 << 8);
  105. }
  106. if (__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_2))
  107. {
  108. rt_hw_can_isr(&dev_can1, RT_CAN_EVENT_TX_DONE | 2 << 8);
  109. }
  110. else
  111. {
  112. rt_hw_can_isr(&dev_can1, RT_CAN_EVENT_TX_FAIL | 2 << 8);
  113. }
  114. rt_interrupt_leave();
  115. }
  116. /**
  117. * @brief This function handles CAN1 RX0 interrupts.
  118. */
  119. void CAN1_RX0_IRQHandler(void)
  120. {
  121. CAN_HandleTypeDef *hcan;
  122. hcan = &drv_can1.CanHandle;
  123. rt_interrupt_enter();
  124. HAL_CAN_IRQHandler(hcan);
  125. if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FOV0))
  126. {
  127. rt_hw_can_isr(&dev_can1, RT_CAN_EVENT_RXOF_IND | 0 << 8);
  128. }
  129. else
  130. {
  131. rt_hw_can_isr(&dev_can1, RT_CAN_EVENT_RX_IND | 0 << 8);
  132. }
  133. rt_interrupt_leave();
  134. }
  135. /**
  136. * @brief This function handles CAN1 RX1 interrupts.
  137. */
  138. void CAN1_RX1_IRQHandler(void)
  139. {
  140. CAN_HandleTypeDef *hcan;
  141. hcan = &drv_can1.CanHandle;
  142. rt_interrupt_enter();
  143. HAL_CAN_IRQHandler(hcan);
  144. if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FOV1))
  145. {
  146. rt_hw_can_isr(&dev_can1, RT_CAN_EVENT_RXOF_IND | 1 << 8);
  147. }
  148. else
  149. {
  150. rt_hw_can_isr(&dev_can1, RT_CAN_EVENT_RX_IND | 1 << 8);
  151. }
  152. rt_interrupt_leave();
  153. }
  154. /**
  155. * @brief This function handles CAN1 SCE interrupts.
  156. */
  157. void CAN1_SCE_IRQHandler(void)
  158. {
  159. rt_uint32_t errtype;
  160. CAN_HandleTypeDef *hcan;
  161. hcan = &drv_can1.CanHandle;
  162. errtype = hcan->Instance->ESR;
  163. rt_interrupt_enter();
  164. HAL_CAN_IRQHandler(hcan);
  165. if (errtype & 0x70 && dev_can1.status.lasterrtype == (errtype & 0x70))
  166. {
  167. switch ((errtype & 0x70) >> 4)
  168. {
  169. case RT_CAN_BUS_BIT_PAD_ERR:
  170. dev_can1.status.bitpaderrcnt++;
  171. break;
  172. case RT_CAN_BUS_FORMAT_ERR:
  173. dev_can1.status.formaterrcnt++;
  174. break;
  175. case RT_CAN_BUS_ACK_ERR:
  176. dev_can1.status.ackerrcnt++;
  177. break;
  178. case RT_CAN_BUS_IMPLICIT_BIT_ERR:
  179. case RT_CAN_BUS_EXPLICIT_BIT_ERR:
  180. dev_can1.status.biterrcnt++;
  181. break;
  182. case RT_CAN_BUS_CRC_ERR:
  183. dev_can1.status.crcerrcnt++;
  184. break;
  185. }
  186. dev_can1.status.lasterrtype = errtype & 0x70;
  187. hcan->Instance->ESR &= ~0x70;
  188. }
  189. dev_can1.status.rcverrcnt = errtype >> 24;
  190. dev_can1.status.snderrcnt = (errtype >> 16 & 0xFF);
  191. dev_can1.status.errcode = errtype & 0x07;
  192. hcan->Instance->MSR |= CAN_MSR_ERRI;
  193. rt_interrupt_leave();
  194. }
  195. #endif // USING_BXCAN1
  196. #ifdef USING_BXCAN2
  197. static struct stm32_drv_can drv_can2;
  198. struct rt_can_device dev_can2;
  199. /**
  200. * @brief This function handles CAN2 TX interrupts.
  201. */
  202. void CAN2_TX_IRQHandler(void)
  203. {
  204. CAN_HandleTypeDef *hcan;
  205. rt_interrupt_enter();
  206. hcan = &drv_can2.CanHandle;
  207. HAL_CAN_IRQHandler(hcan);
  208. if (__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_0))
  209. {
  210. rt_hw_can_isr(&dev_can2, RT_CAN_EVENT_TX_DONE | 0 << 8);
  211. }
  212. else
  213. {
  214. rt_hw_can_isr(&dev_can2, RT_CAN_EVENT_TX_FAIL | 0 << 8);
  215. }
  216. if (__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_1))
  217. {
  218. rt_hw_can_isr(&dev_can2, RT_CAN_EVENT_TX_DONE | 1 << 8);
  219. }
  220. else
  221. {
  222. rt_hw_can_isr(&dev_can2, RT_CAN_EVENT_TX_FAIL | 1 << 8);
  223. }
  224. if (__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_2))
  225. {
  226. rt_hw_can_isr(&dev_can2, RT_CAN_EVENT_TX_DONE | 2 << 8);
  227. }
  228. else
  229. {
  230. rt_hw_can_isr(&dev_can2, RT_CAN_EVENT_TX_FAIL | 2 << 8);
  231. }
  232. rt_interrupt_leave();
  233. }
  234. /**
  235. * @brief This function handles CAN2 RX0 interrupts.
  236. */
  237. void CAN2_RX0_IRQHandler(void)
  238. {
  239. CAN_HandleTypeDef *hcan;
  240. hcan = &drv_can2.CanHandle;
  241. rt_interrupt_enter();
  242. HAL_CAN_IRQHandler(hcan);
  243. if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FOV0))
  244. {
  245. rt_hw_can_isr(&dev_can2, RT_CAN_EVENT_RXOF_IND | 0 << 8);
  246. }
  247. else
  248. {
  249. rt_hw_can_isr(&dev_can2, RT_CAN_EVENT_RX_IND | 0 << 8);
  250. }
  251. rt_interrupt_leave();
  252. }
  253. /**
  254. * @brief This function handles CAN2 RX1 interrupts.
  255. */
  256. void CAN2_RX1_IRQHandler(void)
  257. {
  258. CAN_HandleTypeDef *hcan;
  259. hcan = &drv_can2.CanHandle;
  260. rt_interrupt_enter();
  261. HAL_CAN_IRQHandler(hcan);
  262. if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FOV1))
  263. {
  264. rt_hw_can_isr(&dev_can2, RT_CAN_EVENT_RXOF_IND | 1 << 8);
  265. }
  266. else
  267. {
  268. rt_hw_can_isr(&dev_can2, RT_CAN_EVENT_RX_IND | 1 << 8);
  269. }
  270. rt_interrupt_leave();
  271. }
  272. /**
  273. * @brief This function handles CAN2 SCE interrupts.
  274. */
  275. void CAN2_SCE_IRQHandler(void)
  276. {
  277. rt_uint32_t errtype;
  278. CAN_HandleTypeDef *hcan;
  279. hcan = &drv_can2.CanHandle;
  280. errtype = hcan->Instance->ESR;
  281. rt_interrupt_enter();
  282. HAL_CAN_IRQHandler(hcan);
  283. if (errtype & 0x70 && dev_can2.status.lasterrtype == (errtype & 0x70))
  284. {
  285. switch ((errtype & 0x70) >> 4)
  286. {
  287. case RT_CAN_BUS_BIT_PAD_ERR:
  288. dev_can2.status.bitpaderrcnt++;
  289. break;
  290. case RT_CAN_BUS_FORMAT_ERR:
  291. dev_can2.status.formaterrcnt++;
  292. break;
  293. case RT_CAN_BUS_ACK_ERR:
  294. dev_can2.status.ackerrcnt++;
  295. break;
  296. case RT_CAN_BUS_IMPLICIT_BIT_ERR:
  297. case RT_CAN_BUS_EXPLICIT_BIT_ERR:
  298. dev_can2.status.biterrcnt++;
  299. break;
  300. case RT_CAN_BUS_CRC_ERR:
  301. dev_can2.status.crcerrcnt++;
  302. break;
  303. }
  304. dev_can2.status.lasterrtype = errtype & 0x70;
  305. hcan->Instance->ESR &= ~0x70;
  306. }
  307. dev_can2.status.rcverrcnt = errtype >> 24;
  308. dev_can2.status.snderrcnt = (errtype >> 16 & 0xFF);
  309. dev_can2.status.errcode = errtype & 0x07;
  310. hcan->Instance->MSR |= CAN_MSR_ERRI;
  311. rt_interrupt_leave();
  312. }
  313. #endif // USING_BXCAN2
  314. /**
  315. * @brief Error CAN callback.
  316. * @param hcan pointer to a CAN_HandleTypeDef structure that contains
  317. * the configuration information for the specified CAN.
  318. * @retval None
  319. */
  320. void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan)
  321. {
  322. /* TODO Error Callback */
  323. /* Prevent unused argument(s) compilation warning */
  324. UNUSED(hcan);
  325. /* NOTE : This function Should not be modified, when the callback is needed,
  326. the HAL_CAN_ErrorCallback could be implemented in the user file
  327. */
  328. }
  329. /**
  330. * @brief Transmission complete callback in non blocking mode
  331. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  332. * the configuration information for the specified CAN.
  333. * @retval None
  334. */
  335. void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan)
  336. {
  337. switch((int)hcan->Instance)
  338. {
  339. case (int)CAN1:
  340. /* User define */
  341. break;
  342. case (int)CAN2:
  343. /* User define */
  344. break;
  345. }
  346. }
  347. /**
  348. * @brief Transmission complete callback in non blocking mode
  349. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  350. * the configuration information for the specified CAN.
  351. * @retval None
  352. */
  353. void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan)
  354. {
  355. HAL_CAN_Receive_IT(hcan, CAN_FIFO0);
  356. HAL_CAN_Receive_IT(hcan, CAN_FIFO1);
  357. }
  358. static rt_err_t drv_configure(struct rt_can_device *dev_can,
  359. struct can_configure *cfg)
  360. {
  361. struct stm32_drv_can *drv_can;
  362. rt_uint32_t baud_index;
  363. CAN_InitTypeDef *drv_init;
  364. CAN_FilterConfTypeDef *filterConf;
  365. RT_ASSERT(dev_can);
  366. RT_ASSERT(cfg);
  367. drv_can = (struct stm32_drv_can *)dev_can->parent.user_data;
  368. drv_init = &drv_can->CanHandle.Init;
  369. drv_init->TTCM = DISABLE;
  370. drv_init->ABOM = DISABLE;
  371. drv_init->AWUM = DISABLE;
  372. drv_init->NART = DISABLE;
  373. drv_init->RFLM = DISABLE;
  374. drv_init->TXFP = DISABLE;
  375. switch (cfg->mode)
  376. {
  377. case RT_CAN_MODE_NORMAL:
  378. drv_init->Mode = CAN_MODE_NORMAL;
  379. break;
  380. case RT_CAN_MODE_LISEN:
  381. drv_init->Mode = CAN_MODE_SILENT;
  382. break;
  383. case RT_CAN_MODE_LOOPBACK:
  384. drv_init->Mode = CAN_MODE_LOOPBACK;
  385. break;
  386. case RT_CAN_MODE_LOOPBACKANLISEN:
  387. drv_init->Mode = CAN_MODE_SILENT_LOOPBACK;
  388. break;
  389. }
  390. baud_index = get_can_baud_index(cfg->baud_rate);
  391. drv_init->SJW = BAUD_DATA(SJW, baud_index);
  392. drv_init->BS1 = BAUD_DATA(BS1, baud_index);
  393. drv_init->BS2 = BAUD_DATA(BS2, baud_index);
  394. drv_init->Prescaler = BAUD_DATA(RRESCL, baud_index);
  395. if (HAL_CAN_Init(&drv_can->CanHandle) != HAL_OK)
  396. {
  397. return RT_ERROR;
  398. }
  399. /* Filter conf */
  400. filterConf = &drv_can->FilterConfig;
  401. filterConf->FilterNumber = 0;
  402. filterConf->FilterMode = CAN_FILTERMODE_IDMASK;
  403. filterConf->FilterScale = CAN_FILTERSCALE_32BIT;
  404. filterConf->FilterIdHigh = 0x0000;
  405. filterConf->FilterIdLow = 0x0000;
  406. filterConf->FilterMaskIdHigh = 0x0000;
  407. filterConf->FilterMaskIdLow = 0x0000;
  408. filterConf->FilterFIFOAssignment = 0;
  409. filterConf->FilterActivation = ENABLE;
  410. filterConf->BankNumber = 14;
  411. HAL_CAN_ConfigFilter(&drv_can->CanHandle, filterConf);
  412. return RT_EOK;
  413. }
  414. static rt_err_t drv_control(struct rt_can_device *can, int cmd, void *arg)
  415. {
  416. struct stm32_drv_can *drv_can;
  417. rt_uint32_t argval;
  418. drv_can = (struct stm32_drv_can *) can->parent.user_data;
  419. assert_param(drv_can != RT_NULL);
  420. switch (cmd)
  421. {
  422. case RT_DEVICE_CTRL_CLR_INT:
  423. argval = (rt_uint32_t) arg;
  424. if (argval == RT_DEVICE_FLAG_INT_RX)
  425. {
  426. if (CAN1 == drv_can->CanHandle.Instance) {
  427. HAL_NVIC_DisableIRQ(CAN1_RX0_IRQn);
  428. HAL_NVIC_DisableIRQ(CAN1_RX1_IRQn);
  429. }
  430. else
  431. {
  432. HAL_NVIC_DisableIRQ(CAN2_RX0_IRQn);
  433. HAL_NVIC_DisableIRQ(CAN2_RX1_IRQn);
  434. }
  435. __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_FMP0);
  436. __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_FF0 );
  437. __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_FOV0);
  438. __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_FMP1);
  439. __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_FF1 );
  440. __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_FOV1);
  441. }
  442. else if (argval == RT_DEVICE_FLAG_INT_TX)
  443. {
  444. if (CAN1 == drv_can->CanHandle.Instance)
  445. {
  446. HAL_NVIC_DisableIRQ(CAN1_TX_IRQn);
  447. }
  448. else
  449. {
  450. HAL_NVIC_DisableIRQ(CAN2_TX_IRQn);
  451. }
  452. __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_TME);
  453. }
  454. else if (argval == RT_DEVICE_CAN_INT_ERR)
  455. {
  456. if (CAN1 == drv_can->CanHandle.Instance)
  457. {
  458. NVIC_DisableIRQ(CAN1_SCE_IRQn);
  459. }
  460. else
  461. {
  462. NVIC_DisableIRQ(CAN2_SCE_IRQn);
  463. }
  464. __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_BOF);
  465. __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_LEC);
  466. __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_ERR);
  467. }
  468. break;
  469. case RT_DEVICE_CTRL_SET_INT:
  470. argval = (rt_uint32_t) arg;
  471. if (argval == RT_DEVICE_FLAG_INT_RX)
  472. {
  473. __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_FMP0);
  474. __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_FF0);
  475. __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_FOV0);
  476. __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_FMP1);
  477. __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_FF1);
  478. __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_FOV1);
  479. if (CAN1 == drv_can->CanHandle.Instance)
  480. {
  481. HAL_NVIC_SetPriority(CAN1_RX0_IRQn, 1, 0);
  482. HAL_NVIC_EnableIRQ(CAN1_RX0_IRQn);
  483. HAL_NVIC_SetPriority(CAN1_RX1_IRQn, 1, 0);
  484. HAL_NVIC_EnableIRQ(CAN1_RX1_IRQn);
  485. }
  486. else
  487. {
  488. HAL_NVIC_SetPriority(CAN2_RX0_IRQn, 1, 0);
  489. HAL_NVIC_EnableIRQ(CAN2_RX0_IRQn);
  490. HAL_NVIC_SetPriority(CAN2_RX1_IRQn, 1, 0);
  491. HAL_NVIC_EnableIRQ(CAN2_RX1_IRQn);
  492. }
  493. }
  494. else if (argval == RT_DEVICE_FLAG_INT_TX)
  495. {
  496. __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_TME);
  497. if (CAN1 == drv_can->CanHandle.Instance)
  498. {
  499. HAL_NVIC_SetPriority(CAN1_TX_IRQn, 1, 0);
  500. HAL_NVIC_EnableIRQ(CAN1_TX_IRQn);
  501. }
  502. else
  503. {
  504. HAL_NVIC_SetPriority(CAN2_TX_IRQn, 1, 0);
  505. HAL_NVIC_EnableIRQ(CAN2_TX_IRQn);
  506. }
  507. }
  508. else if (argval == RT_DEVICE_CAN_INT_ERR)
  509. {
  510. __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_BOF);
  511. __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_LEC);
  512. __HAL_CAN_ENABLE_IT(&drv_can->CanHandle, CAN_IT_ERR);
  513. if (CAN1 == drv_can->CanHandle.Instance)
  514. {
  515. HAL_NVIC_SetPriority(CAN1_SCE_IRQn, 1, 0);
  516. HAL_NVIC_EnableIRQ(CAN1_SCE_IRQn);
  517. }
  518. else
  519. {
  520. HAL_NVIC_SetPriority(CAN2_SCE_IRQn, 1, 0);
  521. HAL_NVIC_EnableIRQ(CAN2_SCE_IRQn);
  522. }
  523. }
  524. break;
  525. case RT_CAN_CMD_SET_FILTER:
  526. /* TODO: filter*/
  527. break;
  528. case RT_CAN_CMD_SET_MODE:
  529. argval = (rt_uint32_t) arg;
  530. if (argval != RT_CAN_MODE_NORMAL ||
  531. argval != RT_CAN_MODE_LISEN ||
  532. argval != RT_CAN_MODE_LOOPBACK ||
  533. argval != RT_CAN_MODE_LOOPBACKANLISEN)
  534. {
  535. return RT_ERROR;
  536. }
  537. if (argval != can->config.mode)
  538. {
  539. can->config.mode = argval;
  540. if (HAL_CAN_Init(&drv_can->CanHandle) != HAL_OK)
  541. {
  542. return RT_ERROR;
  543. }
  544. }
  545. break;
  546. case RT_CAN_CMD_SET_BAUD:
  547. argval = (rt_uint32_t) arg;
  548. if (argval != CAN1MBaud &&
  549. argval != CAN800kBaud &&
  550. argval != CAN500kBaud &&
  551. argval != CAN250kBaud &&
  552. argval != CAN125kBaud &&
  553. argval != CAN100kBaud &&
  554. argval != CAN50kBaud &&
  555. argval != CAN20kBaud &&
  556. argval != CAN10kBaud)
  557. {
  558. return RT_ERROR;
  559. }
  560. if (argval != can->config.baud_rate)
  561. {
  562. CAN_InitTypeDef *drv_init;
  563. rt_uint32_t baud_index;
  564. can->config.baud_rate = argval;
  565. drv_init = &drv_can->CanHandle.Init;
  566. drv_init->TTCM = DISABLE;
  567. drv_init->ABOM = DISABLE;
  568. drv_init->AWUM = DISABLE;
  569. drv_init->NART = DISABLE;
  570. drv_init->RFLM = DISABLE;
  571. drv_init->TXFP = DISABLE;
  572. baud_index = get_can_baud_index(can->config.baud_rate);
  573. drv_init->SJW = BAUD_DATA(SJW, baud_index);
  574. drv_init->BS1 = BAUD_DATA(BS1, baud_index);
  575. drv_init->BS2 = BAUD_DATA(BS2, baud_index);
  576. drv_init->Prescaler = BAUD_DATA(RRESCL, baud_index);
  577. if (HAL_CAN_Init(&drv_can->CanHandle) != HAL_OK)
  578. {
  579. return RT_ERROR;
  580. }
  581. }
  582. break;
  583. case RT_CAN_CMD_SET_PRIV:
  584. argval = (rt_uint32_t) arg;
  585. if (argval != RT_CAN_MODE_PRIV ||
  586. argval != RT_CAN_MODE_NOPRIV)
  587. {
  588. return RT_ERROR;
  589. }
  590. if (argval != can->config.privmode)
  591. {
  592. can->config.privmode = argval;
  593. if (HAL_CAN_Init(&drv_can->CanHandle) != HAL_OK)
  594. {
  595. return RT_ERROR;
  596. }
  597. }
  598. break;
  599. case RT_CAN_CMD_GET_STATUS:
  600. {
  601. rt_uint32_t errtype;
  602. errtype = drv_can->CanHandle.Instance->ESR;
  603. can->status.rcverrcnt = errtype >> 24;
  604. can->status.snderrcnt = (errtype >> 16 & 0xFF);
  605. can->status.errcode = errtype & 0x07;
  606. if (arg != &can->status)
  607. {
  608. rt_memcpy(arg, &can->status, sizeof(can->status));
  609. }
  610. }
  611. break;
  612. }
  613. return RT_EOK;
  614. }
  615. static int drv_sendmsg(struct rt_can_device *can, const void *buf, rt_uint32_t boxno)
  616. {
  617. CAN_HandleTypeDef *hcan;
  618. struct rt_can_msg *pmsg = (struct rt_can_msg *) buf;
  619. hcan = &((struct stm32_drv_can *) can->parent.user_data)->CanHandle;
  620. hcan->pTxMsg->StdId = pmsg->id;
  621. hcan->pTxMsg->RTR = pmsg->rtr;
  622. hcan->pTxMsg->IDE = pmsg->ide;
  623. hcan->pTxMsg->DLC = pmsg->len;
  624. rt_memset(&hcan->pTxMsg->Data, 0x00, 8);
  625. /* rt_memcpy(&hcan->pTxMsg->Data, &pmsg->data, 8); */
  626. hcan->pTxMsg->Data[0] = pmsg->data[0];
  627. hcan->pTxMsg->Data[1] = pmsg->data[1];
  628. hcan->pTxMsg->Data[2] = pmsg->data[2];
  629. hcan->pTxMsg->Data[3] = pmsg->data[3];
  630. hcan->pTxMsg->Data[4] = pmsg->data[4];
  631. hcan->pTxMsg->Data[5] = pmsg->data[5];
  632. hcan->pTxMsg->Data[6] = pmsg->data[6];
  633. hcan->pTxMsg->Data[7] = pmsg->data[7];
  634. HAL_CAN_Transmit_IT(hcan);
  635. return RT_EOK;
  636. }
  637. static int drv_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxno)
  638. {
  639. CAN_HandleTypeDef *hcan;
  640. struct rt_can_msg *pmsg = (struct rt_can_msg *) buf;
  641. hcan = &((struct stm32_drv_can *) can->parent.user_data)->CanHandle;
  642. pmsg->id = hcan->pRxMsg->StdId;
  643. pmsg->rtr = hcan->pRxMsg->RTR;
  644. pmsg->ide = hcan->pRxMsg->IDE;
  645. pmsg->len = hcan->pRxMsg->DLC;
  646. /* rt_memcpy(&pmsg->data, &hcan->pRxMsg->Data, 8); */
  647. pmsg->data[0] = hcan->pRxMsg->Data[0];
  648. pmsg->data[1] = hcan->pRxMsg->Data[1];
  649. pmsg->data[2] = hcan->pRxMsg->Data[2];
  650. pmsg->data[3] = hcan->pRxMsg->Data[3];
  651. pmsg->data[4] = hcan->pRxMsg->Data[4];
  652. pmsg->data[5] = hcan->pRxMsg->Data[5];
  653. pmsg->data[6] = hcan->pRxMsg->Data[6];
  654. pmsg->data[7] = hcan->pRxMsg->Data[7];
  655. return RT_EOK;
  656. }
  657. static const struct rt_can_ops drv_can_ops =
  658. {
  659. drv_configure,
  660. drv_control,
  661. drv_sendmsg,
  662. drv_recvmsg,
  663. };
  664. void HAL_CAN_MspInit(CAN_HandleTypeDef* canHandle)
  665. {
  666. GPIO_InitTypeDef GPIO_InitStruct;
  667. if(canHandle->Instance==CAN1)
  668. {
  669. /* CAN1 clock enable */
  670. __HAL_RCC_CAN1_CLK_ENABLE();
  671. __HAL_RCC_GPIOD_CLK_ENABLE();
  672. /**CAN1 GPIO Configuration
  673. PD0 ------> CAN1_RX
  674. PD1 ------> CAN1_TX
  675. */
  676. GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
  677. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  678. GPIO_InitStruct.Pull = GPIO_NOPULL;
  679. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
  680. GPIO_InitStruct.Alternate = GPIO_AF9_CAN1;
  681. HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
  682. }
  683. else if(canHandle->Instance==CAN2)
  684. {
  685. /* CAN2 clock enable */
  686. __HAL_RCC_CAN2_CLK_ENABLE();
  687. __HAL_RCC_GPIOB_CLK_ENABLE();
  688. /**CAN2 GPIO Configuration
  689. PB12 ------> CAN2_RX
  690. PB6 ------> CAN2_TX
  691. */
  692. GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_6;
  693. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  694. GPIO_InitStruct.Pull = GPIO_NOPULL;
  695. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
  696. GPIO_InitStruct.Alternate = GPIO_AF9_CAN2;
  697. HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  698. }
  699. }
  700. void HAL_CAN_MspDeInit(CAN_HandleTypeDef* canHandle)
  701. {
  702. if(canHandle->Instance==CAN1)
  703. {
  704. /* Peripheral clock disable */
  705. __HAL_RCC_CAN1_CLK_DISABLE();
  706. /**CAN1 GPIO Configuration
  707. PD0 ------> CAN1_RX
  708. PD1 ------> CAN1_TX
  709. */
  710. HAL_GPIO_DeInit(GPIOD, GPIO_PIN_0|GPIO_PIN_2);
  711. HAL_NVIC_DisableIRQ(CAN1_TX_IRQn);
  712. HAL_NVIC_DisableIRQ(CAN1_RX0_IRQn);
  713. HAL_NVIC_DisableIRQ(CAN1_RX1_IRQn);
  714. }
  715. else if(canHandle->Instance==CAN2)
  716. {
  717. __HAL_RCC_CAN2_CLK_DISABLE();
  718. /**CAN2 GPIO Configuration
  719. PB12 ------> CAN2_RX
  720. PB6 ------> CAN2_TX
  721. */
  722. HAL_GPIO_DeInit(GPIOB, GPIO_PIN_12|GPIO_PIN_6);
  723. HAL_NVIC_DisableIRQ(CAN2_TX_IRQn);
  724. HAL_NVIC_DisableIRQ(CAN2_RX0_IRQn);
  725. HAL_NVIC_DisableIRQ(CAN2_RX1_IRQn);
  726. }
  727. }
  728. int hw_can_init(void)
  729. {
  730. struct stm32_drv_can *drv_can;
  731. struct can_configure config = CANDEFAULTCONFIG;
  732. config.privmode = 0;
  733. config.ticks = 50;
  734. config.sndboxnumber = 3;
  735. #ifdef RT_CAN_USING_HDR
  736. config.maxhdr = 28;
  737. #endif
  738. #ifdef USING_BXCAN1
  739. drv_can = &drv_can1;
  740. drv_can->CanHandle.Instance = CAN1;
  741. drv_can->CanHandle.pTxMsg = &drv_can->TxMessage;
  742. drv_can->CanHandle.pRxMsg = &drv_can->RxMessage;
  743. dev_can1.ops = &drv_can_ops;
  744. dev_can1.config = config;
  745. /* register CAN1 device */
  746. rt_hw_can_register(&dev_can1, "can1",
  747. &drv_can_ops,
  748. drv_can);
  749. #endif /* USING_BXCAN1 */
  750. #ifdef USING_BXCAN2
  751. drv_can = &drv_can2;
  752. drv_can->CanHandle.Instance = CAN2;
  753. drv_can->CanHandle.pTxMsg = &drv_can->TxMessage;
  754. drv_can->CanHandle.pRxMsg = &drv_can->RxMessage;
  755. dev_can2.ops = &drv_can_ops;
  756. dev_can2.config = config;
  757. /* register CAN2 device */
  758. rt_hw_can_register(&dev_can2, "can2",
  759. &drv_can_ops,
  760. drv_can);
  761. #endif /* USING_BXCAN2 */
  762. return 0;
  763. }
  764. INIT_BOARD_EXPORT(hw_can_init);