i2c-bit-ops.c 8.0 KB

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  1. /*
  2. * File : i2c-bit-ops.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006, RT-Thread Development Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2012-04-25 weety first version
  13. */
  14. #include <rtdevice.h>
  15. #ifdef RT_I2C_BIT_DEBUG
  16. #define bit_dbg(fmt, ...) rt_kprintf(fmt, ##__VA_ARGS__)
  17. #else
  18. #define bit_dbg(fmt, ...)
  19. #endif
  20. #define SET_SDA(ops, val) ops->set_sda(ops->data, val)
  21. #define SET_SCL(ops, val) ops->set_scl(ops->data, val)
  22. #define GET_SDA(ops) ops->get_sda(ops->data)
  23. #define GET_SCL(ops) ops->get_scl(ops->data)
  24. rt_inline void i2c_delay(struct rt_i2c_bit_ops *ops)
  25. {
  26. ops->udelay((ops->delay_us + 1) >> 1);
  27. }
  28. rt_inline void i2c_delay2(struct rt_i2c_bit_ops *ops)
  29. {
  30. ops->udelay(ops->delay_us);
  31. }
  32. #define SDA_L(ops) SET_SDA(ops, 0)
  33. #define SDA_H(ops) SET_SDA(ops, 1)
  34. #define SCL_L(ops) SET_SCL(ops, 0)
  35. /*
  36. * release scl line, and wait scl line to high.
  37. */
  38. static rt_err_t SCL_H(struct rt_i2c_bit_ops *ops)
  39. {
  40. rt_tick_t start;
  41. SET_SCL(ops, 1);
  42. if (!ops->get_scl)
  43. goto done;
  44. start = rt_tick_get();
  45. while (!GET_SCL(ops))
  46. {
  47. if ((rt_tick_get() - start) > ops->timeout)
  48. return -RT_ETIMEOUT;
  49. rt_thread_delay((ops->timeout + 1) >> 1);
  50. }
  51. #ifdef RT_I2C_BIT_DEBUG
  52. if (rt_tick_get() != start)
  53. {
  54. bit_dbg("wait %ld tick for SCL line to go high\n",
  55. rt_tick_get() - start);
  56. }
  57. #endif
  58. done:
  59. i2c_delay(ops);
  60. return RT_EOK;
  61. }
  62. static void i2c_start(struct rt_i2c_bit_ops *ops)
  63. {
  64. #ifdef RT_I2C_BIT_DEBUG
  65. if (ops->get_scl && !GET_SCL(ops))
  66. {
  67. bit_dbg("I2C bus error, SCL line low\n");
  68. }
  69. if (ops->get_sda && !GET_SDA(ops))
  70. {
  71. bit_dbg("I2C bus error, SDA line low\n");
  72. }
  73. #endif
  74. SDA_L(ops);
  75. i2c_delay(ops);
  76. SCL_L(ops);
  77. }
  78. static void i2c_restart(struct rt_i2c_bit_ops *ops)
  79. {
  80. SDA_H(ops);
  81. SCL_H(ops);
  82. i2c_delay(ops);
  83. SDA_L(ops);
  84. i2c_delay(ops);
  85. SCL_L(ops);
  86. }
  87. static void i2c_stop(struct rt_i2c_bit_ops *ops)
  88. {
  89. SDA_L(ops);
  90. i2c_delay(ops);
  91. SCL_H(ops);
  92. i2c_delay(ops);
  93. SDA_H(ops);
  94. i2c_delay2(ops);
  95. }
  96. rt_inline rt_bool_t i2c_waitack(struct rt_i2c_bit_ops *ops)
  97. {
  98. rt_bool_t ack;
  99. SDA_H(ops);
  100. i2c_delay(ops);
  101. if (SCL_H(ops) < 0)
  102. {
  103. bit_dbg("wait ack timeout\n");
  104. return -RT_ETIMEOUT;
  105. }
  106. ack = !GET_SDA(ops); /* ACK : SDA pin is pulled low */
  107. bit_dbg("%s\n", ack ? "ACK" : "NACK");
  108. SCL_L(ops);
  109. return ack;
  110. }
  111. static rt_int32_t i2c_writeb(struct rt_i2c_bus_device *bus, rt_uint8_t data)
  112. {
  113. rt_int32_t i;
  114. rt_uint8_t bit;
  115. struct rt_i2c_bit_ops *ops = bus->priv;
  116. for (i = 7; i >= 0; i--)
  117. {
  118. SCL_L(ops);
  119. bit = (data >> i) & 1;
  120. SET_SDA(ops, bit);
  121. i2c_delay(ops);
  122. if (SCL_H(ops) < 0)
  123. {
  124. bit_dbg("i2c_writeb: 0x%02x, "
  125. "wait scl pin high timeout at bit %d\n",
  126. data, i);
  127. return -RT_ETIMEOUT;
  128. }
  129. }
  130. SCL_L(ops);
  131. i2c_delay(ops);
  132. return i2c_waitack(ops);
  133. }
  134. static rt_int32_t i2c_readb(struct rt_i2c_bus_device *bus)
  135. {
  136. rt_uint8_t i;
  137. rt_uint8_t data = 0;
  138. struct rt_i2c_bit_ops *ops = bus->priv;
  139. SDA_H(ops);
  140. i2c_delay(ops);
  141. for (i = 0; i < 8; i++)
  142. {
  143. data <<= 1;
  144. if (SCL_H(ops) < 0)
  145. {
  146. bit_dbg("i2c_readb: wait scl pin high "
  147. "timeout at bit %d\n", 7 - i);
  148. return -RT_ETIMEOUT;
  149. }
  150. if (GET_SDA(ops))
  151. data |= 1;
  152. SCL_L(ops);
  153. i2c_delay2(ops);
  154. }
  155. return data;
  156. }
  157. static rt_size_t i2c_send_bytes(struct rt_i2c_bus_device *bus, struct rt_i2c_msg *msg)
  158. {
  159. rt_int32_t ret;
  160. rt_size_t bytes = 0;
  161. const rt_uint8_t *ptr = msg->buf;
  162. rt_int32_t count = msg->len;
  163. rt_uint16_t ignore_nack = msg->flags & RT_I2C_IGNORE_NACK;
  164. while (count > 0)
  165. {
  166. ret = i2c_writeb(bus, *ptr);
  167. if ((ret > 0) || (ignore_nack && (ret == 0)))
  168. {
  169. count--;
  170. ptr++;
  171. bytes++;
  172. }
  173. else if (ret == 0)
  174. {
  175. rt_kprintf("send bytes: NACK.\n");
  176. return -RT_ERROR;
  177. }
  178. else
  179. {
  180. rt_kprintf("send bytes: error %d\n", ret);
  181. return ret;
  182. }
  183. }
  184. return bytes;
  185. }
  186. static rt_err_t i2c_send_ack_or_nack(struct rt_i2c_bus_device *bus, int ack)
  187. {
  188. struct rt_i2c_bit_ops *ops = bus->priv;
  189. if (ack)
  190. SET_SDA(ops, 0);
  191. i2c_delay(ops);
  192. if (SCL_H(ops) < 0)
  193. {
  194. rt_kprintf("ACK or NACK timeout\n");
  195. return -RT_ETIMEOUT;
  196. }
  197. SCL_L(ops);
  198. return RT_EOK;
  199. }
  200. static rt_size_t i2c_recv_bytes(struct rt_i2c_bus_device *bus, struct rt_i2c_msg *msg)
  201. {
  202. rt_int32_t val;
  203. rt_int32_t bytes = 0; /* actual bytes */
  204. rt_uint8_t *ptr = msg->buf;
  205. rt_int32_t count = msg->len;
  206. const rt_uint32_t flags = msg->flags;
  207. while (count > 0)
  208. {
  209. val = i2c_readb(bus);
  210. if (val >= 0)
  211. {
  212. *ptr = val;
  213. bytes++;
  214. }
  215. else
  216. {
  217. break;
  218. }
  219. ptr++;
  220. count--;
  221. bit_dbg("recieve bytes: 0x%02x, %s\n",
  222. val, (flags & RT_I2C_NO_READ_ACK) ?
  223. "(No ACK/NACK)" : (count ? "ACK" : "NACK"));
  224. if (!(flags & RT_I2C_NO_READ_ACK))
  225. {
  226. val = i2c_send_ack_or_nack(bus, count);
  227. if (val < 0)
  228. return val;
  229. }
  230. }
  231. return bytes;
  232. }
  233. static rt_int32_t i2c_send_address(struct rt_i2c_bus_device *bus,
  234. rt_uint8_t addr, rt_int32_t retries)
  235. {
  236. struct rt_i2c_bit_ops *ops = bus->priv;
  237. rt_int32_t i;
  238. rt_err_t ret = 0;
  239. for (i = 0; i <= retries; i++)
  240. {
  241. ret = i2c_writeb(bus, addr);
  242. if (ret == 1 || i == retries)
  243. break;
  244. bit_dbg("send stop condition\n");
  245. i2c_stop(ops);
  246. i2c_delay2(ops);
  247. bit_dbg("send start condition\n");
  248. i2c_start(ops);
  249. }
  250. return ret;
  251. }
  252. static rt_err_t i2c_bit_send_address(struct rt_i2c_bus_device *bus, struct rt_i2c_msg *msg)
  253. {
  254. rt_uint16_t flags = msg->flags;
  255. rt_uint16_t ignore_nack = msg->flags & RT_I2C_IGNORE_NACK;
  256. struct rt_i2c_bit_ops *ops = bus->priv;
  257. rt_uint8_t addr1, addr2;
  258. rt_int32_t retries;
  259. rt_err_t ret;
  260. retries = ignore_nack ? 0 : bus->retries;
  261. if (flags & RT_I2C_ADDR_10BIT)
  262. {
  263. addr1 = 0xf0 | ((msg->addr >> 7) & 0x06);
  264. addr2 = msg->addr & 0xff;
  265. bit_dbg("addr1: %d, addr2: %d\n", addr1, addr2);
  266. ret = i2c_send_address(bus, addr1, retries);
  267. if ((ret != 1) && !ignore_nack)
  268. {
  269. rt_kprintf("NACK: sending first addr\n");
  270. return -RT_EIO;
  271. }
  272. ret = i2c_writeb(bus, addr2);
  273. if ((ret != 1) && !ignore_nack)
  274. {
  275. rt_kprintf("NACK: sending second addr\n");
  276. return -RT_EIO;
  277. }
  278. if (flags & RT_I2C_RD)
  279. {
  280. bit_dbg("send repeated start condition\n");
  281. i2c_restart(ops);
  282. addr1 |= 0x01;
  283. ret = i2c_send_address(bus, addr1, retries);
  284. if ((ret != 1) && !ignore_nack)
  285. {
  286. rt_kprintf("NACK: sending repeated addr\n");
  287. return -RT_EIO;
  288. }
  289. }
  290. }
  291. else
  292. { /* 7-bit addr */
  293. addr1 = msg->addr << 1;
  294. if (flags & RT_I2C_RD)
  295. addr1 |= 1;
  296. ret = i2c_send_address(bus, addr1, retries);
  297. if ((ret != 1) && !ignore_nack)
  298. return -RT_EIO;
  299. }
  300. return RT_EOK;
  301. }
  302. static rt_size_t i2c_bit_xfer(struct rt_i2c_bus_device *bus,
  303. struct rt_i2c_msg msgs[], rt_uint32_t num)
  304. {
  305. struct rt_i2c_msg *msg;
  306. struct rt_i2c_bit_ops *ops = bus->priv;
  307. rt_int32_t i, ret;
  308. rt_uint16_t ignore_nack;
  309. bit_dbg("send start condition\n");
  310. i2c_start(ops);
  311. for (i = 0; i < num; i++)
  312. {
  313. msg = &msgs[i];
  314. ignore_nack = msg->flags & RT_I2C_IGNORE_NACK;
  315. if (!(msg->flags & RT_I2C_NO_START))
  316. {
  317. if (i)
  318. {
  319. i2c_restart(ops);
  320. }
  321. ret = i2c_bit_send_address(bus, msg);
  322. if ((ret != RT_EOK) && !ignore_nack)
  323. {
  324. bit_dbg("receive NACK from device addr 0x%02x msg %d\n",
  325. msgs[i].addr, i);
  326. goto out;
  327. }
  328. }
  329. if (msg->flags & RT_I2C_RD)
  330. {
  331. ret = i2c_recv_bytes(bus, msg);
  332. if (ret >= 1)
  333. bit_dbg("read %d byte%s\n",
  334. ret, ret == 1 ? "" : "s");
  335. if (ret < msg->len)
  336. {
  337. if (ret >= 0)
  338. ret = -RT_EIO;
  339. goto out;
  340. }
  341. }
  342. else
  343. {
  344. ret = i2c_send_bytes(bus, msg);
  345. if (ret >= 1)
  346. bit_dbg("write %d byte%s\n",
  347. ret, ret == 1 ? "" : "s");
  348. if (ret < msg->len)
  349. {
  350. if (ret >= 0)
  351. ret = -RT_ERROR;
  352. goto out;
  353. }
  354. }
  355. }
  356. ret = i;
  357. out:
  358. bit_dbg("send stop condition\n");
  359. i2c_stop(ops);
  360. return ret;
  361. }
  362. static const struct rt_i2c_bus_device_ops i2c_bit_bus_ops = {
  363. i2c_bit_xfer,
  364. RT_NULL,
  365. RT_NULL
  366. };
  367. rt_err_t rt_i2c_bit_add_bus(struct rt_i2c_bus_device *bus, const char *bus_name)
  368. {
  369. rt_err_t err;
  370. struct rt_i2c_bit_ops *bit_ops = bus->priv;
  371. RT_ASSERT(bit_ops != RT_NULL);
  372. bus->ops = &i2c_bit_bus_ops;
  373. return rt_i2c_bus_device_register(bus, bus_name);
  374. }