usart.c 11 KB

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  1. /*
  2. * File : usart.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2009, RT-Thread Development Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2009-01-05 Bernard the first version
  13. * 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
  14. */
  15. #include "usart.h"
  16. #include <serial.h>
  17. #include <stm32f10x_dma.h>
  18. /*
  19. * Use UART1 as console output and finsh input
  20. * interrupt Rx and poll Tx (stream mode)
  21. *
  22. * Use UART2 with interrupt Rx and poll Tx
  23. * Use UART3 with DMA Tx and interrupt Rx -- DMA channel 2
  24. *
  25. * USART DMA setting on STM32
  26. * USART1 Tx --> DMA Channel 4
  27. * USART1 Rx --> DMA Channel 5
  28. * USART2 Tx --> DMA Channel 7
  29. * USART2 Rx --> DMA Channel 6
  30. * USART3 Tx --> DMA Channel 2
  31. * USART3 Rx --> DMA Channel 3
  32. */
  33. #ifdef RT_USING_UART1
  34. struct stm32_serial_int_rx uart1_int_rx;
  35. struct stm32_serial_device uart1 =
  36. {
  37. USART1,
  38. &uart1_int_rx,
  39. RT_NULL
  40. };
  41. struct rt_device uart1_device;
  42. #endif
  43. #ifdef RT_USING_UART2
  44. struct stm32_serial_int_rx uart2_int_rx;
  45. struct stm32_serial_device uart2 =
  46. {
  47. USART2,
  48. &uart2_int_rx,
  49. RT_NULL
  50. };
  51. struct rt_device uart2_device;
  52. #endif
  53. #ifdef RT_USING_UART3
  54. struct stm32_serial_int_rx uart3_int_rx;
  55. struct stm32_serial_dma_tx uart3_dma_tx;
  56. struct stm32_serial_device uart3 =
  57. {
  58. USART3,
  59. &uart3_int_rx,
  60. &uart3_dma_tx
  61. };
  62. struct rt_device uart3_device;
  63. #endif
  64. #define USART1_DR_Base 0x40013804
  65. #define USART2_DR_Base 0x40004404
  66. #define USART3_DR_Base 0x40004804
  67. /* USART1_REMAP = 0 */
  68. #define UART1_GPIO_TX GPIO_Pin_9
  69. #define UART1_GPIO_RX GPIO_Pin_10
  70. #define UART1_GPIO GPIOA
  71. #define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
  72. #define UART1_TX_DMA DMA1_Channel4
  73. #define UART1_RX_DMA DMA1_Channel5
  74. #if defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL)
  75. #define UART2_GPIO_TX GPIO_Pin_5
  76. #define UART2_GPIO_RX GPIO_Pin_6
  77. #define UART2_GPIO GPIOD
  78. #define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
  79. #else /* for STM32F10X_HD */
  80. /* USART2_REMAP = 0 */
  81. #define UART2_GPIO_TX GPIO_Pin_2
  82. #define UART2_GPIO_RX GPIO_Pin_3
  83. #define UART2_GPIO GPIOA
  84. #define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
  85. #define UART2_TX_DMA DMA1_Channel7
  86. #define UART2_RX_DMA DMA1_Channel6
  87. #endif
  88. /* USART3_REMAP[1:0] = 00 */
  89. #define UART3_GPIO_RX GPIO_Pin_11
  90. #define UART3_GPIO_TX GPIO_Pin_10
  91. #define UART3_GPIO GPIOB
  92. #define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3
  93. #define UART3_TX_DMA DMA1_Channel2
  94. #define UART3_RX_DMA DMA1_Channel3
  95. static void RCC_Configuration(void)
  96. {
  97. RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
  98. #ifdef RT_USING_UART1
  99. /* Enable USART1 and GPIOA clocks */
  100. RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE);
  101. #endif
  102. #ifdef RT_USING_UART2
  103. #if (defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL))
  104. /* Enable AFIO and GPIOD clock */
  105. RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOD, ENABLE);
  106. /* Enable the USART2 Pins Software Remapping */
  107. GPIO_PinRemapConfig(GPIO_Remap_USART2, ENABLE);
  108. #else
  109. /* Enable AFIO and GPIOA clock */
  110. RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOA, ENABLE);
  111. #endif
  112. /* Enable USART2 clock */
  113. RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
  114. #endif
  115. #ifdef RT_USING_UART3
  116. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
  117. /* Enable USART3 clock */
  118. RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
  119. /* DMA clock enable */
  120. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
  121. #endif
  122. }
  123. static void GPIO_Configuration(void)
  124. {
  125. GPIO_InitTypeDef GPIO_InitStructure;
  126. #ifdef RT_USING_UART1
  127. /* Configure USART1 Rx (PA.10) as input floating */
  128. GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX;
  129. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  130. GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
  131. /* Configure USART1 Tx (PA.09) as alternate function push-pull */
  132. GPIO_InitStructure.GPIO_Pin = UART1_GPIO_TX;
  133. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  134. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  135. GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
  136. #endif
  137. #ifdef RT_USING_UART2
  138. /* Configure USART2 Rx as input floating */
  139. GPIO_InitStructure.GPIO_Pin = UART2_GPIO_RX;
  140. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  141. GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
  142. /* Configure USART2 Tx as alternate function push-pull */
  143. GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX;
  144. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  145. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  146. GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
  147. #endif
  148. #ifdef RT_USING_UART3
  149. /* Configure USART3 Rx as input floating */
  150. GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX;
  151. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  152. GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
  153. /* Configure USART3 Tx as alternate function push-pull */
  154. GPIO_InitStructure.GPIO_Pin = UART3_GPIO_TX;
  155. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  156. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  157. GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
  158. #endif
  159. }
  160. static void NVIC_Configuration(void)
  161. {
  162. NVIC_InitTypeDef NVIC_InitStructure;
  163. #ifdef RT_USING_UART1
  164. /* Enable the USART1 Interrupt */
  165. NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
  166. NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
  167. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
  168. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  169. NVIC_Init(&NVIC_InitStructure);
  170. #endif
  171. #ifdef RT_USING_UART2
  172. /* Enable the USART2 Interrupt */
  173. NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn;
  174. NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
  175. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
  176. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  177. NVIC_Init(&NVIC_InitStructure);
  178. #endif
  179. #ifdef RT_USING_UART3
  180. /* Enable the USART3 Interrupt */
  181. NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn;
  182. NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
  183. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
  184. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  185. NVIC_Init(&NVIC_InitStructure);
  186. /* Enable the DMA1 Channel2 Interrupt */
  187. NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel2_IRQn;
  188. NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
  189. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
  190. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  191. NVIC_Init(&NVIC_InitStructure);
  192. #endif
  193. }
  194. static void DMA_Configuration(void)
  195. {
  196. #if defined (RT_USING_UART3)
  197. DMA_InitTypeDef DMA_InitStructure;
  198. /* fill init structure */
  199. DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
  200. DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
  201. DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
  202. DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
  203. DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
  204. DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
  205. DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
  206. /* DMA1 Channel5 (triggered by USART3 Tx event) Config */
  207. DMA_DeInit(UART3_TX_DMA);
  208. DMA_InitStructure.DMA_PeripheralBaseAddr = USART3_DR_Base;
  209. DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
  210. DMA_InitStructure.DMA_MemoryBaseAddr = (u32)0;
  211. DMA_InitStructure.DMA_BufferSize = 0;
  212. DMA_Init(UART3_TX_DMA, &DMA_InitStructure);
  213. DMA_ITConfig(UART3_TX_DMA, DMA_IT_TC | DMA_IT_TE, ENABLE);
  214. DMA_ClearFlag(DMA1_FLAG_TC5);
  215. #endif
  216. }
  217. /*
  218. * Init all related hardware in here
  219. * rt_hw_serial_init() will register all supported USART device
  220. */
  221. void rt_hw_usart_init()
  222. {
  223. USART_InitTypeDef USART_InitStructure;
  224. USART_ClockInitTypeDef USART_ClockInitStructure;
  225. RCC_Configuration();
  226. GPIO_Configuration();
  227. NVIC_Configuration();
  228. DMA_Configuration();
  229. /* uart init */
  230. #ifdef RT_USING_UART1
  231. USART_InitStructure.USART_BaudRate = 115200;
  232. USART_InitStructure.USART_WordLength = USART_WordLength_8b;
  233. USART_InitStructure.USART_StopBits = USART_StopBits_1;
  234. USART_InitStructure.USART_Parity = USART_Parity_No;
  235. USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  236. USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
  237. USART_ClockInitStructure.USART_Clock = USART_Clock_Disable;
  238. USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low;
  239. USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge;
  240. USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable;
  241. USART_Init(USART1, &USART_InitStructure);
  242. USART_ClockInit(USART1, &USART_ClockInitStructure);
  243. /* register uart1 */
  244. rt_hw_serial_register(&uart1_device, "uart1",
  245. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
  246. &uart1);
  247. /* enable interrupt */
  248. USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
  249. #endif
  250. #ifdef RT_USING_UART2
  251. USART_InitStructure.USART_BaudRate = 115200;
  252. USART_InitStructure.USART_WordLength = USART_WordLength_8b;
  253. USART_InitStructure.USART_StopBits = USART_StopBits_1;
  254. USART_InitStructure.USART_Parity = USART_Parity_No;
  255. USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  256. USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
  257. USART_ClockInitStructure.USART_Clock = USART_Clock_Disable;
  258. USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low;
  259. USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge;
  260. USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable;
  261. USART_Init(USART2, &USART_InitStructure);
  262. USART_ClockInit(USART2, &USART_ClockInitStructure);
  263. /* register uart2 */
  264. rt_hw_serial_register(&uart2_device, "uart2",
  265. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
  266. &uart2);
  267. /* Enable USART2 DMA Rx request */
  268. USART_ITConfig(USART2, USART_IT_RXNE, ENABLE);
  269. #endif
  270. #ifdef RT_USING_UART3
  271. USART_InitStructure.USART_BaudRate = 115200;
  272. USART_InitStructure.USART_WordLength = USART_WordLength_8b;
  273. USART_InitStructure.USART_StopBits = USART_StopBits_1;
  274. USART_InitStructure.USART_Parity = USART_Parity_No;
  275. USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  276. USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
  277. USART_ClockInitStructure.USART_Clock = USART_Clock_Disable;
  278. USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low;
  279. USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge;
  280. USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable;
  281. USART_Init(USART3, &USART_InitStructure);
  282. USART_ClockInit(USART3, &USART_ClockInitStructure);
  283. uart3_dma_tx.dma_channel= UART3_TX_DMA;
  284. /* register uart3 */
  285. rt_hw_serial_register(&uart3_device, "uart3",
  286. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_TX,
  287. &uart3);
  288. /* Enable USART3 DMA Tx request */
  289. USART_DMACmd(USART3, USART_DMAReq_Tx , ENABLE);
  290. /* enable interrupt */
  291. USART_ITConfig(USART3, USART_IT_RXNE, ENABLE);
  292. #endif
  293. }