drv_sdram.c 12 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2017-08-17 Tanek first implementation
  9. */
  10. #include <rtthread.h>
  11. #include "stm32f4xx_hal.h"
  12. #define SDRAM_MODEREG_BURST_LENGTH_1 ((uint16_t)0x0000)
  13. #define SDRAM_MODEREG_BURST_LENGTH_2 ((uint16_t)0x0001)
  14. #define SDRAM_MODEREG_BURST_LENGTH_4 ((uint16_t)0x0002)
  15. #define SDRAM_MODEREG_BURST_LENGTH_8 ((uint16_t)0x0004)
  16. #define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000)
  17. #define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED ((uint16_t)0x0008)
  18. #define SDRAM_MODEREG_CAS_LATENCY_2 ((uint16_t)0x0020)
  19. #define SDRAM_MODEREG_CAS_LATENCY_3 ((uint16_t)0x0030)
  20. #define SDRAM_MODEREG_OPERATING_MODE_STANDARD ((uint16_t)0x0000)
  21. #define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000)
  22. #define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200)
  23. #define BUFFER_SIZE ((uint32_t)0x0100)
  24. #define WRITE_READ_ADDR ((uint32_t)0x0800)
  25. #define REFRESH_COUNT ((uint32_t)0x0569) /* SDRAM refresh counter (90MHz SDRAM clock) */
  26. static FMC_SDRAM_CommandTypeDef command;
  27. static SDRAM_HandleTypeDef hsdram1;
  28. static FMC_SDRAM_TimingTypeDef SdramTiming;
  29. static void HAL_FMC_MspInit(void)
  30. {
  31. GPIO_InitTypeDef GPIO_InitStruct;
  32. /* Peripheral clock enable */
  33. __HAL_RCC_FMC_CLK_ENABLE();
  34. /* GPIO Ports Clock Enable */
  35. __HAL_RCC_GPIOD_CLK_ENABLE();
  36. __HAL_RCC_GPIOE_CLK_ENABLE();
  37. __HAL_RCC_GPIOF_CLK_ENABLE();
  38. __HAL_RCC_GPIOG_CLK_ENABLE();
  39. __HAL_RCC_GPIOH_CLK_ENABLE();
  40. __HAL_RCC_GPIOI_CLK_ENABLE();
  41. /** FMC GPIO Configuration
  42. PI9 ------> FMC_D30
  43. PI10 ------> FMC_D31
  44. PF0 ------> FMC_A0
  45. PF1 ------> FMC_A1
  46. PF2 ------> FMC_A2
  47. PF3 ------> FMC_A3
  48. PF4 ------> FMC_A4
  49. PF5 ------> FMC_A5
  50. PH2 ------> FMC_SDCKE0
  51. PH3 ------> FMC_SDNE0
  52. PH5 ------> FMC_SDNWE
  53. PF11 ------> FMC_SDNRAS
  54. PF12 ------> FMC_A6
  55. PF13 ------> FMC_A7
  56. PF14 ------> FMC_A8
  57. PF15 ------> FMC_A9
  58. PG0 ------> FMC_A10
  59. PG1 ------> FMC_A11
  60. PE7 ------> FMC_D4
  61. PE8 ------> FMC_D5
  62. PE9 ------> FMC_D6
  63. PE10 ------> FMC_D7
  64. PE11 ------> FMC_D8
  65. PE12 ------> FMC_D9
  66. PE13 ------> FMC_D10
  67. PE14 ------> FMC_D11
  68. PE15 ------> FMC_D12
  69. PH8 ------> FMC_D16
  70. PH9 ------> FMC_D17
  71. PH10 ------> FMC_D18
  72. PH11 ------> FMC_D19
  73. PH12 ------> FMC_D20
  74. PD8 ------> FMC_D13
  75. PD9 ------> FMC_D14
  76. PD10 ------> FMC_D15
  77. PD14 ------> FMC_D0
  78. PD15 ------> FMC_D1
  79. PG4 ------> FMC_BA0
  80. PG5 ------> FMC_BA1
  81. PG8 ------> FMC_SDCLK
  82. PH13 ------> FMC_D21
  83. PH14 ------> FMC_D22
  84. PH15 ------> FMC_D23
  85. PI0 ------> FMC_D24
  86. PI1 ------> FMC_D25
  87. PI2 ------> FMC_D26
  88. PI3 ------> FMC_D27
  89. PD0 ------> FMC_D2
  90. PD1 ------> FMC_D3
  91. PG15 ------> FMC_SDNCAS
  92. PE0 ------> FMC_NBL0
  93. PE1 ------> FMC_NBL1
  94. PI4 ------> FMC_NBL2
  95. PI5 ------> FMC_NBL3
  96. PI6 ------> FMC_D28
  97. PI7 ------> FMC_D29
  98. */
  99. GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_0|GPIO_PIN_1
  100. |GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5
  101. |GPIO_PIN_6|GPIO_PIN_7;
  102. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  103. GPIO_InitStruct.Pull = GPIO_NOPULL;
  104. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
  105. GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
  106. HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
  107. GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
  108. |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_11|GPIO_PIN_12
  109. |GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
  110. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  111. GPIO_InitStruct.Pull = GPIO_NOPULL;
  112. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
  113. GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
  114. HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
  115. GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_5|GPIO_PIN_8
  116. |GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12
  117. |GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
  118. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  119. GPIO_InitStruct.Pull = GPIO_NOPULL;
  120. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
  121. GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
  122. HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
  123. GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5
  124. |GPIO_PIN_8|GPIO_PIN_15;
  125. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  126. GPIO_InitStruct.Pull = GPIO_NOPULL;
  127. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
  128. GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
  129. HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
  130. GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
  131. |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
  132. |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1;
  133. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  134. GPIO_InitStruct.Pull = GPIO_NOPULL;
  135. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
  136. GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
  137. HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
  138. GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14
  139. |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1;
  140. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  141. GPIO_InitStruct.Pull = GPIO_NOPULL;
  142. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
  143. GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
  144. HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
  145. }
  146. void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef* hsdram){
  147. HAL_FMC_MspInit();
  148. }
  149. static void HAL_FMC_MspDeInit(void)
  150. {
  151. /* Peripheral clock enable */
  152. __HAL_RCC_FMC_CLK_DISABLE();
  153. /** FMC GPIO Configuration
  154. PI9 ------> FMC_D30
  155. PI10 ------> FMC_D31
  156. PF0 ------> FMC_A0
  157. PF1 ------> FMC_A1
  158. PF2 ------> FMC_A2
  159. PF3 ------> FMC_A3
  160. PF4 ------> FMC_A4
  161. PF5 ------> FMC_A5
  162. PH2 ------> FMC_SDCKE0
  163. PH3 ------> FMC_SDNE0
  164. PH5 ------> FMC_SDNWE
  165. PF11 ------> FMC_SDNRAS
  166. PF12 ------> FMC_A6
  167. PF13 ------> FMC_A7
  168. PF14 ------> FMC_A8
  169. PF15 ------> FMC_A9
  170. PG0 ------> FMC_A10
  171. PG1 ------> FMC_A11
  172. PE7 ------> FMC_D4
  173. PE8 ------> FMC_D5
  174. PE9 ------> FMC_D6
  175. PE10 ------> FMC_D7
  176. PE11 ------> FMC_D8
  177. PE12 ------> FMC_D9
  178. PE13 ------> FMC_D10
  179. PE14 ------> FMC_D11
  180. PE15 ------> FMC_D12
  181. PH8 ------> FMC_D16
  182. PH9 ------> FMC_D17
  183. PH10 ------> FMC_D18
  184. PH11 ------> FMC_D19
  185. PH12 ------> FMC_D20
  186. PD8 ------> FMC_D13
  187. PD9 ------> FMC_D14
  188. PD10 ------> FMC_D15
  189. PD14 ------> FMC_D0
  190. PD15 ------> FMC_D1
  191. PG4 ------> FMC_BA0
  192. PG5 ------> FMC_BA1
  193. PG8 ------> FMC_SDCLK
  194. PH13 ------> FMC_D21
  195. PH14 ------> FMC_D22
  196. PH15 ------> FMC_D23
  197. PI0 ------> FMC_D24
  198. PI1 ------> FMC_D25
  199. PI2 ------> FMC_D26
  200. PI3 ------> FMC_D27
  201. PD0 ------> FMC_D2
  202. PD1 ------> FMC_D3
  203. PG15 ------> FMC_SDNCAS
  204. PE0 ------> FMC_NBL0
  205. PE1 ------> FMC_NBL1
  206. PI4 ------> FMC_NBL2
  207. PI5 ------> FMC_NBL3
  208. PI6 ------> FMC_D28
  209. PI7 ------> FMC_D29
  210. */
  211. HAL_GPIO_DeInit(GPIOI, GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_0|GPIO_PIN_1
  212. |GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5
  213. |GPIO_PIN_6|GPIO_PIN_7);
  214. HAL_GPIO_DeInit(GPIOF, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
  215. |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_11|GPIO_PIN_12
  216. |GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15);
  217. HAL_GPIO_DeInit(GPIOH, GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_5|GPIO_PIN_8
  218. |GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12
  219. |GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15);
  220. HAL_GPIO_DeInit(GPIOG, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5
  221. |GPIO_PIN_8|GPIO_PIN_15);
  222. HAL_GPIO_DeInit(GPIOE, GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
  223. |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
  224. |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1);
  225. HAL_GPIO_DeInit(GPIOD, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14
  226. |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1);
  227. }
  228. void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef* hsdram)
  229. {
  230. HAL_FMC_MspDeInit();
  231. }
  232. /**
  233. * @brief Perform the SDRAM exernal memory inialization sequence
  234. * @param hsdram: SDRAM handle
  235. * @param Command: Pointer to SDRAM command structure
  236. * @retval None
  237. */
  238. static void SDRAM_Initialization_Sequence(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command)
  239. {
  240. __IO uint32_t tmpmrd =0;
  241. /* Step 3: Configure a clock configuration enable command */
  242. Command->CommandMode = FMC_SDRAM_CMD_CLK_ENABLE;
  243. Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
  244. Command->AutoRefreshNumber = 1;
  245. Command->ModeRegisterDefinition = 0;
  246. /* Send the command */
  247. HAL_SDRAM_SendCommand(hsdram, Command, 0x1000);
  248. /* Step 4: Insert 100 ms delay */
  249. //HAL_Delay(100);
  250. for (tmpmrd = 0; tmpmrd < 0xfffff; tmpmrd ++)
  251. ;
  252. /* Step 5: Configure a PALL (precharge all) command */
  253. Command->CommandMode = FMC_SDRAM_CMD_PALL;
  254. Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
  255. Command->AutoRefreshNumber = 1;
  256. Command->ModeRegisterDefinition = 0;
  257. /* Send the command */
  258. HAL_SDRAM_SendCommand(hsdram, Command, 0x1000);
  259. /* Step 6 : Configure a Auto-Refresh command */
  260. Command->CommandMode = FMC_SDRAM_CMD_AUTOREFRESH_MODE;
  261. Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
  262. Command->AutoRefreshNumber = 8;
  263. Command->ModeRegisterDefinition = 0;
  264. /* Send the command */
  265. HAL_SDRAM_SendCommand(hsdram, Command, 0x1000);
  266. /* Step 7: Program the external memory mode register */
  267. tmpmrd = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_1 |
  268. SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL |
  269. SDRAM_MODEREG_CAS_LATENCY_3 |
  270. SDRAM_MODEREG_OPERATING_MODE_STANDARD |
  271. SDRAM_MODEREG_WRITEBURST_MODE_SINGLE;
  272. Command->CommandMode = FMC_SDRAM_CMD_LOAD_MODE;
  273. Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
  274. Command->AutoRefreshNumber = 1;
  275. Command->ModeRegisterDefinition = tmpmrd;
  276. /* Send the command */
  277. HAL_SDRAM_SendCommand(hsdram, Command, 0x1000);
  278. /* Step 8: Set the refresh rate counter */
  279. /* (15.62 us x Freq) - 20 */
  280. /* Set the device refresh counter */
  281. HAL_SDRAM_ProgramRefreshRate(hsdram, REFRESH_COUNT);
  282. }
  283. int stm32_hw_0_sdram_init(void)
  284. {
  285. /** Perform the SDRAM1 memory initialization sequence
  286. */
  287. hsdram1.Instance = FMC_SDRAM_DEVICE;
  288. /* hsdram1.Init */
  289. hsdram1.Init.SDBank = FMC_SDRAM_BANK1;
  290. hsdram1.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_8;
  291. hsdram1.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_12;
  292. hsdram1.Init.MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_32;
  293. hsdram1.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
  294. hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_3;
  295. hsdram1.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
  296. hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_2;
  297. hsdram1.Init.ReadBurst = FMC_SDRAM_RBURST_ENABLE;
  298. hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_1;
  299. /* SdramTiming */
  300. SdramTiming.LoadToActiveDelay = 2;
  301. SdramTiming.ExitSelfRefreshDelay = 7;
  302. SdramTiming.SelfRefreshTime = 2;
  303. SdramTiming.RowCycleDelay = 4;
  304. SdramTiming.WriteRecoveryTime = 2;
  305. SdramTiming.RPDelay = 2;
  306. SdramTiming.RCDDelay = 2;
  307. if (HAL_SDRAM_Init(&hsdram1, &SdramTiming) != HAL_OK)
  308. {
  309. RT_ASSERT(RT_NULL);
  310. }
  311. SDRAM_Initialization_Sequence(&hsdram1, &command);
  312. return 0;
  313. }
  314. INIT_BOARD_EXPORT(stm32_hw_0_sdram_init);