drv_hwtimer.h 4.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145
  1. /*
  2. * Copyright (C) 2020, Huada Semiconductor Co., Ltd.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2020-10-30 CDT first version
  9. */
  10. #ifndef __DRV_HWTIMER_H__
  11. #define __DRV_HWTIMER_H__
  12. #include <rtthread.h>
  13. #include "board_config.h"
  14. #ifdef __cplusplus
  15. extern "C" {
  16. #endif
  17. #ifdef BSP_USING_TIMER1
  18. #ifndef TIMER1_IRQ_CONFIG
  19. #define TIMER1_IRQ_CONFIG \
  20. { \
  21. .irq = TIMER1_CNT_INT_IRQn, \
  22. .irq_prio = TIMER1_CNT_INT_PRIO, \
  23. }
  24. #endif /* TIMER1_IRQ_CONFIG */
  25. #endif /* BSP_USING_TIMER1 */
  26. #ifdef BSP_USING_TIMER2
  27. #ifndef TIMER2_IRQ_CONFIG
  28. #define TIMER2_IRQ_CONFIG \
  29. { \
  30. .irq = TIMER2_CNT_INT_IRQn, \
  31. .irq_prio = TIMER2_CNT_INT_PRIO, \
  32. }
  33. #endif /* TIMER2_IRQ_CONFIG */
  34. #endif /* BSP_USING_TIMER2 */
  35. #ifdef BSP_USING_TIMER3
  36. #ifndef TIMER3_IRQ_CONFIG
  37. #define TIMER3_IRQ_CONFIG \
  38. { \
  39. .irq = TIMER3_CNT_INT_IRQn, \
  40. .irq_prio = TIMER3_CNT_INT_PRIO, \
  41. }
  42. #endif /* TIMER3_IRQ_CONFIG */
  43. #endif /* BSP_USING_TIMER3 */
  44. #ifdef BSP_USING_TIMER4
  45. #ifndef TIMER4_IRQ_CONFIG
  46. #define TIMER4_IRQ_CONFIG \
  47. { \
  48. .irq = TIMER4_CNT_INT_IRQn, \
  49. .irq_prio = TIMER4_CNT_INT_PRIO, \
  50. }
  51. #endif /* TIMER4_IRQ_CONFIG */
  52. #endif /* BSP_USING_TIMER4 */
  53. #ifdef BSP_USING_TIMER5
  54. #ifndef TIMER5_IRQ_CONFIG
  55. #define TIMER5_IRQ_CONFIG \
  56. { \
  57. .irq = TIMER5_CNT_INT_IRQn, \
  58. .irq_prio = TIMER5_CNT_INT_PRIO, \
  59. }
  60. #endif /* TIMER5_IRQ_CONFIG */
  61. #endif /* BSP_USING_TIMER5 */
  62. #ifdef BSP_USING_TIMER6
  63. #ifndef TIMER6_IRQ_CONFIG
  64. #define TIMER6_IRQ_CONFIG \
  65. { \
  66. .irq = TIMER6_CNT_INT_IRQn, \
  67. .irq_prio = TIMER6_CNT_INT_PRIO, \
  68. }
  69. #endif /* TIMER6_IRQ_CONFIG */
  70. #endif /* BSP_USING_TIMER6 */
  71. #ifdef BSP_USING_TIMER7
  72. #ifndef TIMER7_IRQ_CONFIG
  73. #define TIMER7_IRQ_CONFIG \
  74. { \
  75. .irq = TIMER7_CNT_INT_IRQn, \
  76. .irq_prio = TIMER7_CNT_INT_PRIO, \
  77. }
  78. #endif /* TIMER7_IRQ_CONFIG */
  79. #endif /* BSP_USING_TIMER7 */
  80. #ifdef BSP_USING_TIMER8
  81. #ifndef TIMER8_IRQ_CONFIG
  82. #define TIMER8_IRQ_CONFIG \
  83. { \
  84. .irq = TIMER8_CNT_INT_IRQn, \
  85. .irq_prio = TIMER8_CNT_INT_PRIO, \
  86. }
  87. #endif /* TIMER8_IRQ_CONFIG */
  88. #endif /* BSP_USING_TIMER8 */
  89. #ifdef BSP_USING_TIMER9
  90. #ifndef TIMER9_IRQ_CONFIG
  91. #define TIMER9_IRQ_CONFIG \
  92. { \
  93. .irq = TIMER9_CNT_INT_IRQn, \
  94. .irq_prio = TIMER9_CNT_INT_PRIO, \
  95. }
  96. #endif /* TIMER9_IRQ_CONFIG */
  97. #endif /* BSP_USING_TIMER9 */
  98. #ifdef BSP_USING_TIMER10
  99. #ifndef TIMER10_IRQ_CONFIG
  100. #define TIMER10_IRQ_CONFIG \
  101. { \
  102. .irq = TIMER10_CNT_INT_IRQn, \
  103. .irq_prio = TIMER10_CNT_INT_PRIO, \
  104. }
  105. #endif /* TIMER10_IRQ_CONFIG */
  106. #endif /* BSP_USING_TIMER10 */
  107. #ifdef BSP_USING_TIMER11
  108. #ifndef TIMER11_IRQ_CONFIG
  109. #define TIMER11_IRQ_CONFIG \
  110. { \
  111. .irq = TIMER11_CNT_INT_IRQn, \
  112. .irq_prio = TIMER11_CNT_INT_PRIO, \
  113. }
  114. #endif /* TIMER11_IRQ_CONFIG */
  115. #endif /* BSP_USING_TIMER11 */
  116. #ifdef BSP_USING_TIMER12
  117. #ifndef TIMER12_IRQ_CONFIG
  118. #define TIMER12_IRQ_CONFIG \
  119. { \
  120. .irq = TIMER12_CNT_INT_IRQn, \
  121. .irq_prio = TIMER12_CNT_INT_PRIO, \
  122. }
  123. #endif /* TIMER12_IRQ_CONFIG */
  124. #endif /* BSP_USING_TIMER12 */
  125. #ifdef __cplusplus
  126. }
  127. #endif
  128. #endif /* __DRV_HWTIMER_H__ */